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address_offset : 0x0 Bytes (0x0)
size : 0x2815 byte (0x0)
mem_usage : registers
protection : not protected
ADC interrupt status register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMABHF : DMABHF
bits : 1 - 1 (1 bit)
DMABF : DMABF
bits : 2 - 2 (1 bit)
SAT : SAT
bits : 3 - 3 (1 bit)
DMAOVF : DMAOVF
bits : 4 - 4 (1 bit)
ADC control register
address_offset : 0x27F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADON : ADON
bits : 0 - 0 (1 bit)
CLK : CLK
bits : 2 - 2 (1 bit)
CHSELN : CHSELN
bits : 3 - 6 (4 bit)
CHSELP : CHSELP
bits : 7 - 10 (4 bit)
HVSELN : HVSELN
bits : 11 - 11 (1 bit)
HVSELP : HVSELP
bits : 12 - 12 (1 bit)
SMP : SMP
bits : 13 - 15 (3 bit)
ADC offset register
address_offset : 0x27F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OFFSET : OFFSET
bits : 0 - 15 (16 bit)
ADC gain register
address_offset : 0x27FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GAIN : GAIN
bits : 0 - 15 (16 bit)
ADC DMA control register
address_offset : 0x2800 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOAD : Loads the DMA buffer
bits : 0 - 0 (1 bit)
access : read-write
AUTOWRAP : Selects DMA mode
bits : 1 - 1 (1 bit)
access : read-write
RST : Write 1 to reset the ADC DMA
bits : 4 - 4 (1 bit)
access : write-only
ADC DMA status register
address_offset : 0x2804 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ACT : ACT
bits : 0 - 0 (1 bit)
AOVF : AOVF
bits : 1 - 1 (1 bit)
ADC DMA memory start address register
address_offset : 0x2808 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MSA : MSA
bits : 0 - 12 (13 bit)
ADC DMA number of data to transfer register
address_offset : 0x280C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NDT : NDT
bits : 0 - 12 (13 bit)
ADC DMA memory next address register
address_offset : 0x2810 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MNA : MNA
bits : 1 - 13 (13 bit)
ADC DMA count number of data transferred register
address_offset : 0x2814 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CNDT : CNDT
bits : 0 - 12 (13 bit)
ADC interrupt enable register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DMABHFIE : DMABHFIE
bits : 1 - 1 (1 bit)
DMABFIE : DMABFIE
bits : 2 - 2 (1 bit)
SATIE : SATIE
bits : 3 - 3 (1 bit)
DMAOVFIE : DMAOVFIE
bits : 4 - 4 (1 bit)
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