SYSTEM

VBTBKR : VBTBKR is a 512-byte readable/writable register to store data powered by VBATT.The value of this register is retained even when VCC is not powered but VBATT is powered.VBTBKR is initialized by VBATT selected voltage power-on-reset.
bits : 0 - 6 (7 bit)
access : read-write

VBTBKR[50]

VBATT Backup Register [%s]
address_offset : 0x108FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[51]

VBATT Backup Register [%s]
address_offset : 0x10E2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[52]

VBATT Backup Register [%s]
address_offset : 0x11362 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[53]

VBATT Backup Register [%s]
address_offset : 0x11897 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[54]

VBATT Backup Register [%s]
address_offset : 0x11DCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[55]

VBATT Backup Register [%s]
address_offset : 0x12304 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[56]

VBATT Backup Register [%s]
address_offset : 0x1283C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[57]

VBATT Backup Register [%s]
address_offset : 0x12D75 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[58]

VBATT Backup Register [%s]
address_offset : 0x132AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[59]

VBATT Backup Register [%s]
address_offset : 0x137EA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[60]

VBATT Backup Register [%s]
address_offset : 0x13D26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[2]

VBATT Backup Register [%s]
address_offset : 0x1403 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[61]

VBATT Backup Register [%s]
address_offset : 0x14263 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[62]

VBATT Backup Register [%s]
address_offset : 0x147A1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[63]

VBATT Backup Register [%s]
address_offset : 0x14CE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[64]

VBATT Backup Register [%s]
address_offset : 0x15220 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[65]

VBATT Backup Register [%s]
address_offset : 0x15761 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[66]

VBATT Backup Register [%s]
address_offset : 0x15CA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[67]

VBATT Backup Register [%s]
address_offset : 0x161E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[68]

VBATT Backup Register [%s]
address_offset : 0x1672A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[69]

VBATT Backup Register [%s]
address_offset : 0x16C6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[70]

VBATT Backup Register [%s]
address_offset : 0x171B5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[71]

VBATT Backup Register [%s]
address_offset : 0x176FC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[72]

VBATT Backup Register [%s]
address_offset : 0x17C44 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[73]

VBATT Backup Register [%s]
address_offset : 0x1818D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[74]

VBATT Backup Register [%s]
address_offset : 0x186D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[75]

VBATT Backup Register [%s]
address_offset : 0x18C22 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[3]

VBATT Backup Register [%s]
address_offset : 0x1906 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[76]

VBATT Backup Register [%s]
address_offset : 0x1916E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[77]

VBATT Backup Register [%s]
address_offset : 0x196BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[78]

VBATT Backup Register [%s]
address_offset : 0x19C09 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[79]

VBATT Backup Register [%s]
address_offset : 0x1A158 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[80]

VBATT Backup Register [%s]
address_offset : 0x1A6A8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[81]

VBATT Backup Register [%s]
address_offset : 0x1ABF9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[82]

VBATT Backup Register [%s]
address_offset : 0x1B14B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[83]

VBATT Backup Register [%s]
address_offset : 0x1B69E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[84]

VBATT Backup Register [%s]
address_offset : 0x1BBF2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MSTPCRA

Module Stop Control Register A
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MSTPA0 : RAM0 Module Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Cancel the module-stop state

#1 : 1

Enter the module-stop state

End of enumeration elements list.

MSTPA6 : ECCRAM Module Stop
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Cancel the module-stop state

#1 : 1

Enter the module-stop state

End of enumeration elements list.

Reserved : These bits are read as 111111111111111. The write value should be 111111111111111.
bits : 7 - 20 (14 bit)
access : read-write

MSTPA22 : DMA Controller/Data Transfer Controller Module Stop
bits : 22 - 21 (0 bit)
access : read-write

Enumeration:

#0 : 0

Cancel the module-stop state

#1 : 1

Enter the module-stop state

End of enumeration elements list.

VBTBKR[85]

VBATT Backup Register [%s]
address_offset : 0x1C147 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[86]

VBATT Backup Register [%s]
address_offset : 0x1C69D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[87]

VBATT Backup Register [%s]
address_offset : 0x1CBF4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[88]

VBATT Backup Register [%s]
address_offset : 0x1D14C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[89]

VBATT Backup Register [%s]
address_offset : 0x1D6A5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[90]

VBATT Backup Register [%s]
address_offset : 0x1DBFF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[4]

VBATT Backup Register [%s]
address_offset : 0x1E0A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[91]

VBATT Backup Register [%s]
address_offset : 0x1E15A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[92]

VBATT Backup Register [%s]
address_offset : 0x1E6B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[93]

VBATT Backup Register [%s]
address_offset : 0x1EC13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[94]

VBATT Backup Register [%s]
address_offset : 0x1F171 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[95]

VBATT Backup Register [%s]
address_offset : 0x1F6D0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[96]

VBATT Backup Register [%s]
address_offset : 0x1FC30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCKDIVCR

System Clock Division Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PCKD : Peripheral Module Clock D (PCLKD) Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

PCKC : Peripheral Module Clock C (PCLKC) Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write

PCKB : Peripheral Module Clock B (PCLKB) Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write

PCKA : Peripheral Module Clock A (PCLKA) Select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 15 - 14 (0 bit)
access : read-write

BCK : External Bus Clock (BCLK) Select
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 19 - 22 (4 bit)
access : read-write

ICK : System Clock (ICLK) Select
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 27 - 26 (0 bit)
access : read-write

FCK : Flash IF Clock (FCLK) Select
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

: others

Setting prohibited

End of enumeration elements list.

VBTBKR[97]

VBATT Backup Register [%s]
address_offset : 0x20191 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[98]

VBATT Backup Register [%s]
address_offset : 0x206F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[99]

VBATT Backup Register [%s]
address_offset : 0x20C56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[100]

VBATT Backup Register [%s]
address_offset : 0x211BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[101]

VBATT Backup Register [%s]
address_offset : 0x2171F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[102]

VBATT Backup Register [%s]
address_offset : 0x21C85 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[103]

VBATT Backup Register [%s]
address_offset : 0x221EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[104]

VBATT Backup Register [%s]
address_offset : 0x22754 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[105]

VBATT Backup Register [%s]
address_offset : 0x22CBD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[5]

VBATT Backup Register [%s]
address_offset : 0x230F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[106]

VBATT Backup Register [%s]
address_offset : 0x23227 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[107]

VBATT Backup Register [%s]
address_offset : 0x23792 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[108]

VBATT Backup Register [%s]
address_offset : 0x23CFE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[109]

VBATT Backup Register [%s]
address_offset : 0x2426B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[110]

VBATT Backup Register [%s]
address_offset : 0x247D9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[111]

VBATT Backup Register [%s]
address_offset : 0x24D48 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[112]

VBATT Backup Register [%s]
address_offset : 0x252B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[113]

VBATT Backup Register [%s]
address_offset : 0x25829 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[114]

VBATT Backup Register [%s]
address_offset : 0x25D9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCKSCR

System Clock Source Control Register
address_offset : 0x26 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKSEL : Clock Source SelectSelecting the system clock source faster than 32MHz(system clock source > 32MHz ) is prohibit when SCKDIVCR.ICK[2:0] bits select the division-by-1 and MEMWAIT.MEMWAIT =0.
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

HOCO

#001 : 001

MOCO

#010 : 010

LOCO

#011 : 011

Main clock oscillator

#100 : 100

Sub-clock oscillator

#101 : 101

PLL

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

VBTBKR[115]

VBATT Backup Register [%s]
address_offset : 0x2630E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[116]

VBATT Backup Register [%s]
address_offset : 0x26882 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[117]

VBATT Backup Register [%s]
address_offset : 0x26DF7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[118]

VBATT Backup Register [%s]
address_offset : 0x2736D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[119]

VBATT Backup Register [%s]
address_offset : 0x278E4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[120]

VBATT Backup Register [%s]
address_offset : 0x27E5C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[6]

VBATT Backup Register [%s]
address_offset : 0x2815 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[121]

VBATT Backup Register [%s]
address_offset : 0x283D5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[122]

VBATT Backup Register [%s]
address_offset : 0x2894F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[123]

VBATT Backup Register [%s]
address_offset : 0x28ECA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[124]

VBATT Backup Register [%s]
address_offset : 0x29446 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[125]

VBATT Backup Register [%s]
address_offset : 0x299C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[126]

VBATT Backup Register [%s]
address_offset : 0x29F41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PLLCR

PLL Control Register
address_offset : 0x2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PLLSTP : PLL Stop Control
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

PLL is operating.

#1 : 1

PLL is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[127]

VBATT Backup Register [%s]
address_offset : 0x2A4C0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[128]

VBATT Backup Register [%s]
address_offset : 0x2AA40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[129]

VBATT Backup Register [%s]
address_offset : 0x2AFC1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PLLCCR2

PLL Clock Control Register2
address_offset : 0x2B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PLLMUL : PLL Frequency Multiplication Factor Select
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

#1111 : 1111

Settings prohibited.

: others

x PLLMUL[4:0] +1

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

PLODIV : PLL Output Frequency Division Ratio Select
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#00 : 00

/1.

#01 : 01

/2.

#10 : 10

/4.

#11 : 11

Setting prohibited.

End of enumeration elements list.

VBTBKR[130]

VBATT Backup Register [%s]
address_offset : 0x2B543 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[131]

VBATT Backup Register [%s]
address_offset : 0x2BAC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[132]

VBATT Backup Register [%s]
address_offset : 0x2C04A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[133]

VBATT Backup Register [%s]
address_offset : 0x2C5CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[134]

VBATT Backup Register [%s]
address_offset : 0x2CB55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[135]

VBATT Backup Register [%s]
address_offset : 0x2D0DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[7]

VBATT Backup Register [%s]
address_offset : 0x2D1C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[136]

VBATT Backup Register [%s]
address_offset : 0x2D664 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[137]

VBATT Backup Register [%s]
address_offset : 0x2DBED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[138]

VBATT Backup Register [%s]
address_offset : 0x2E177 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[139]

VBATT Backup Register [%s]
address_offset : 0x2E702 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[140]

VBATT Backup Register [%s]
address_offset : 0x2EC8E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[141]

VBATT Backup Register [%s]
address_offset : 0x2F21B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[142]

VBATT Backup Register [%s]
address_offset : 0x2F7A9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[143]

VBATT Backup Register [%s]
address_offset : 0x2FD38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCKCR

External Bus Clock Control Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BCLKDIV : EBCLK Pin Output Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

BCLK

#1 : 1

BCLK/2

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[144]

VBATT Backup Register [%s]
address_offset : 0x302C8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[145]

VBATT Backup Register [%s]
address_offset : 0x30859 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[146]

VBATT Backup Register [%s]
address_offset : 0x30DEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEMWAIT

Memory Wait Cycle Control Register
address_offset : 0x31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MEMWAIT : Memory Wait Cycle SelectNote: Writing 0 to the MEMWAIT is prohibited when SCKDIVCR.ICK selects division by 1 and SCKSCR.CKSEL[2:0] bits select thesystem clock source that is faster than 32 MHz (ICLK > 32 MHz).
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

no wait

#1 : 1

wait

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[147]

VBATT Backup Register [%s]
address_offset : 0x3137E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[148]

VBATT Backup Register [%s]
address_offset : 0x31912 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[149]

VBATT Backup Register [%s]
address_offset : 0x31EA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOSCCR

Main Clock Oscillator Control Register
address_offset : 0x32 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOSTP : Main Clock Oscillator StopNote: MOMCR register must be set before setting MOSTP to 0.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Main clock oscillator is operating.

#1 : 1

Main clock oscillator is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[8]

VBATT Backup Register [%s]
address_offset : 0x3224 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[150]

VBATT Backup Register [%s]
address_offset : 0x3243D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[151]

VBATT Backup Register [%s]
address_offset : 0x329D4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[152]

VBATT Backup Register [%s]
address_offset : 0x32F6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[153]

VBATT Backup Register [%s]
address_offset : 0x33505 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[154]

VBATT Backup Register [%s]
address_offset : 0x33A9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[155]

VBATT Backup Register [%s]
address_offset : 0x3403A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[156]

VBATT Backup Register [%s]
address_offset : 0x345D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[157]

VBATT Backup Register [%s]
address_offset : 0x34B73 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[158]

VBATT Backup Register [%s]
address_offset : 0x35111 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[159]

VBATT Backup Register [%s]
address_offset : 0x356B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[160]

VBATT Backup Register [%s]
address_offset : 0x35C50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HOCOCR

High-Speed On-Chip Oscillator Control Register
address_offset : 0x36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HCSTP : HOCO Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

HOCO is operating.

#1 : 1

HOCO is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[161]

VBATT Backup Register [%s]
address_offset : 0x361F1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[162]

VBATT Backup Register [%s]
address_offset : 0x36793 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[163]

VBATT Backup Register [%s]
address_offset : 0x36D36 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[9]

VBATT Backup Register [%s]
address_offset : 0x372D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[164]

VBATT Backup Register [%s]
address_offset : 0x372DA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[165]

VBATT Backup Register [%s]
address_offset : 0x3787F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[166]

VBATT Backup Register [%s]
address_offset : 0x37E25 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOCOCR

Middle-Speed On-Chip Oscillator Control Register
address_offset : 0x38 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MCSTP : MOCO Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

MOCO is operating.

#1 : 1

MOCO is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[167]

VBATT Backup Register [%s]
address_offset : 0x383CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[168]

VBATT Backup Register [%s]
address_offset : 0x38974 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[169]

VBATT Backup Register [%s]
address_offset : 0x38F1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[170]

VBATT Backup Register [%s]
address_offset : 0x394C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[171]

VBATT Backup Register [%s]
address_offset : 0x39A72 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[172]

VBATT Backup Register [%s]
address_offset : 0x3A01E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[173]

VBATT Backup Register [%s]
address_offset : 0x3A5CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[174]

VBATT Backup Register [%s]
address_offset : 0x3AB79 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[175]

VBATT Backup Register [%s]
address_offset : 0x3B128 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[176]

VBATT Backup Register [%s]
address_offset : 0x3B6D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[177]

VBATT Backup Register [%s]
address_offset : 0x3BC89 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSCSF

Oscillation Stabilization Flag Register
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

HOCOSF : HOCO Clock Oscillation Stabilization FlagNOTE: The HOCOSF bit value after a reset is 1 when the OFS1.HOCOEN bit is 0. It is 0 when the OFS1.HOCOEN bit is 1.
bits : 0 - -1 (0 bit)
access : read-only

Enumeration:

#0 : 0

The HOCO clock is stopped or oscillation of the HOCO clock has not yet become stable.

#1 : 1

Oscillation of the HOCO clock is stable so the clock is available for use as the system clock.

End of enumeration elements list.

MOSCSF : Main Clock Oscillation Stabilization Flag
bits : 3 - 2 (0 bit)
access : read-only

Enumeration:

#0 : 0

MOSTP = 1 (stopping the main clock oscillator) or oscillation of the main clock has not yet become stable.

#1 : 1

Oscillation of the main clock is stable so the clock is available for use as the system clock.

End of enumeration elements list.

Reserved : This bit is read as 0.
bits : 4 - 3 (0 bit)
access : read-only

PLLSF : PLL Clock Oscillation Stabilization Flag
bits : 5 - 4 (0 bit)
access : read-only

Enumeration:

#0 : 0

The PLL clock is stopped or oscillation of the PLL clock has not yet become stable.

#1 : 1

Oscillation of the PLL clock is stable so the clock is available for use as the system clock.

End of enumeration elements list.

VBTBKR[178]

VBATT Backup Register [%s]
address_offset : 0x3C23B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[10]

VBATT Backup Register [%s]
address_offset : 0x3C37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[179]

VBATT Backup Register [%s]
address_offset : 0x3C7EE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[180]

VBATT Backup Register [%s]
address_offset : 0x3CDA2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[181]

VBATT Backup Register [%s]
address_offset : 0x3D357 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[182]

VBATT Backup Register [%s]
address_offset : 0x3D90D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[183]

VBATT Backup Register [%s]
address_offset : 0x3DEC4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKOCR

Clock Out Control Register
address_offset : 0x3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CKOSEL : Clock out source select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

HOCO

#001 : 001

MOCO

#010 : 010

LOCO

#011 : 011

MOSC

#100 : 100

SOSC

: others

Setting prohibited

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 3 - 2 (0 bit)
access : read-write

CKODIV : Clock out input frequency Division Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

#000 : 000

#001 : 001

#010 : 010

#011 : 011

#100 : 100

/16

#101 : 101

/32

#110 : 110

/64

#111 : 111

/128

End of enumeration elements list.

CKOEN : Clock out enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Clock Out disable

#1 : 1

Clock Out enable

End of enumeration elements list.

VBTBKR[184]

VBATT Backup Register [%s]
address_offset : 0x3E47C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[185]

VBATT Backup Register [%s]
address_offset : 0x3EA35 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[186]

VBATT Backup Register [%s]
address_offset : 0x3EFEF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRCKCR

Trace Clock Control Register
address_offset : 0x3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRCK : Trace Clock operating frequency select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#0000 : 0000

#0001 : 0001

/2(value after reset)

#0010 : 0010

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 4 - 5 (2 bit)
access : read-write

TRCKEN : Trace Clock operating enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Operation disabled

#1 : 1

Operation enabled.

End of enumeration elements list.

VBTBKR[187]

VBATT Backup Register [%s]
address_offset : 0x3F5AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[188]

VBATT Backup Register [%s]
address_offset : 0x3FB66 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRCR

Protect Register
address_offset : 0x3FE Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRC0 : Protect Bit 0
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Writes protected.

#1 : 1

Writes not protected.

End of enumeration elements list.

PRC1 : Protect Bit 1
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Writes protected.

#1 : 1

Writes not protected.

End of enumeration elements list.

PRC3 : Protect Bit 3
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Writes protected.

#1 : 1

Writes not protected.

End of enumeration elements list.

Reserved : These bits are read as 0000. The write value should be 0000.
bits : 4 - 6 (3 bit)
access : read-write

PRKEY : PRC Key Code
bits : 8 - 14 (7 bit)
access : write-only

Enumeration:

0x5A : 0x5A

Enables writing to the PRCR register.

: others

Disables writing to the PRCR register.

End of enumeration elements list.

OSTDCR

Oscillation Stop Detection Control Register
address_offset : 0x40 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSTDIE : Oscillation Stop Detection Interrupt Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

The oscillation stop detection interrupt is disabled. Oscillation stop detection is not notified to the POEG.

#1 : 1

The oscillation stop detection interrupt is enabled. Oscillation stop detection is notified to the POEG.

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 1 - 5 (5 bit)
access : read-write

OSTDE : Oscillation Stop Detection Function Enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Oscillation stop detection function is disabled.

#1 : 1

Oscillation stop detection function is enabled.

End of enumeration elements list.

VBTBKR[189]

VBATT Backup Register [%s]
address_offset : 0x40123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[190]

VBATT Backup Register [%s]
address_offset : 0x406E1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[191]

VBATT Backup Register [%s]
address_offset : 0x40CA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYOCDCR

System Control OCD Control Register
address_offset : 0x40E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 0 - 5 (6 bit)
access : read-write

DBGEN : Debugger Enable bit
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

On-chip debugger is disabled

#1 : 1

On-chip debugger is enabled

End of enumeration elements list.

OSTDSR

Oscillation Stop Detection Status Register
address_offset : 0x41 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OSTDF : Oscillation Stop Detection Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

The main clock oscillation stop has not been detected.

#1 : 1

The main clock oscillation stop has been detected.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

RSTSR0

Reset Status Register 0
address_offset : 0x410 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORF : Power-On Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Power-on reset not detected.

#1 : 1

Power-on reset detected.

End of enumeration elements list.

LVD0RF : Voltage Monitor 0 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1.
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor 0 reset not detected.

#1 : 1

Voltage Monitor 0 reset detected.

End of enumeration elements list.

LVD1RF : Voltage Monitor 1 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1.
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor 1 reset not detected.

#1 : 1

Voltage Monitor 1 reset detected.

End of enumeration elements list.

LVD2RF : Voltage Monitor 2 Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written with 0 after the reset flag is read as 1.
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor 2 reset not detected.

#1 : 1

Voltage Monitor 2 reset detected.

End of enumeration elements list.

Reserved : These bits are read as 0000. The write value should be 0000.
bits : 4 - 6 (3 bit)
access : read-write

RSTSR2

Reset Status Register 2
address_offset : 0x411 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CWSF : Cold/Warm Start Determination FlagNote: Only 1 can be written to set the flag.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Cold start

#1 : 1

Warm start

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[192]

VBATT Backup Register [%s]
address_offset : 0x41260 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOMCR

Main Clock Oscillator Mode Oscillation Control Register
address_offset : 0x413 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODRV1 : Main Clock Oscillator Drive Capability 1 Switching
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

10 MHz to 20 MHz

#1 : 1

1 MHz to 10 MHz.

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 4 - 4 (1 bit)
access : read-write

MOSEL : Main Clock Oscillator Switching
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Resonator

#1 : 1

External clock input

End of enumeration elements list.

VBTBKR[11]

VBATT Backup Register [%s]
address_offset : 0x4142 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LVCMPCR

Voltage Monitor Circuit Control Register
address_offset : 0x417 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

Reserved : These bits are read as 00. The write value should be 00.
bits : 2 - 2 (1 bit)
access : read-write

Reserved : This bit is read as 0. The write value should be 0.
bits : 4 - 3 (0 bit)
access : read-write

LVD1E : Voltage Detection 1 Enable
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage detection 1 circuit disabled

#1 : 1

Voltage detection 1 circuit enabled

End of enumeration elements list.

LVD2E : Voltage Detection 2 Enable
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage detection 2 circuit disabled

#1 : 1

Voltage detection 2 circuit enabled

End of enumeration elements list.

LVDLVLR

Voltage Detection Level Select Register
address_offset : 0x418 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LVD1LVL : Voltage Detection 1 Level Select (Standard voltage during drop in voltage)
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

#00000 : 00000

4.29V (Vdet1_0)

#00001 : 00001

4.14V (Vdet1_1)

#00010 : 00010

4.02V (Vdet1_2)

#00011 : 00011

3.84V (Vdet1_3)

#00100 : 00100

3.10V (Vdet1_4)

#00101 : 00101

3.00V (Vdet1_5)

#00110 : 00110

2.90V (Vdet1_6)

#00111 : 00111

2.79V (Vdet1_7)

#01000 : 01000

2.68V (Vdet1_8)

#01001 : 01001

2.58V (Vdet1_9)

#01010 : 01010

2.48V (Vdet1_A)

#01011 : 01011

2.20V (Vdet1_B)

#01100 : 01100

1.96V (Vdet1_C)

#01101 : 01101

1.86V (Vdet1_D)

#01110 : 01110

1.75V (Vdet1_E)

#01111 : 01111

1.65V (Vdet1_F)

: others

Setting prohibited

End of enumeration elements list.

LVD2LVL : Voltage Detection 2 Level Select (Standard voltage during drop in voltage)
bits : 5 - 6 (2 bit)
access : read-write

Enumeration:

#000 : 000

4.29V (Vdet2_0)

#001 : 001

4.14V (Vdet2_1)

#010 : 010

4.02V (Vdet2_2)

#011 : 011

3.84V (Vdet2_3)

: others

Setting prohibited.

End of enumeration elements list.

VBTBKR[193]

VBATT Backup Register [%s]
address_offset : 0x41821 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LVD1CR0

Voltage Monitor %s Circuit Control Register 0
address_offset : 0x41A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RIE : Voltage Monitor Interrupt/Reset Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

CMPE : Voltage Monitor Circuit Comparison Result Output Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor circuit comparison result output disabled.

#1 : 1

Voltage Monitor circuit comparison result output enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 3 - 4 (2 bit)
access : read-write

RI : Voltage Monitor Circuit Mode Select
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor interrupt during Vdet1 passage

#1 : 1

Voltage Monitor reset enabled when the voltage falls to and below Vdet1

End of enumeration elements list.

RN : Voltage Monitor Reset Negate Select
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Negation follows a stabilization time (tLVD) after VCC > Vdet1 is detected.

#1 : 1

Negation follows a stabilization time (tLVD) after assertion of the LVD reset.

End of enumeration elements list.

LVD2CR0

Voltage Monitor %s Circuit Control Register 0
address_offset : 0x41B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RIE : Voltage Monitor Interrupt/Reset Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disabled

#1 : 1

Enabled

End of enumeration elements list.

CMPE : Voltage Monitor Circuit Comparison Result Output Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor circuit comparison result output disabled.

#1 : 1

Voltage Monitor circuit comparison result output enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 3 - 4 (2 bit)
access : read-write

RI : Voltage Monitor Circuit Mode Select
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Voltage Monitor interrupt during Vdet1 passage

#1 : 1

Voltage Monitor reset enabled when the voltage falls to and below Vdet1

End of enumeration elements list.

RN : Voltage Monitor Reset Negate Select
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Negation follows a stabilization time (tLVD) after VCC > Vdet1 is detected.

#1 : 1

Negation follows a stabilization time (tLVD) after assertion of the LVD reset.

End of enumeration elements list.

VBTBKR[194]

VBATT Backup Register [%s]
address_offset : 0x41DE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTCR1

VBATT Control Register1
address_offset : 0x41F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BPWSWSTP : Battery Power supply Switch Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Battery Power supply Switch Enable

#1 : 1

Battery Power supply Switch stop

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[195]

VBATT Backup Register [%s]
address_offset : 0x423A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[196]

VBATT Backup Register [%s]
address_offset : 0x4296A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[197]

VBATT Backup Register [%s]
address_offset : 0x42F2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[198]

VBATT Backup Register [%s]
address_offset : 0x434F5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[199]

VBATT Backup Register [%s]
address_offset : 0x43ABC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[200]

VBATT Backup Register [%s]
address_offset : 0x44084 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[201]

VBATT Backup Register [%s]
address_offset : 0x4464D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[202]

VBATT Backup Register [%s]
address_offset : 0x44C17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[203]

VBATT Backup Register [%s]
address_offset : 0x451E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[204]

VBATT Backup Register [%s]
address_offset : 0x457AE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[205]

VBATT Backup Register [%s]
address_offset : 0x45D7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[206]

VBATT Backup Register [%s]
address_offset : 0x46349 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[12]

VBATT Backup Register [%s]
address_offset : 0x464E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[207]

VBATT Backup Register [%s]
address_offset : 0x46918 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[208]

VBATT Backup Register [%s]
address_offset : 0x46EE8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[209]

VBATT Backup Register [%s]
address_offset : 0x474B9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[210]

VBATT Backup Register [%s]
address_offset : 0x47A8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOSCCR

Sub-Clock Oscillator Control Register
address_offset : 0x480 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOSTP : Sub-Clock Oscillator Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Sub-clock oscillator is operating.

#1 : 1

Sub-clock oscillator is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[211]

VBATT Backup Register [%s]
address_offset : 0x4805E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOMCR

Sub Clock Oscillator Mode Control Register
address_offset : 0x481 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SODRV : Sub-Clock Oscillator Drive Capability Switching
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

Normal mode

#01 : 01

Low power mode 1

#10 : 10

Low power mode 2

#11 : 11

Low power mode 3.

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

VBTBKR[212]

VBATT Backup Register [%s]
address_offset : 0x48632 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[213]

VBATT Backup Register [%s]
address_offset : 0x48C07 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCOCR

Low-Speed On-Chip Oscillator Control Register
address_offset : 0x490 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCSTP : LOCO Stop
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

LOCO is operating.

#1 : 1

LOCO is stopped.

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[214]

VBATT Backup Register [%s]
address_offset : 0x491DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCOUTCR

LOCO User Trimming Control Register
address_offset : 0x492 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LOCOUTRM : LOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original LOCO trimming bits
bits : 0 - 6 (7 bit)
access : read-write

VBTBKR[215]

VBATT Backup Register [%s]
address_offset : 0x497B4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[216]

VBATT Backup Register [%s]
address_offset : 0x49D8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[217]

VBATT Backup Register [%s]
address_offset : 0x4A365 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[218]

VBATT Backup Register [%s]
address_offset : 0x4A93F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[219]

VBATT Backup Register [%s]
address_offset : 0x4AF1A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTCR2

VBATT Control Register2
address_offset : 0x4B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTLVDEN : VBATT Pin Low Voltage Detect Enable Bit
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT pin low voltage detect disable

#1 : 1

VBATT pin low voltage detect enable

End of enumeration elements list.

Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write

VBTLVDLVL : VBATT Pin Voltage Low Voltage Detect Level Select Bit
bits : 6 - 6 (1 bit)
access : read-write

Enumeration:

#00 : 00

2.7V

#01 : 01

Setting prohibited

#10 : 10

2.3V

#11 : 11

2.1V

End of enumeration elements list.

VBTSR

VBATT Status Register
address_offset : 0x4B1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTRDF : VBAT_R Reset Detect Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT_R voltage power-on reset not detected

#1 : 1

VBATT_R selected voltage power-on reset detected.

End of enumeration elements list.

VBTBLDF : VBATT Battery Low voltage Detect Flag
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT pin low voltage not detected

#1 : 1

VBATT pin low voltage detected.

End of enumeration elements list.

VBTRVLD : VBATT_R Valid
bits : 4 - 3 (0 bit)
access : read-only

Enumeration:

#0 : 0

VBATT_R area not valid

#1 : 1

VBATT_R area valid

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTCMPCR

VBATT Comparator Control Register
address_offset : 0x4B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTCMPE : VBATT pin low voltage detect circuit output enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT pin low voltage detect circuit output disabled

#1 : 1

VBATT pin low voltage detect circuit output enabled

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTLVDICR

VBATT Pin Low Voltage Detect Interrupt Control Register
address_offset : 0x4B4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTLVDIE : VBATT Pin Low Voltage Detect Interrupt Enable bit
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT Pin Low Voltage Detect Interrupt Disable

#1 : 1

VBATT Pin Low Voltage Detect Interrupt Enable

End of enumeration elements list.

VBTLVDISEL : Pin Low Voltage Detect Interrupt Select bit
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Non Maskable Interrupt

#1 : 1

Maskable Interrupt

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

VBTBKR[220]

VBATT Backup Register [%s]
address_offset : 0x4B4F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[13]

VBATT Backup Register [%s]
address_offset : 0x4B5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTWCTLR

VBATT Wakeup function Control Register
address_offset : 0x4B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VWEN : VBATT wakeup enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable Wakeup function

#1 : 1

Enable Wakeup function

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTWCH0OTSR

VBATT Wakeup I/O 0 Output Trigger Select Register
address_offset : 0x4B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0VCH1TE : VBATWIO0 Output VBATWIO1 Trigger Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 0 output trigger by the VBATWIO1 pin is disabled

#1 : 1

VBATT wakeup I/O 0 output trigger by the VBATWIO1 pin is enabled.

End of enumeration elements list.

CH0VCH2TE : VBATWIO0 Output VBATWIO2 Trigger Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 0 output trigger by the VBATWIO2 pin is disabled

#1 : 1

VBATT wakeup I/O 0 output trigger by the VBATWIO2 pin is enabled.

End of enumeration elements list.

CH0VRTCTE : VBATWIO0 Output RTC Periodic Signal Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 0 output trigger by the RTC periodic signal is disabled

#1 : 1

VBATT wakeup I/O 0 output trigger by the RTC periodic signal is enabled.

End of enumeration elements list.

CH0VRTCATE : VBATWIO0 Output RTC Alarm Signal Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 0 output trigger by the RTC alarm signal is disabled

#1 : 1

VBATT wakeup I/O 0 output trigger by the RTC alarm signal is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTWCH1OTSR

VBATT Wakeup I/O 1 Output Trigger Select Register
address_offset : 0x4B9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1VCH0TE : VBATWIO1 Output VBATWIO0 Trigger Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 1 output trigger by the VBATWIO0 pin is disabled

#1 : 1

VBATT wakeup I/O 1 output trigger by the VBATWIO0 pin is enabled.

End of enumeration elements list.

CH1VCH2TE : VBATWIO1 Output VBATWIO2 Trigger Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 1 output trigger by the VBATWIO2 pin is disabled

#1 : 1

VBATT wakeup I/O 1 output trigger by the VBATWIO2 pin is enabled.

End of enumeration elements list.

CH1VRTCTE : VBATWIO1 Output RTC Periodic Signal Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 1 output trigger by the RTC periodic signal is disabled

#1 : 1

VBATT wakeup I/O 1 output trigger by the RTC periodic signal is enabled

End of enumeration elements list.

CH1VRTCATE : VBATWIO1 Output RTC Alarm Signal Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 1 output trigger by the RTC alarm signal is disabled

#1 : 1

VBATT wakeup I/O 1 output trigger by the RTC alarm signal is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTWCH2OTSR

VBATT Wakeup I/O 2 Output Trigger Select Register
address_offset : 0x4BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2VCH0TE : VBATWIO2 Output VBATWIO0 Trigger Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 2 output trigger by the VBATWIO0 pin is disabled

#1 : 1

VBATT wakeup I/O 2 output trigger by the VBATWIO0 pin is enabled.

End of enumeration elements list.

CH2VCH1TE : VBATWIO2 Output VBATWIO1 Trigger Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 2 output trigger by the VBATWIO1 pin is disabled

#1 : 1

VBATT wakeup I/O 2 output trigger by the VBATWIO1 pin is enabled.

End of enumeration elements list.

CH2VRTCTE : VBATWIO2 Output RTC Periodic Signal Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 2 output trigger by the RTC periodic signal is disabled

#1 : 1

VBATT wakeup I/O 2 output trigger by the RTC periodic signal is enabled.

End of enumeration elements list.

CH2VRTCATE : VBATWIO2 Output RTC Alarm Signal Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup I/O 2 output trigger by the RTC alarm signal is disabled

#1 : 1

VBATT wakeup I/O 2 output trigger by the RTC alarm signal is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTBKR[221]

VBATT Backup Register [%s]
address_offset : 0x4BAD3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTICTLR

VBATT Input Control Register
address_offset : 0x4BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VCH0INEN : VBATT Wakeup I/O 0 Input Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO0, RTCIC0 inputs disabled

#1 : 1

VBATWIO0, RTCIC0 inputs enabled.

End of enumeration elements list.

VCH1INEN : VBATT Wakeup I/O 1 Input Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO1, RTCIC1 inputs disabled

#1 : 1

VBATWIO1, RTCIC1 inputs enabled.

End of enumeration elements list.

VCH2INEN : VBATT Wakeup I/O 2 Input Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO2 and RTCIC2 inputs disabled

#1 : 1

VBATWIO2 and RTCIC2 inputs enabled.

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

VBTOCTLR

VBATT Output Control Register
address_offset : 0x4BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VCH0OEN : VBATT Wakeup I/O 0 Output Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO0 output disabled

#1 : 1

VBATWIO0 output enabled

End of enumeration elements list.

VCH1OEN : VBATT Wakeup I/O 1 Output Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO1 output disabled

#1 : 1

VBATWIO1 output enabled

End of enumeration elements list.

VCH2OEN : VBATT Wakeup I/O 2 Output Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATWIO2 output disabled

#1 : 1

VBATWIO2 output enabled

End of enumeration elements list.

VOUT0LSEL : VBATT Wakeup I/O 0 Output Level Selection
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Output L before VBATT wakeup trigger

#1 : 1

Output H before VBATT wakeup trigger

End of enumeration elements list.

VCOU1LSEL : VBATT Wakeup I/O 1 Output Level Selection
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Output L before VBATT wake up trigger

#1 : 1

Output H before VBATT wake up trigger

End of enumeration elements list.

VOUT2LSEL : VBATT Wakeup I/O 2 Output Level Selection
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

Output L before VBATT wake up trigger

#1 : 1

Output H before VBATT wake up trigger

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 6 - 6 (1 bit)
access : read-write

VBTWTER

VBATT Wakeup Trigger source Enable Register
address_offset : 0x4BD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VCH0E : VBATWIO0 Pin Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup triggered by the VBATWIO0 pin is disabled

#1 : 1

VBATT wakeup triggered by the VBATWIO0 pin is enabled.

End of enumeration elements list.

VCH1E : VBATWIO1 Pin Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup triggered by the VBATWIO1 pin is disabled

#1 : 1

VBATT wakeup triggered by the VBATWIO1 pin is enabled.

End of enumeration elements list.

VCH2E : VBATWIO2 Pin Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup triggered by the VBATWIO2 pin is disabled

#1 : 1

VBATT wakeup triggered by the VBATWIO2 pin is enabled.

End of enumeration elements list.

VRTCIE : RTC Periodic Signal Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup triggered by RTC periodic signal is disabled

#1 : 1

VBATT wakeup triggered by RTC periodic signal is enabled.

End of enumeration elements list.

VRTCAE : RTC Alarm Signal Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

VBATT wakeup triggered by RTC alarm signal is disabled

#1 : 1

VBATT wakeup triggered by RTC alarm signal is enabled.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTWEGR

VBATT Wakeup Trigger source Edge Register
address_offset : 0x4BE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VCH0EG : VBATWIO0 Wakeup Trigger Source Edge Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Wakeup trigger is generated at a falling edge

#1 : 1

Wakeup trigger is generated at a rising edge.

End of enumeration elements list.

VCH1EG : VBATWIO1 Wakeup Trigger Source Edge Select
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Wakeup trigger is generated at a falling edge

#1 : 1

Wakeup trigger is generated at a rising edge.

End of enumeration elements list.

VCH2EG : VBATWIO2 Wakeup Trigger Source Edge Select
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Wakeup trigger is generated at a falling edge

#1 : 1

Wakeup trigger is generated at a rising edge.

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

VBTWFR

VBATT Wakeup trigger source Flag Register
address_offset : 0x4BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VCH0F : VBATWIO0 Wakeup Trigger Flag
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup trigger by the VBATWIO0 pin is generated

#1 : 1

A wakeup trigger by the VBATWIO0 pin is generated

End of enumeration elements list.

VCH1F : VBATWIO1 Wakeup Trigger Flag
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup trigger by the VBATWIO1 pin is generated

#1 : 1

A wakeup trigger by the VBATWIO1 pin is generated

End of enumeration elements list.

VCH2F : VBATWIO2 Wakeup Trigger Flag
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup trigger by the VBATWIO2 pin is generated

#1 : 1

A wakeup trigger by the VBATWIO2 pin is generated

End of enumeration elements list.

VRTCIF : VBATT RTC-Interval Wakeup Trigger Flag
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup trigger by the RTC interval is generated

#1 : 1

A wakeup trigger by the RTC interval is generated

End of enumeration elements list.

VRTCAF : VBATT RTC-Alarm Wakeup Trigger Flag
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

No wakeup trigger by the RTC alarm is generated

#1 : 1

A wakeup trigger by the RTC alarm is generated

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTBKR[222]

VBATT Backup Register [%s]
address_offset : 0x4C0B1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[223]

VBATT Backup Register [%s]
address_offset : 0x4C690 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[224]

VBATT Backup Register [%s]
address_offset : 0x4CC70 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[225]

VBATT Backup Register [%s]
address_offset : 0x4D251 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[226]

VBATT Backup Register [%s]
address_offset : 0x4D833 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[227]

VBATT Backup Register [%s]
address_offset : 0x4DE16 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[228]

VBATT Backup Register [%s]
address_offset : 0x4E3FA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[229]

VBATT Backup Register [%s]
address_offset : 0x4E9DF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[230]

VBATT Backup Register [%s]
address_offset : 0x4EFC5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[231]

VBATT Backup Register [%s]
address_offset : 0x4F5AC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[232]

VBATT Backup Register [%s]
address_offset : 0x4FB94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SLCDSCKCR

Segment LCD Source Clock Control Register
address_offset : 0x50 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LCDSCKSEL : LCD Source Clock (LCDSRCCLK) Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

LOCO

#001 : 001

SOSC

#010 : 010

MOSC

#100 : 100

HOCO

: others

Settings other than above are prohibited.

End of enumeration elements list.

Reserved : These bits are read as 0000. The write value should be 0000.
bits : 3 - 5 (3 bit)
access : read-write

LCDSCKEN : LCD Source Clock Out Enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

LCD source clock out disabled

#1 : 1

LCD source clock out enabled.

End of enumeration elements list.

VBTBKR0

VBATT Backup Register [%s]
address_offset : 0x500 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR1

VBATT Backup Register [%s]
address_offset : 0x501 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[233]

VBATT Backup Register [%s]
address_offset : 0x5017D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR2

VBATT Backup Register [%s]
address_offset : 0x502 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR3

VBATT Backup Register [%s]
address_offset : 0x503 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR4

VBATT Backup Register [%s]
address_offset : 0x504 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR5

VBATT Backup Register [%s]
address_offset : 0x505 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR6

VBATT Backup Register [%s]
address_offset : 0x506 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[14]

VBATT Backup Register [%s]
address_offset : 0x5069 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR7

VBATT Backup Register [%s]
address_offset : 0x507 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[234]

VBATT Backup Register [%s]
address_offset : 0x50767 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR8

VBATT Backup Register [%s]
address_offset : 0x508 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR9

VBATT Backup Register [%s]
address_offset : 0x509 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR10

VBATT Backup Register [%s]
address_offset : 0x50A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR11

VBATT Backup Register [%s]
address_offset : 0x50B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR12

VBATT Backup Register [%s]
address_offset : 0x50C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR13

VBATT Backup Register [%s]
address_offset : 0x50D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[235]

VBATT Backup Register [%s]
address_offset : 0x50D52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR14

VBATT Backup Register [%s]
address_offset : 0x50E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR15

VBATT Backup Register [%s]
address_offset : 0x50F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR16

VBATT Backup Register [%s]
address_offset : 0x510 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR17

VBATT Backup Register [%s]
address_offset : 0x511 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR18

VBATT Backup Register [%s]
address_offset : 0x512 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR19

VBATT Backup Register [%s]
address_offset : 0x513 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[236]

VBATT Backup Register [%s]
address_offset : 0x5133E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR20

VBATT Backup Register [%s]
address_offset : 0x514 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR21

VBATT Backup Register [%s]
address_offset : 0x515 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR22

VBATT Backup Register [%s]
address_offset : 0x516 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR23

VBATT Backup Register [%s]
address_offset : 0x517 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR24

VBATT Backup Register [%s]
address_offset : 0x518 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR25

VBATT Backup Register [%s]
address_offset : 0x519 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[237]

VBATT Backup Register [%s]
address_offset : 0x5192B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR26

VBATT Backup Register [%s]
address_offset : 0x51A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR27

VBATT Backup Register [%s]
address_offset : 0x51B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR28

VBATT Backup Register [%s]
address_offset : 0x51C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR29

VBATT Backup Register [%s]
address_offset : 0x51D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR30

VBATT Backup Register [%s]
address_offset : 0x51E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR31

VBATT Backup Register [%s]
address_offset : 0x51F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[238]

VBATT Backup Register [%s]
address_offset : 0x51F19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EBCKOCR

External Bus Clock Output Control Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EBCKOEN : EBCLK Pin Output Control
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

BCLK pin output is disabled. (Fixed high)

#1 : 1

BCLK pin output is enabled

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR32

VBATT Backup Register [%s]
address_offset : 0x520 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR33

VBATT Backup Register [%s]
address_offset : 0x521 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR34

VBATT Backup Register [%s]
address_offset : 0x522 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR35

VBATT Backup Register [%s]
address_offset : 0x523 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR36

VBATT Backup Register [%s]
address_offset : 0x524 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR37

VBATT Backup Register [%s]
address_offset : 0x525 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[239]

VBATT Backup Register [%s]
address_offset : 0x52508 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR38

VBATT Backup Register [%s]
address_offset : 0x526 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR39

VBATT Backup Register [%s]
address_offset : 0x527 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR40

VBATT Backup Register [%s]
address_offset : 0x528 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR41

VBATT Backup Register [%s]
address_offset : 0x529 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR42

VBATT Backup Register [%s]
address_offset : 0x52A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[240]

VBATT Backup Register [%s]
address_offset : 0x52AF8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR43

VBATT Backup Register [%s]
address_offset : 0x52B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR44

VBATT Backup Register [%s]
address_offset : 0x52C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR45

VBATT Backup Register [%s]
address_offset : 0x52D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR46

VBATT Backup Register [%s]
address_offset : 0x52E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR47

VBATT Backup Register [%s]
address_offset : 0x52F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR48

VBATT Backup Register [%s]
address_offset : 0x530 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[241]

VBATT Backup Register [%s]
address_offset : 0x530E9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR49

VBATT Backup Register [%s]
address_offset : 0x531 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR50

VBATT Backup Register [%s]
address_offset : 0x532 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR51

VBATT Backup Register [%s]
address_offset : 0x533 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR52

VBATT Backup Register [%s]
address_offset : 0x534 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR53

VBATT Backup Register [%s]
address_offset : 0x535 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR54

VBATT Backup Register [%s]
address_offset : 0x536 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[242]

VBATT Backup Register [%s]
address_offset : 0x536DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR55

VBATT Backup Register [%s]
address_offset : 0x537 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR56

VBATT Backup Register [%s]
address_offset : 0x538 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR57

VBATT Backup Register [%s]
address_offset : 0x539 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR58

VBATT Backup Register [%s]
address_offset : 0x53A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR59

VBATT Backup Register [%s]
address_offset : 0x53B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR60

VBATT Backup Register [%s]
address_offset : 0x53C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[243]

VBATT Backup Register [%s]
address_offset : 0x53CCE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR61

VBATT Backup Register [%s]
address_offset : 0x53D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR62

VBATT Backup Register [%s]
address_offset : 0x53E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR63

VBATT Backup Register [%s]
address_offset : 0x53F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR64

VBATT Backup Register [%s]
address_offset : 0x540 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR65

VBATT Backup Register [%s]
address_offset : 0x541 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR66

VBATT Backup Register [%s]
address_offset : 0x542 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[244]

VBATT Backup Register [%s]
address_offset : 0x542C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR67

VBATT Backup Register [%s]
address_offset : 0x543 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR68

VBATT Backup Register [%s]
address_offset : 0x544 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR69

VBATT Backup Register [%s]
address_offset : 0x545 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR70

VBATT Backup Register [%s]
address_offset : 0x546 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR71

VBATT Backup Register [%s]
address_offset : 0x547 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR72

VBATT Backup Register [%s]
address_offset : 0x548 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[245]

VBATT Backup Register [%s]
address_offset : 0x548B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR73

VBATT Backup Register [%s]
address_offset : 0x549 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR74

VBATT Backup Register [%s]
address_offset : 0x54A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR75

VBATT Backup Register [%s]
address_offset : 0x54B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR76

VBATT Backup Register [%s]
address_offset : 0x54C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR77

VBATT Backup Register [%s]
address_offset : 0x54D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR78

VBATT Backup Register [%s]
address_offset : 0x54E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[246]

VBATT Backup Register [%s]
address_offset : 0x54EAD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR79

VBATT Backup Register [%s]
address_offset : 0x54F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR80

VBATT Backup Register [%s]
address_offset : 0x550 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR81

VBATT Backup Register [%s]
address_offset : 0x551 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR82

VBATT Backup Register [%s]
address_offset : 0x552 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR83

VBATT Backup Register [%s]
address_offset : 0x553 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR84

VBATT Backup Register [%s]
address_offset : 0x554 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[247]

VBATT Backup Register [%s]
address_offset : 0x554A4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR85

VBATT Backup Register [%s]
address_offset : 0x555 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR86

VBATT Backup Register [%s]
address_offset : 0x556 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR87

VBATT Backup Register [%s]
address_offset : 0x557 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[15]

VBATT Backup Register [%s]
address_offset : 0x5578 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR88

VBATT Backup Register [%s]
address_offset : 0x558 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR89

VBATT Backup Register [%s]
address_offset : 0x559 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR90

VBATT Backup Register [%s]
address_offset : 0x55A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[248]

VBATT Backup Register [%s]
address_offset : 0x55A9C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR91

VBATT Backup Register [%s]
address_offset : 0x55B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR92

VBATT Backup Register [%s]
address_offset : 0x55C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR93

VBATT Backup Register [%s]
address_offset : 0x55D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR94

VBATT Backup Register [%s]
address_offset : 0x55E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR95

VBATT Backup Register [%s]
address_offset : 0x55F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR96

VBATT Backup Register [%s]
address_offset : 0x560 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[249]

VBATT Backup Register [%s]
address_offset : 0x56095 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR97

VBATT Backup Register [%s]
address_offset : 0x561 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR98

VBATT Backup Register [%s]
address_offset : 0x562 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR99

VBATT Backup Register [%s]
address_offset : 0x563 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR100

VBATT Backup Register [%s]
address_offset : 0x564 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR101

VBATT Backup Register [%s]
address_offset : 0x565 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR102

VBATT Backup Register [%s]
address_offset : 0x566 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[250]

VBATT Backup Register [%s]
address_offset : 0x5668F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR103

VBATT Backup Register [%s]
address_offset : 0x567 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR104

VBATT Backup Register [%s]
address_offset : 0x568 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR105

VBATT Backup Register [%s]
address_offset : 0x569 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR106

VBATT Backup Register [%s]
address_offset : 0x56A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR107

VBATT Backup Register [%s]
address_offset : 0x56B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR108

VBATT Backup Register [%s]
address_offset : 0x56C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[251]

VBATT Backup Register [%s]
address_offset : 0x56C8A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR109

VBATT Backup Register [%s]
address_offset : 0x56D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR110

VBATT Backup Register [%s]
address_offset : 0x56E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR111

VBATT Backup Register [%s]
address_offset : 0x56F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR112

VBATT Backup Register [%s]
address_offset : 0x570 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR113

VBATT Backup Register [%s]
address_offset : 0x571 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR114

VBATT Backup Register [%s]
address_offset : 0x572 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[252]

VBATT Backup Register [%s]
address_offset : 0x57286 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR115

VBATT Backup Register [%s]
address_offset : 0x573 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR116

VBATT Backup Register [%s]
address_offset : 0x574 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR117

VBATT Backup Register [%s]
address_offset : 0x575 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR118

VBATT Backup Register [%s]
address_offset : 0x576 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR119

VBATT Backup Register [%s]
address_offset : 0x577 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR120

VBATT Backup Register [%s]
address_offset : 0x578 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[253]

VBATT Backup Register [%s]
address_offset : 0x57883 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR121

VBATT Backup Register [%s]
address_offset : 0x579 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR122

VBATT Backup Register [%s]
address_offset : 0x57A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR123

VBATT Backup Register [%s]
address_offset : 0x57B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR124

VBATT Backup Register [%s]
address_offset : 0x57C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR125

VBATT Backup Register [%s]
address_offset : 0x57D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR126

VBATT Backup Register [%s]
address_offset : 0x57E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[254]

VBATT Backup Register [%s]
address_offset : 0x57E81 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR127

VBATT Backup Register [%s]
address_offset : 0x57F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR128

VBATT Backup Register [%s]
address_offset : 0x580 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR129

VBATT Backup Register [%s]
address_offset : 0x581 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR130

VBATT Backup Register [%s]
address_offset : 0x582 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR131

VBATT Backup Register [%s]
address_offset : 0x583 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR132

VBATT Backup Register [%s]
address_offset : 0x584 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[255]

VBATT Backup Register [%s]
address_offset : 0x58480 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR133

VBATT Backup Register [%s]
address_offset : 0x585 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR134

VBATT Backup Register [%s]
address_offset : 0x586 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR135

VBATT Backup Register [%s]
address_offset : 0x587 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR136

VBATT Backup Register [%s]
address_offset : 0x588 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR137

VBATT Backup Register [%s]
address_offset : 0x589 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR138

VBATT Backup Register [%s]
address_offset : 0x58A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[256]

VBATT Backup Register [%s]
address_offset : 0x58A80 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR139

VBATT Backup Register [%s]
address_offset : 0x58B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR140

VBATT Backup Register [%s]
address_offset : 0x58C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR141

VBATT Backup Register [%s]
address_offset : 0x58D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR142

VBATT Backup Register [%s]
address_offset : 0x58E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR143

VBATT Backup Register [%s]
address_offset : 0x58F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR144

VBATT Backup Register [%s]
address_offset : 0x590 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[257]

VBATT Backup Register [%s]
address_offset : 0x59081 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR145

VBATT Backup Register [%s]
address_offset : 0x591 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR146

VBATT Backup Register [%s]
address_offset : 0x592 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR147

VBATT Backup Register [%s]
address_offset : 0x593 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR148

VBATT Backup Register [%s]
address_offset : 0x594 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR149

VBATT Backup Register [%s]
address_offset : 0x595 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR150

VBATT Backup Register [%s]
address_offset : 0x596 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[258]

VBATT Backup Register [%s]
address_offset : 0x59683 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR151

VBATT Backup Register [%s]
address_offset : 0x597 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR152

VBATT Backup Register [%s]
address_offset : 0x598 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR153

VBATT Backup Register [%s]
address_offset : 0x599 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR154

VBATT Backup Register [%s]
address_offset : 0x59A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR155

VBATT Backup Register [%s]
address_offset : 0x59B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR156

VBATT Backup Register [%s]
address_offset : 0x59C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[259]

VBATT Backup Register [%s]
address_offset : 0x59C86 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR157

VBATT Backup Register [%s]
address_offset : 0x59D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR158

VBATT Backup Register [%s]
address_offset : 0x59E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR159

VBATT Backup Register [%s]
address_offset : 0x59F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR160

VBATT Backup Register [%s]
address_offset : 0x5A0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR161

VBATT Backup Register [%s]
address_offset : 0x5A1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR162

VBATT Backup Register [%s]
address_offset : 0x5A2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[260]

VBATT Backup Register [%s]
address_offset : 0x5A28A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR163

VBATT Backup Register [%s]
address_offset : 0x5A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR164

VBATT Backup Register [%s]
address_offset : 0x5A4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR165

VBATT Backup Register [%s]
address_offset : 0x5A5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR166

VBATT Backup Register [%s]
address_offset : 0x5A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR167

VBATT Backup Register [%s]
address_offset : 0x5A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR168

VBATT Backup Register [%s]
address_offset : 0x5A8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[16]

VBATT Backup Register [%s]
address_offset : 0x5A88 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[261]

VBATT Backup Register [%s]
address_offset : 0x5A88F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR169

VBATT Backup Register [%s]
address_offset : 0x5A9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR170

VBATT Backup Register [%s]
address_offset : 0x5AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR171

VBATT Backup Register [%s]
address_offset : 0x5AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR172

VBATT Backup Register [%s]
address_offset : 0x5AC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR173

VBATT Backup Register [%s]
address_offset : 0x5AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR174

VBATT Backup Register [%s]
address_offset : 0x5AE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[262]

VBATT Backup Register [%s]
address_offset : 0x5AE95 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR175

VBATT Backup Register [%s]
address_offset : 0x5AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR176

VBATT Backup Register [%s]
address_offset : 0x5B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR177

VBATT Backup Register [%s]
address_offset : 0x5B1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR178

VBATT Backup Register [%s]
address_offset : 0x5B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR179

VBATT Backup Register [%s]
address_offset : 0x5B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR180

VBATT Backup Register [%s]
address_offset : 0x5B4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[263]

VBATT Backup Register [%s]
address_offset : 0x5B49C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR181

VBATT Backup Register [%s]
address_offset : 0x5B5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR182

VBATT Backup Register [%s]
address_offset : 0x5B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR183

VBATT Backup Register [%s]
address_offset : 0x5B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR184

VBATT Backup Register [%s]
address_offset : 0x5B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR185

VBATT Backup Register [%s]
address_offset : 0x5B9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR186

VBATT Backup Register [%s]
address_offset : 0x5BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[264]

VBATT Backup Register [%s]
address_offset : 0x5BAA4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR187

VBATT Backup Register [%s]
address_offset : 0x5BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR188

VBATT Backup Register [%s]
address_offset : 0x5BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR189

VBATT Backup Register [%s]
address_offset : 0x5BD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR190

VBATT Backup Register [%s]
address_offset : 0x5BE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR191

VBATT Backup Register [%s]
address_offset : 0x5BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR192

VBATT Backup Register [%s]
address_offset : 0x5C0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[265]

VBATT Backup Register [%s]
address_offset : 0x5C0AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR193

VBATT Backup Register [%s]
address_offset : 0x5C1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR194

VBATT Backup Register [%s]
address_offset : 0x5C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR195

VBATT Backup Register [%s]
address_offset : 0x5C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR196

VBATT Backup Register [%s]
address_offset : 0x5C4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR197

VBATT Backup Register [%s]
address_offset : 0x5C5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR198

VBATT Backup Register [%s]
address_offset : 0x5C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[266]

VBATT Backup Register [%s]
address_offset : 0x5C6B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR199

VBATT Backup Register [%s]
address_offset : 0x5C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR200

VBATT Backup Register [%s]
address_offset : 0x5C8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR201

VBATT Backup Register [%s]
address_offset : 0x5C9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR202

VBATT Backup Register [%s]
address_offset : 0x5CA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR203

VBATT Backup Register [%s]
address_offset : 0x5CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR204

VBATT Backup Register [%s]
address_offset : 0x5CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[267]

VBATT Backup Register [%s]
address_offset : 0x5CCC2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR205

VBATT Backup Register [%s]
address_offset : 0x5CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR206

VBATT Backup Register [%s]
address_offset : 0x5CE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR207

VBATT Backup Register [%s]
address_offset : 0x5CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR208

VBATT Backup Register [%s]
address_offset : 0x5D0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR209

VBATT Backup Register [%s]
address_offset : 0x5D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR210

VBATT Backup Register [%s]
address_offset : 0x5D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[268]

VBATT Backup Register [%s]
address_offset : 0x5D2CE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR211

VBATT Backup Register [%s]
address_offset : 0x5D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR212

VBATT Backup Register [%s]
address_offset : 0x5D4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR213

VBATT Backup Register [%s]
address_offset : 0x5D5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR214

VBATT Backup Register [%s]
address_offset : 0x5D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR215

VBATT Backup Register [%s]
address_offset : 0x5D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR216

VBATT Backup Register [%s]
address_offset : 0x5D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[269]

VBATT Backup Register [%s]
address_offset : 0x5D8DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR217

VBATT Backup Register [%s]
address_offset : 0x5D9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR218

VBATT Backup Register [%s]
address_offset : 0x5DA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR219

VBATT Backup Register [%s]
address_offset : 0x5DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR220

VBATT Backup Register [%s]
address_offset : 0x5DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR221

VBATT Backup Register [%s]
address_offset : 0x5DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR222

VBATT Backup Register [%s]
address_offset : 0x5DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[270]

VBATT Backup Register [%s]
address_offset : 0x5DEE9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR223

VBATT Backup Register [%s]
address_offset : 0x5DF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR224

VBATT Backup Register [%s]
address_offset : 0x5E0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR225

VBATT Backup Register [%s]
address_offset : 0x5E1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR226

VBATT Backup Register [%s]
address_offset : 0x5E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR227

VBATT Backup Register [%s]
address_offset : 0x5E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR228

VBATT Backup Register [%s]
address_offset : 0x5E4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[271]

VBATT Backup Register [%s]
address_offset : 0x5E4F8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR229

VBATT Backup Register [%s]
address_offset : 0x5E5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR230

VBATT Backup Register [%s]
address_offset : 0x5E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR231

VBATT Backup Register [%s]
address_offset : 0x5E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR232

VBATT Backup Register [%s]
address_offset : 0x5E8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR233

VBATT Backup Register [%s]
address_offset : 0x5E9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR234

VBATT Backup Register [%s]
address_offset : 0x5EA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR235

VBATT Backup Register [%s]
address_offset : 0x5EB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[272]

VBATT Backup Register [%s]
address_offset : 0x5EB08 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR236

VBATT Backup Register [%s]
address_offset : 0x5EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR237

VBATT Backup Register [%s]
address_offset : 0x5ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR238

VBATT Backup Register [%s]
address_offset : 0x5EE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR239

VBATT Backup Register [%s]
address_offset : 0x5EF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR240

VBATT Backup Register [%s]
address_offset : 0x5F0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR241

VBATT Backup Register [%s]
address_offset : 0x5F1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[273]

VBATT Backup Register [%s]
address_offset : 0x5F119 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR242

VBATT Backup Register [%s]
address_offset : 0x5F2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR243

VBATT Backup Register [%s]
address_offset : 0x5F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR244

VBATT Backup Register [%s]
address_offset : 0x5F4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR245

VBATT Backup Register [%s]
address_offset : 0x5F5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR246

VBATT Backup Register [%s]
address_offset : 0x5F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR247

VBATT Backup Register [%s]
address_offset : 0x5F7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[274]

VBATT Backup Register [%s]
address_offset : 0x5F72B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR248

VBATT Backup Register [%s]
address_offset : 0x5F8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR249

VBATT Backup Register [%s]
address_offset : 0x5F9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[17]

VBATT Backup Register [%s]
address_offset : 0x5F99 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR250

VBATT Backup Register [%s]
address_offset : 0x5FA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR251

VBATT Backup Register [%s]
address_offset : 0x5FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR252

VBATT Backup Register [%s]
address_offset : 0x5FC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR253

VBATT Backup Register [%s]
address_offset : 0x5FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[275]

VBATT Backup Register [%s]
address_offset : 0x5FD3E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR254

VBATT Backup Register [%s]
address_offset : 0x5FE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR255

VBATT Backup Register [%s]
address_offset : 0x5FF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR256

VBATT Backup Register [%s]
address_offset : 0x600 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR257

VBATT Backup Register [%s]
address_offset : 0x601 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR258

VBATT Backup Register [%s]
address_offset : 0x602 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR259

VBATT Backup Register [%s]
address_offset : 0x603 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[276]

VBATT Backup Register [%s]
address_offset : 0x60352 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR260

VBATT Backup Register [%s]
address_offset : 0x604 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR261

VBATT Backup Register [%s]
address_offset : 0x605 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR262

VBATT Backup Register [%s]
address_offset : 0x606 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR263

VBATT Backup Register [%s]
address_offset : 0x607 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR264

VBATT Backup Register [%s]
address_offset : 0x608 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR265

VBATT Backup Register [%s]
address_offset : 0x609 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[277]

VBATT Backup Register [%s]
address_offset : 0x60967 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR266

VBATT Backup Register [%s]
address_offset : 0x60A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR267

VBATT Backup Register [%s]
address_offset : 0x60B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR268

VBATT Backup Register [%s]
address_offset : 0x60C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR269

VBATT Backup Register [%s]
address_offset : 0x60D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR270

VBATT Backup Register [%s]
address_offset : 0x60E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR271

VBATT Backup Register [%s]
address_offset : 0x60F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[278]

VBATT Backup Register [%s]
address_offset : 0x60F7D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOCOUTCR

MOCO User Trimming Control Register
address_offset : 0x61 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOCOUTRM : MOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original MOCO trimming bits
bits : 0 - 6 (7 bit)
access : read-write

VBTBKR272

VBATT Backup Register [%s]
address_offset : 0x610 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR273

VBATT Backup Register [%s]
address_offset : 0x611 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR274

VBATT Backup Register [%s]
address_offset : 0x612 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR275

VBATT Backup Register [%s]
address_offset : 0x613 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR276

VBATT Backup Register [%s]
address_offset : 0x614 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR277

VBATT Backup Register [%s]
address_offset : 0x615 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[279]

VBATT Backup Register [%s]
address_offset : 0x61594 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR278

VBATT Backup Register [%s]
address_offset : 0x616 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR279

VBATT Backup Register [%s]
address_offset : 0x617 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR280

VBATT Backup Register [%s]
address_offset : 0x618 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR281

VBATT Backup Register [%s]
address_offset : 0x619 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR282

VBATT Backup Register [%s]
address_offset : 0x61A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR283

VBATT Backup Register [%s]
address_offset : 0x61B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[280]

VBATT Backup Register [%s]
address_offset : 0x61BAC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR284

VBATT Backup Register [%s]
address_offset : 0x61C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR285

VBATT Backup Register [%s]
address_offset : 0x61D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR286

VBATT Backup Register [%s]
address_offset : 0x61E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR287

VBATT Backup Register [%s]
address_offset : 0x61F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HOCOUTCR

HOCO User Trimming Control Register
address_offset : 0x62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HOCOUTRM : HOCO User Trimming 1000_0000 : -128 1000_0001 : -127 1000_0010 : -126 . . . 1111_1111 : -1 0000_0000 : Center Code 0000_0001 : +1 . . . 0111_1101 : +125 0111_1110 : +126 0111_1111 : +127These bits are added to original HOCO trimming bits
bits : 0 - 6 (7 bit)
access : read-write

VBTBKR288

VBATT Backup Register [%s]
address_offset : 0x620 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR289

VBATT Backup Register [%s]
address_offset : 0x621 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[281]

VBATT Backup Register [%s]
address_offset : 0x621C5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR290

VBATT Backup Register [%s]
address_offset : 0x622 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR291

VBATT Backup Register [%s]
address_offset : 0x623 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR292

VBATT Backup Register [%s]
address_offset : 0x624 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR293

VBATT Backup Register [%s]
address_offset : 0x625 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR294

VBATT Backup Register [%s]
address_offset : 0x626 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR295

VBATT Backup Register [%s]
address_offset : 0x627 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[282]

VBATT Backup Register [%s]
address_offset : 0x627DF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR296

VBATT Backup Register [%s]
address_offset : 0x628 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR297

VBATT Backup Register [%s]
address_offset : 0x629 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR298

VBATT Backup Register [%s]
address_offset : 0x62A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR299

VBATT Backup Register [%s]
address_offset : 0x62B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR300

VBATT Backup Register [%s]
address_offset : 0x62C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR301

VBATT Backup Register [%s]
address_offset : 0x62D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[283]

VBATT Backup Register [%s]
address_offset : 0x62DFA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR302

VBATT Backup Register [%s]
address_offset : 0x62E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR303

VBATT Backup Register [%s]
address_offset : 0x62F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR304

VBATT Backup Register [%s]
address_offset : 0x630 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR305

VBATT Backup Register [%s]
address_offset : 0x631 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR306

VBATT Backup Register [%s]
address_offset : 0x632 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR307

VBATT Backup Register [%s]
address_offset : 0x633 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR308

VBATT Backup Register [%s]
address_offset : 0x634 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[284]

VBATT Backup Register [%s]
address_offset : 0x63416 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR309

VBATT Backup Register [%s]
address_offset : 0x635 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR310

VBATT Backup Register [%s]
address_offset : 0x636 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR311

VBATT Backup Register [%s]
address_offset : 0x637 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR312

VBATT Backup Register [%s]
address_offset : 0x638 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR313

VBATT Backup Register [%s]
address_offset : 0x639 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR314

VBATT Backup Register [%s]
address_offset : 0x63A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[285]

VBATT Backup Register [%s]
address_offset : 0x63A33 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR315

VBATT Backup Register [%s]
address_offset : 0x63B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR316

VBATT Backup Register [%s]
address_offset : 0x63C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR317

VBATT Backup Register [%s]
address_offset : 0x63D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR318

VBATT Backup Register [%s]
address_offset : 0x63E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR319

VBATT Backup Register [%s]
address_offset : 0x63F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR320

VBATT Backup Register [%s]
address_offset : 0x640 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[286]

VBATT Backup Register [%s]
address_offset : 0x64051 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR321

VBATT Backup Register [%s]
address_offset : 0x641 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR322

VBATT Backup Register [%s]
address_offset : 0x642 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR323

VBATT Backup Register [%s]
address_offset : 0x643 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR324

VBATT Backup Register [%s]
address_offset : 0x644 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR325

VBATT Backup Register [%s]
address_offset : 0x645 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR326

VBATT Backup Register [%s]
address_offset : 0x646 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[287]

VBATT Backup Register [%s]
address_offset : 0x64670 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR327

VBATT Backup Register [%s]
address_offset : 0x647 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR328

VBATT Backup Register [%s]
address_offset : 0x648 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR329

VBATT Backup Register [%s]
address_offset : 0x649 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR330

VBATT Backup Register [%s]
address_offset : 0x64A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[18]

VBATT Backup Register [%s]
address_offset : 0x64AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR331

VBATT Backup Register [%s]
address_offset : 0x64B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR332

VBATT Backup Register [%s]
address_offset : 0x64C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[288]

VBATT Backup Register [%s]
address_offset : 0x64C90 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR333

VBATT Backup Register [%s]
address_offset : 0x64D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR334

VBATT Backup Register [%s]
address_offset : 0x64E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR335

VBATT Backup Register [%s]
address_offset : 0x64F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR336

VBATT Backup Register [%s]
address_offset : 0x650 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR337

VBATT Backup Register [%s]
address_offset : 0x651 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR338

VBATT Backup Register [%s]
address_offset : 0x652 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[289]

VBATT Backup Register [%s]
address_offset : 0x652B1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR339

VBATT Backup Register [%s]
address_offset : 0x653 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR340

VBATT Backup Register [%s]
address_offset : 0x654 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR341

VBATT Backup Register [%s]
address_offset : 0x655 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR342

VBATT Backup Register [%s]
address_offset : 0x656 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR343

VBATT Backup Register [%s]
address_offset : 0x657 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR344

VBATT Backup Register [%s]
address_offset : 0x658 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[290]

VBATT Backup Register [%s]
address_offset : 0x658D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR345

VBATT Backup Register [%s]
address_offset : 0x659 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR346

VBATT Backup Register [%s]
address_offset : 0x65A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR347

VBATT Backup Register [%s]
address_offset : 0x65B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR348

VBATT Backup Register [%s]
address_offset : 0x65C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR349

VBATT Backup Register [%s]
address_offset : 0x65D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR350

VBATT Backup Register [%s]
address_offset : 0x65E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[291]

VBATT Backup Register [%s]
address_offset : 0x65EF6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR351

VBATT Backup Register [%s]
address_offset : 0x65F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR352

VBATT Backup Register [%s]
address_offset : 0x660 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR353

VBATT Backup Register [%s]
address_offset : 0x661 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR354

VBATT Backup Register [%s]
address_offset : 0x662 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR355

VBATT Backup Register [%s]
address_offset : 0x663 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR356

VBATT Backup Register [%s]
address_offset : 0x664 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR357

VBATT Backup Register [%s]
address_offset : 0x665 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[292]

VBATT Backup Register [%s]
address_offset : 0x6651A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR358

VBATT Backup Register [%s]
address_offset : 0x666 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR359

VBATT Backup Register [%s]
address_offset : 0x667 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR360

VBATT Backup Register [%s]
address_offset : 0x668 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR361

VBATT Backup Register [%s]
address_offset : 0x669 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR362

VBATT Backup Register [%s]
address_offset : 0x66A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR363

VBATT Backup Register [%s]
address_offset : 0x66B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[293]

VBATT Backup Register [%s]
address_offset : 0x66B3F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR364

VBATT Backup Register [%s]
address_offset : 0x66C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR365

VBATT Backup Register [%s]
address_offset : 0x66D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR366

VBATT Backup Register [%s]
address_offset : 0x66E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR367

VBATT Backup Register [%s]
address_offset : 0x66F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR368

VBATT Backup Register [%s]
address_offset : 0x670 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR369

VBATT Backup Register [%s]
address_offset : 0x671 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[294]

VBATT Backup Register [%s]
address_offset : 0x67165 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR370

VBATT Backup Register [%s]
address_offset : 0x672 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR371

VBATT Backup Register [%s]
address_offset : 0x673 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR372

VBATT Backup Register [%s]
address_offset : 0x674 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR373

VBATT Backup Register [%s]
address_offset : 0x675 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR374

VBATT Backup Register [%s]
address_offset : 0x676 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR375

VBATT Backup Register [%s]
address_offset : 0x677 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[295]

VBATT Backup Register [%s]
address_offset : 0x6778C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR376

VBATT Backup Register [%s]
address_offset : 0x678 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR377

VBATT Backup Register [%s]
address_offset : 0x679 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR378

VBATT Backup Register [%s]
address_offset : 0x67A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR379

VBATT Backup Register [%s]
address_offset : 0x67B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR380

VBATT Backup Register [%s]
address_offset : 0x67C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR381

VBATT Backup Register [%s]
address_offset : 0x67D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[296]

VBATT Backup Register [%s]
address_offset : 0x67DB4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR382

VBATT Backup Register [%s]
address_offset : 0x67E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR383

VBATT Backup Register [%s]
address_offset : 0x67F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR384

VBATT Backup Register [%s]
address_offset : 0x680 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR385

VBATT Backup Register [%s]
address_offset : 0x681 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR386

VBATT Backup Register [%s]
address_offset : 0x682 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR387

VBATT Backup Register [%s]
address_offset : 0x683 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[297]

VBATT Backup Register [%s]
address_offset : 0x683DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR388

VBATT Backup Register [%s]
address_offset : 0x684 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR389

VBATT Backup Register [%s]
address_offset : 0x685 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR390

VBATT Backup Register [%s]
address_offset : 0x686 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR391

VBATT Backup Register [%s]
address_offset : 0x687 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR392

VBATT Backup Register [%s]
address_offset : 0x688 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR393

VBATT Backup Register [%s]
address_offset : 0x689 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR394

VBATT Backup Register [%s]
address_offset : 0x68A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[298]

VBATT Backup Register [%s]
address_offset : 0x68A07 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR395

VBATT Backup Register [%s]
address_offset : 0x68B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR396

VBATT Backup Register [%s]
address_offset : 0x68C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR397

VBATT Backup Register [%s]
address_offset : 0x68D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR398

VBATT Backup Register [%s]
address_offset : 0x68E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR399

VBATT Backup Register [%s]
address_offset : 0x68F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR400

VBATT Backup Register [%s]
address_offset : 0x690 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[299]

VBATT Backup Register [%s]
address_offset : 0x69032 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR401

VBATT Backup Register [%s]
address_offset : 0x691 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR402

VBATT Backup Register [%s]
address_offset : 0x692 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR403

VBATT Backup Register [%s]
address_offset : 0x693 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR404

VBATT Backup Register [%s]
address_offset : 0x694 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR405

VBATT Backup Register [%s]
address_offset : 0x695 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR406

VBATT Backup Register [%s]
address_offset : 0x696 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[300]

VBATT Backup Register [%s]
address_offset : 0x6965E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR407

VBATT Backup Register [%s]
address_offset : 0x697 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR408

VBATT Backup Register [%s]
address_offset : 0x698 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR409

VBATT Backup Register [%s]
address_offset : 0x699 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR410

VBATT Backup Register [%s]
address_offset : 0x69A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR411

VBATT Backup Register [%s]
address_offset : 0x69B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[19]

VBATT Backup Register [%s]
address_offset : 0x69BE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR412

VBATT Backup Register [%s]
address_offset : 0x69C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[301]

VBATT Backup Register [%s]
address_offset : 0x69C8B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR413

VBATT Backup Register [%s]
address_offset : 0x69D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR414

VBATT Backup Register [%s]
address_offset : 0x69E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR415

VBATT Backup Register [%s]
address_offset : 0x69F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR416

VBATT Backup Register [%s]
address_offset : 0x6A0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR417

VBATT Backup Register [%s]
address_offset : 0x6A1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR418

VBATT Backup Register [%s]
address_offset : 0x6A2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[302]

VBATT Backup Register [%s]
address_offset : 0x6A2B9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR419

VBATT Backup Register [%s]
address_offset : 0x6A3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR420

VBATT Backup Register [%s]
address_offset : 0x6A4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR421

VBATT Backup Register [%s]
address_offset : 0x6A5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR422

VBATT Backup Register [%s]
address_offset : 0x6A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR423

VBATT Backup Register [%s]
address_offset : 0x6A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR424

VBATT Backup Register [%s]
address_offset : 0x6A8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[303]

VBATT Backup Register [%s]
address_offset : 0x6A8E8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR425

VBATT Backup Register [%s]
address_offset : 0x6A9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR426

VBATT Backup Register [%s]
address_offset : 0x6AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR427

VBATT Backup Register [%s]
address_offset : 0x6AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR428

VBATT Backup Register [%s]
address_offset : 0x6AC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR429

VBATT Backup Register [%s]
address_offset : 0x6AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR430

VBATT Backup Register [%s]
address_offset : 0x6AE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR431

VBATT Backup Register [%s]
address_offset : 0x6AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[304]

VBATT Backup Register [%s]
address_offset : 0x6AF18 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR432

VBATT Backup Register [%s]
address_offset : 0x6B0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR433

VBATT Backup Register [%s]
address_offset : 0x6B1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR434

VBATT Backup Register [%s]
address_offset : 0x6B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR435

VBATT Backup Register [%s]
address_offset : 0x6B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR436

VBATT Backup Register [%s]
address_offset : 0x6B4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR437

VBATT Backup Register [%s]
address_offset : 0x6B5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[305]

VBATT Backup Register [%s]
address_offset : 0x6B549 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR438

VBATT Backup Register [%s]
address_offset : 0x6B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR439

VBATT Backup Register [%s]
address_offset : 0x6B7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR440

VBATT Backup Register [%s]
address_offset : 0x6B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR441

VBATT Backup Register [%s]
address_offset : 0x6B9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR442

VBATT Backup Register [%s]
address_offset : 0x6BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR443

VBATT Backup Register [%s]
address_offset : 0x6BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[306]

VBATT Backup Register [%s]
address_offset : 0x6BB7B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR444

VBATT Backup Register [%s]
address_offset : 0x6BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR445

VBATT Backup Register [%s]
address_offset : 0x6BD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR446

VBATT Backup Register [%s]
address_offset : 0x6BE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR447

VBATT Backup Register [%s]
address_offset : 0x6BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR448

VBATT Backup Register [%s]
address_offset : 0x6C0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR449

VBATT Backup Register [%s]
address_offset : 0x6C1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[307]

VBATT Backup Register [%s]
address_offset : 0x6C1AE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR450

VBATT Backup Register [%s]
address_offset : 0x6C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR451

VBATT Backup Register [%s]
address_offset : 0x6C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR452

VBATT Backup Register [%s]
address_offset : 0x6C4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR453

VBATT Backup Register [%s]
address_offset : 0x6C5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR454

VBATT Backup Register [%s]
address_offset : 0x6C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR455

VBATT Backup Register [%s]
address_offset : 0x6C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[308]

VBATT Backup Register [%s]
address_offset : 0x6C7E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR456

VBATT Backup Register [%s]
address_offset : 0x6C8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR457

VBATT Backup Register [%s]
address_offset : 0x6C9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR458

VBATT Backup Register [%s]
address_offset : 0x6CA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR459

VBATT Backup Register [%s]
address_offset : 0x6CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR460

VBATT Backup Register [%s]
address_offset : 0x6CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR461

VBATT Backup Register [%s]
address_offset : 0x6CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR462

VBATT Backup Register [%s]
address_offset : 0x6CE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[309]

VBATT Backup Register [%s]
address_offset : 0x6CE17 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR463

VBATT Backup Register [%s]
address_offset : 0x6CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR464

VBATT Backup Register [%s]
address_offset : 0x6D0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR465

VBATT Backup Register [%s]
address_offset : 0x6D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR466

VBATT Backup Register [%s]
address_offset : 0x6D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR467

VBATT Backup Register [%s]
address_offset : 0x6D3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR468

VBATT Backup Register [%s]
address_offset : 0x6D4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[310]

VBATT Backup Register [%s]
address_offset : 0x6D44D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR469

VBATT Backup Register [%s]
address_offset : 0x6D5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR470

VBATT Backup Register [%s]
address_offset : 0x6D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR471

VBATT Backup Register [%s]
address_offset : 0x6D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR472

VBATT Backup Register [%s]
address_offset : 0x6D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR473

VBATT Backup Register [%s]
address_offset : 0x6D9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR474

VBATT Backup Register [%s]
address_offset : 0x6DA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[311]

VBATT Backup Register [%s]
address_offset : 0x6DA84 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR475

VBATT Backup Register [%s]
address_offset : 0x6DB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR476

VBATT Backup Register [%s]
address_offset : 0x6DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR477

VBATT Backup Register [%s]
address_offset : 0x6DD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR478

VBATT Backup Register [%s]
address_offset : 0x6DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR479

VBATT Backup Register [%s]
address_offset : 0x6DF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR480

VBATT Backup Register [%s]
address_offset : 0x6E0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[312]

VBATT Backup Register [%s]
address_offset : 0x6E0BC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR481

VBATT Backup Register [%s]
address_offset : 0x6E1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR482

VBATT Backup Register [%s]
address_offset : 0x6E2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR483

VBATT Backup Register [%s]
address_offset : 0x6E3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR484

VBATT Backup Register [%s]
address_offset : 0x6E4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR485

VBATT Backup Register [%s]
address_offset : 0x6E5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR486

VBATT Backup Register [%s]
address_offset : 0x6E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[313]

VBATT Backup Register [%s]
address_offset : 0x6E6F5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR487

VBATT Backup Register [%s]
address_offset : 0x6E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR488

VBATT Backup Register [%s]
address_offset : 0x6E8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR489

VBATT Backup Register [%s]
address_offset : 0x6E9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR490

VBATT Backup Register [%s]
address_offset : 0x6EA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR491

VBATT Backup Register [%s]
address_offset : 0x6EB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR492

VBATT Backup Register [%s]
address_offset : 0x6EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR493

VBATT Backup Register [%s]
address_offset : 0x6ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[20]

VBATT Backup Register [%s]
address_offset : 0x6ED2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[314]

VBATT Backup Register [%s]
address_offset : 0x6ED2F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR494

VBATT Backup Register [%s]
address_offset : 0x6EE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR495

VBATT Backup Register [%s]
address_offset : 0x6EF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR496

VBATT Backup Register [%s]
address_offset : 0x6F0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR497

VBATT Backup Register [%s]
address_offset : 0x6F1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR498

VBATT Backup Register [%s]
address_offset : 0x6F2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR499

VBATT Backup Register [%s]
address_offset : 0x6F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[315]

VBATT Backup Register [%s]
address_offset : 0x6F36A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR500

VBATT Backup Register [%s]
address_offset : 0x6F4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR501

VBATT Backup Register [%s]
address_offset : 0x6F5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR502

VBATT Backup Register [%s]
address_offset : 0x6F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR503

VBATT Backup Register [%s]
address_offset : 0x6F7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR504

VBATT Backup Register [%s]
address_offset : 0x6F8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR505

VBATT Backup Register [%s]
address_offset : 0x6F9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[316]

VBATT Backup Register [%s]
address_offset : 0x6F9A6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR506

VBATT Backup Register [%s]
address_offset : 0x6FA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR507

VBATT Backup Register [%s]
address_offset : 0x6FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR508

VBATT Backup Register [%s]
address_offset : 0x6FC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR509

VBATT Backup Register [%s]
address_offset : 0x6FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR510

VBATT Backup Register [%s]
address_offset : 0x6FE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR511

VBATT Backup Register [%s]
address_offset : 0x6FF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[317]

VBATT Backup Register [%s]
address_offset : 0x6FFE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[318]

VBATT Backup Register [%s]
address_offset : 0x70621 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[319]

VBATT Backup Register [%s]
address_offset : 0x70C60 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[320]

VBATT Backup Register [%s]
address_offset : 0x712A0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[321]

VBATT Backup Register [%s]
address_offset : 0x718E1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[322]

VBATT Backup Register [%s]
address_offset : 0x71F23 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[323]

VBATT Backup Register [%s]
address_offset : 0x72566 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[324]

VBATT Backup Register [%s]
address_offset : 0x72BAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[325]

VBATT Backup Register [%s]
address_offset : 0x731EF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[326]

VBATT Backup Register [%s]
address_offset : 0x73835 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[21]

VBATT Backup Register [%s]
address_offset : 0x73E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[327]

VBATT Backup Register [%s]
address_offset : 0x73E7C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[328]

VBATT Backup Register [%s]
address_offset : 0x744C4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[329]

VBATT Backup Register [%s]
address_offset : 0x74B0D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[330]

VBATT Backup Register [%s]
address_offset : 0x75157 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[331]

VBATT Backup Register [%s]
address_offset : 0x757A2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[332]

VBATT Backup Register [%s]
address_offset : 0x75DEE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[333]

VBATT Backup Register [%s]
address_offset : 0x7643B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[334]

VBATT Backup Register [%s]
address_offset : 0x76A89 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[335]

VBATT Backup Register [%s]
address_offset : 0x770D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[336]

VBATT Backup Register [%s]
address_offset : 0x77728 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[337]

VBATT Backup Register [%s]
address_offset : 0x77D79 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[338]

VBATT Backup Register [%s]
address_offset : 0x783CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[339]

VBATT Backup Register [%s]
address_offset : 0x78A1E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[22]

VBATT Backup Register [%s]
address_offset : 0x78FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[340]

VBATT Backup Register [%s]
address_offset : 0x79072 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[341]

VBATT Backup Register [%s]
address_offset : 0x796C7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[342]

VBATT Backup Register [%s]
address_offset : 0x79D1D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[343]

VBATT Backup Register [%s]
address_offset : 0x7A374 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[344]

VBATT Backup Register [%s]
address_offset : 0x7A9CC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[345]

VBATT Backup Register [%s]
address_offset : 0x7B025 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[346]

VBATT Backup Register [%s]
address_offset : 0x7B67F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[347]

VBATT Backup Register [%s]
address_offset : 0x7BCDA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[348]

VBATT Backup Register [%s]
address_offset : 0x7C336 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[349]

VBATT Backup Register [%s]
address_offset : 0x7C993 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[350]

VBATT Backup Register [%s]
address_offset : 0x7CFF1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[351]

VBATT Backup Register [%s]
address_offset : 0x7D650 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[352]

VBATT Backup Register [%s]
address_offset : 0x7DCB0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[23]

VBATT Backup Register [%s]
address_offset : 0x7E14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[353]

VBATT Backup Register [%s]
address_offset : 0x7E311 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[354]

VBATT Backup Register [%s]
address_offset : 0x7E973 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[355]

VBATT Backup Register [%s]
address_offset : 0x7EFD6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[356]

VBATT Backup Register [%s]
address_offset : 0x7F63A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[357]

VBATT Backup Register [%s]
address_offset : 0x7FC9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[358]

VBATT Backup Register [%s]
address_offset : 0x80305 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[359]

VBATT Backup Register [%s]
address_offset : 0x8096C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[360]

VBATT Backup Register [%s]
address_offset : 0x80FD4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[361]

VBATT Backup Register [%s]
address_offset : 0x8163D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[362]

VBATT Backup Register [%s]
address_offset : 0x81CA7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[363]

VBATT Backup Register [%s]
address_offset : 0x82312 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[364]

VBATT Backup Register [%s]
address_offset : 0x8297E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[365]

VBATT Backup Register [%s]
address_offset : 0x82FEB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[24]

VBATT Backup Register [%s]
address_offset : 0x832C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[366]

VBATT Backup Register [%s]
address_offset : 0x83659 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[367]

VBATT Backup Register [%s]
address_offset : 0x83CC8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[368]

VBATT Backup Register [%s]
address_offset : 0x84338 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[369]

VBATT Backup Register [%s]
address_offset : 0x849A9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[370]

VBATT Backup Register [%s]
address_offset : 0x8501B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[371]

VBATT Backup Register [%s]
address_offset : 0x8568E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[372]

VBATT Backup Register [%s]
address_offset : 0x85D02 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[373]

VBATT Backup Register [%s]
address_offset : 0x86377 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[374]

VBATT Backup Register [%s]
address_offset : 0x869ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[375]

VBATT Backup Register [%s]
address_offset : 0x87064 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[376]

VBATT Backup Register [%s]
address_offset : 0x876DC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[377]

VBATT Backup Register [%s]
address_offset : 0x87D55 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[378]

VBATT Backup Register [%s]
address_offset : 0x883CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[25]

VBATT Backup Register [%s]
address_offset : 0x8845 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[379]

VBATT Backup Register [%s]
address_offset : 0x88A4A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[380]

VBATT Backup Register [%s]
address_offset : 0x890C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[381]

VBATT Backup Register [%s]
address_offset : 0x89743 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[382]

VBATT Backup Register [%s]
address_offset : 0x89DC1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[383]

VBATT Backup Register [%s]
address_offset : 0x8A440 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[384]

VBATT Backup Register [%s]
address_offset : 0x8AAC0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[385]

VBATT Backup Register [%s]
address_offset : 0x8B141 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[386]

VBATT Backup Register [%s]
address_offset : 0x8B7C3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[387]

VBATT Backup Register [%s]
address_offset : 0x8BE46 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[388]

VBATT Backup Register [%s]
address_offset : 0x8C4CA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[389]

VBATT Backup Register [%s]
address_offset : 0x8CB4F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[390]

VBATT Backup Register [%s]
address_offset : 0x8D1D5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[26]

VBATT Backup Register [%s]
address_offset : 0x8D5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[391]

VBATT Backup Register [%s]
address_offset : 0x8D85C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[392]

VBATT Backup Register [%s]
address_offset : 0x8DEE4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[393]

VBATT Backup Register [%s]
address_offset : 0x8E56D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[394]

VBATT Backup Register [%s]
address_offset : 0x8EBF7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[395]

VBATT Backup Register [%s]
address_offset : 0x8F282 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[396]

VBATT Backup Register [%s]
address_offset : 0x8F90E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[397]

VBATT Backup Register [%s]
address_offset : 0x8FF9B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[398]

VBATT Backup Register [%s]
address_offset : 0x90629 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[399]

VBATT Backup Register [%s]
address_offset : 0x90CB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[400]

VBATT Backup Register [%s]
address_offset : 0x91348 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[401]

VBATT Backup Register [%s]
address_offset : 0x919D9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SNZCR

Snooze Control Register
address_offset : 0x92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RXDREQEN : RXD0 Snooze Request Enable NOTE: Do not set to 1 other than in asynchronous mode.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Ignore RXD0 falling edge in Software Standby mode.

#1 : 1

Accept RXD0 falling edge in Standby mode as a request to transit to Snooze mode.

End of enumeration elements list.

SNZDTCEN : DTC Enable in Snooze Mode
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable DTC operation

#1 : 1

Enable DTC operation

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 2 - 5 (4 bit)
access : read-write

SNZE : Snooze Mode Enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable Snooze Mode

#1 : 1

Enable Snooze Mode

End of enumeration elements list.

VBTBKR[402]

VBATT Backup Register [%s]
address_offset : 0x9206B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[403]

VBATT Backup Register [%s]
address_offset : 0x926FE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[27]

VBATT Backup Register [%s]
address_offset : 0x927A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[404]

VBATT Backup Register [%s]
address_offset : 0x92D92 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[405]

VBATT Backup Register [%s]
address_offset : 0x93427 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[406]

VBATT Backup Register [%s]
address_offset : 0x93ABD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SNZEDCR

Snooze End Control Register
address_offset : 0x94 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AGT1UNFED : AGT1 Underflow Snooze End Enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

DTCZRED : Last DTC Transmission Completion Snooze End Enable
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

DTCNZRED : Not Last DTC Transmission Completion Snooze End Enable
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

AD0MATED : ADC140 Compare Match Snooze End Enable
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

AD0UMTED : ADC140 Compare Mismatch Snooze End Enable
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 5 - 5 (1 bit)
access : read-write

SCI0UMTED : SCI0 Address Mismatch Snooze End Enable
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable the Snooze End request

#1 : 1

Enable the Snooze End request

End of enumeration elements list.

VBTBKR[407]

VBATT Backup Register [%s]
address_offset : 0x94154 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[408]

VBATT Backup Register [%s]
address_offset : 0x947EC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[409]

VBATT Backup Register [%s]
address_offset : 0x94E85 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[410]

VBATT Backup Register [%s]
address_offset : 0x9551F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[411]

VBATT Backup Register [%s]
address_offset : 0x95BBA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[412]

VBATT Backup Register [%s]
address_offset : 0x96256 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[413]

VBATT Backup Register [%s]
address_offset : 0x968F3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[414]

VBATT Backup Register [%s]
address_offset : 0x96F91 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[415]

VBATT Backup Register [%s]
address_offset : 0x97630 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[28]

VBATT Backup Register [%s]
address_offset : 0x9796 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[416]

VBATT Backup Register [%s]
address_offset : 0x97CD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SNZREQCR

Snooze Request Control Register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SNZREQEN0 : Snooze Request Enable 0Enable IRQ0 pin snooze request
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN1 : Snooze Request Enable 1Enable IRQ1 pin snooze request
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN2 : Snooze Request Enable 2Enable IRQ2 pin snooze request
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN3 : Snooze Request Enable 3Enable IRQ3 pin snooze request
bits : 3 - 2 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN4 : Snooze Request Enable 4Enable IRQ4 pin snooze request
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN5 : Snooze Request Enable 5Enable IRQ5 pin snooze request
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN6 : Snooze Request Enable 6Enable IRQ6 pin snooze request
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN7 : Snooze Request Enable 7Enable IRQ7 pin snooze request
bits : 7 - 6 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN8 : Snooze Request Enable 8Enable IRQ8 pin snooze request
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN9 : Snooze Request Enable 9Enable IRQ9 pin snooze request
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN10 : Snooze Request Enable 10Enable IRQ10 pin snooze request
bits : 10 - 9 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN11 : Snooze Request Enable 11Enable IRQ11 pin snooze request
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN12 : Snooze Request Enable 12Enable IRQ12 pin snooze request
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN13 : Snooze Request Enable 13Enable IRQ13 pin snooze request
bits : 13 - 12 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN14 : Snooze Request Enable 14Enable IRQ14 pin snooze request
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN15 : Snooze Request Enable 15Enable IRQ15 pin snooze request
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN17 : Snooze Request Enable 17Enable KR snooze request
bits : 17 - 16 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 18 - 21 (4 bit)
access : read-write

SNZREQEN23 : Snooze Request Enable 23Enable RTC alarm snooze request
bits : 23 - 22 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN24 : Snooze Request Enable 24Enable RTC alarm snooze request
bits : 24 - 23 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN25 : Snooze Request Enable 25Enable RTC period snooze request
bits : 25 - 24 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 26 - 26 (1 bit)
access : read-write

SNZREQEN28 : Snooze Request Enable 28Enable AGT1 underflow snooze request
bits : 28 - 27 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN29 : Snooze Request Enable 29Enable AGT1 compare match A snooze request
bits : 29 - 28 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

SNZREQEN30 : Snooze Request Enable 30Enable AGT1 compare match B snooze request
bits : 30 - 29 (0 bit)
access : read-write

Enumeration:

#0 : 0

Disable snooze request

#1 : 1

Enable snooze request

End of enumeration elements list.

VBTBKR[417]

VBATT Backup Register [%s]
address_offset : 0x98371 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[418]

VBATT Backup Register [%s]
address_offset : 0x98A13 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[419]

VBATT Backup Register [%s]
address_offset : 0x990B6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[420]

VBATT Backup Register [%s]
address_offset : 0x9975A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[421]

VBATT Backup Register [%s]
address_offset : 0x99DFF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[422]

VBATT Backup Register [%s]
address_offset : 0x9A4A5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[423]

VBATT Backup Register [%s]
address_offset : 0x9AB4C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[424]

VBATT Backup Register [%s]
address_offset : 0x9B1F4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[425]

VBATT Backup Register [%s]
address_offset : 0x9B89D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[426]

VBATT Backup Register [%s]
address_offset : 0x9BF47 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[427]

VBATT Backup Register [%s]
address_offset : 0x9C5F2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[29]

VBATT Backup Register [%s]
address_offset : 0x9CB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[428]

VBATT Backup Register [%s]
address_offset : 0x9CC9E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[429]

VBATT Backup Register [%s]
address_offset : 0x9D34B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[430]

VBATT Backup Register [%s]
address_offset : 0x9D9F9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLSTOP

Flash Operation Control Register
address_offset : 0x9E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FLSTOP : Selecting ON/OFF of the Flash Memory Operation
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Code flash and data flash memory operates

#1 : 1

Code flash and data flash memory stops.

End of enumeration elements list.

FLSTPF : Flash Memory Operation Status Flag
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Transition completed

#1 : 1

During transition (from the flash-stop-status to flash-operating-status or vice versa)

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTBKR[431]

VBATT Backup Register [%s]
address_offset : 0x9E0A8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[432]

VBATT Backup Register [%s]
address_offset : 0x9E758 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[433]

VBATT Backup Register [%s]
address_offset : 0x9EE09 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSMCR

Power Save Memory Control Register
address_offset : 0x9F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PSMC : Power save memory control.
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

All RAM is on Software Standby mode.

#01 : 01

48KB RAM is on in Software Standby mode.

: others

Setting prohibited.

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

VBTBKR[434]

VBATT Backup Register [%s]
address_offset : 0x9F4BB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[435]

VBATT Backup Register [%s]
address_offset : 0x9FB6E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPCCR

Operating Power Control Register
address_offset : 0xA0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OPCM : Operating Power Control Mode Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

High-speed mode

#01 : 01

Middle-speed mode

#10 : 10

Low-voltage mode

#11 : 11

Low-speed mode

End of enumeration elements list.

OPCMTSF : Operating Power Control Mode Transition Status Flag
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

Transition completed

#1 : 1

During transition

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTBKR[0]

VBATT Backup Register [%s]
address_offset : 0xA00 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[436]

VBATT Backup Register [%s]
address_offset : 0xA0222 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[437]

VBATT Backup Register [%s]
address_offset : 0xA08D7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[438]

VBATT Backup Register [%s]
address_offset : 0xA0F8D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[439]

VBATT Backup Register [%s]
address_offset : 0xA1644 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[440]

VBATT Backup Register [%s]
address_offset : 0xA1CFC Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[30]

VBATT Backup Register [%s]
address_offset : 0xA1D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MOSCWTCR

Main Clock Oscillator Wait Control Register
address_offset : 0xA2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MSTS : Main clock oscillator wait time setting
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

#0000 : 0000

Wait time = 2 cycles (0.25 us)

#0001 : 0001

Wait time = 1024 cycles (128 us)

#0010 : 0010

Wait time = 2048 cycles (256 us)

#0011 : 0011

Wait time = 4096 cycles (512 us)

#0100 : 0100

Wait time = 8192 cycles (1024 us)

#0101 : 0101

Wait time = 16384 cycles (2048 us) (value after reset)

#0110 : 0110

Wait time = 32768 cycles (4096 us)

#0111 : 0111

Wait time = 65536 cycles (8192 us)

#1000 : 1000

Wait time = 131072 cycles (16384 us)

#1001 : 1001

Wait time = 262144 cycles (32768 us).

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 0000. The write value should be 0000.
bits : 4 - 6 (3 bit)
access : read-write

VBTBKR[441]

VBATT Backup Register [%s]
address_offset : 0xA23B5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[442]

VBATT Backup Register [%s]
address_offset : 0xA2A6F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[443]

VBATT Backup Register [%s]
address_offset : 0xA312A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[444]

VBATT Backup Register [%s]
address_offset : 0xA37E6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[445]

VBATT Backup Register [%s]
address_offset : 0xA3EA3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[446]

VBATT Backup Register [%s]
address_offset : 0xA4561 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[447]

VBATT Backup Register [%s]
address_offset : 0xA4C20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HOCOWTCR

High-Speed On-Chip Oscillator Wait Control Register
address_offset : 0xA5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HSTS : HOCO wait time setting
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#101 : 101

If HOCO frequency is other than 64MHz, should set the value to 101b.

#110 : 110

If HOCO frequency = 64MHz, should set the value to 110b.

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

VBTBKR[448]

VBATT Backup Register [%s]
address_offset : 0xA52E0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[449]

VBATT Backup Register [%s]
address_offset : 0xA59A1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[450]

VBATT Backup Register [%s]
address_offset : 0xA6063 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[451]

VBATT Backup Register [%s]
address_offset : 0xA6726 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[452]

VBATT Backup Register [%s]
address_offset : 0xA6DEA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[31]

VBATT Backup Register [%s]
address_offset : 0xA6F0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[453]

VBATT Backup Register [%s]
address_offset : 0xA74AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[454]

VBATT Backup Register [%s]
address_offset : 0xA7B75 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[455]

VBATT Backup Register [%s]
address_offset : 0xA823C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[456]

VBATT Backup Register [%s]
address_offset : 0xA8904 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[457]

VBATT Backup Register [%s]
address_offset : 0xA8FCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[458]

VBATT Backup Register [%s]
address_offset : 0xA9697 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[459]

VBATT Backup Register [%s]
address_offset : 0xA9D62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOPCCR

Sub Operating Power Control Register
address_offset : 0xAA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SOPCM : Sub Operating Power Control Mode Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Other than Subosc-speed mode

#1 : 1

Subosc-speed mode

End of enumeration elements list.

SOPCMTSF : Sub Operating Power Control Mode Transition Status Flag
bits : 4 - 3 (0 bit)
access : read-only

Enumeration:

#0 : 0

Transition completed

#1 : 1

During transition

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 5 - 6 (2 bit)
access : read-write

VBTBKR[460]

VBATT Backup Register [%s]
address_offset : 0xAA42E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[461]

VBATT Backup Register [%s]
address_offset : 0xAAAFB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[462]

VBATT Backup Register [%s]
address_offset : 0xAB1C9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[463]

VBATT Backup Register [%s]
address_offset : 0xAB898 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[464]

VBATT Backup Register [%s]
address_offset : 0xABF68 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[32]

VBATT Backup Register [%s]
address_offset : 0xAC10 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[465]

VBATT Backup Register [%s]
address_offset : 0xAC639 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[466]

VBATT Backup Register [%s]
address_offset : 0xACD0B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[467]

VBATT Backup Register [%s]
address_offset : 0xAD3DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[468]

VBATT Backup Register [%s]
address_offset : 0xADAB2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[469]

VBATT Backup Register [%s]
address_offset : 0xAE187 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[470]

VBATT Backup Register [%s]
address_offset : 0xAE85D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[471]

VBATT Backup Register [%s]
address_offset : 0xAEF34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[472]

VBATT Backup Register [%s]
address_offset : 0xAF60C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[473]

VBATT Backup Register [%s]
address_offset : 0xAFCE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[474]

VBATT Backup Register [%s]
address_offset : 0xB03BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[475]

VBATT Backup Register [%s]
address_offset : 0xB0A9A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[476]

VBATT Backup Register [%s]
address_offset : 0xB1176 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[33]

VBATT Backup Register [%s]
address_offset : 0xB131 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[477]

VBATT Backup Register [%s]
address_offset : 0xB1853 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[478]

VBATT Backup Register [%s]
address_offset : 0xB1F31 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[479]

VBATT Backup Register [%s]
address_offset : 0xB2610 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[480]

VBATT Backup Register [%s]
address_offset : 0xB2CF0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[481]

VBATT Backup Register [%s]
address_offset : 0xB33D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[482]

VBATT Backup Register [%s]
address_offset : 0xB3AB3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[483]

VBATT Backup Register [%s]
address_offset : 0xB4196 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[484]

VBATT Backup Register [%s]
address_offset : 0xB487A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[485]

VBATT Backup Register [%s]
address_offset : 0xB4F5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[486]

VBATT Backup Register [%s]
address_offset : 0xB5645 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[487]

VBATT Backup Register [%s]
address_offset : 0xB5D2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[488]

VBATT Backup Register [%s]
address_offset : 0xB6414 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[34]

VBATT Backup Register [%s]
address_offset : 0xB653 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[489]

VBATT Backup Register [%s]
address_offset : 0xB6AFD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[490]

VBATT Backup Register [%s]
address_offset : 0xB71E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[491]

VBATT Backup Register [%s]
address_offset : 0xB78D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[492]

VBATT Backup Register [%s]
address_offset : 0xB7FBE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[493]

VBATT Backup Register [%s]
address_offset : 0xB86AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[494]

VBATT Backup Register [%s]
address_offset : 0xB8D99 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[495]

VBATT Backup Register [%s]
address_offset : 0xB9488 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[496]

VBATT Backup Register [%s]
address_offset : 0xB9B78 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[497]

VBATT Backup Register [%s]
address_offset : 0xBA269 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[498]

VBATT Backup Register [%s]
address_offset : 0xBA95B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[499]

VBATT Backup Register [%s]
address_offset : 0xBB04E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[500]

VBATT Backup Register [%s]
address_offset : 0xBB742 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[35]

VBATT Backup Register [%s]
address_offset : 0xBB76 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[501]

VBATT Backup Register [%s]
address_offset : 0xBBE37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[502]

VBATT Backup Register [%s]
address_offset : 0xBC52D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[503]

VBATT Backup Register [%s]
address_offset : 0xBCC24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[504]

VBATT Backup Register [%s]
address_offset : 0xBD31C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[505]

VBATT Backup Register [%s]
address_offset : 0xBDA15 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[506]

VBATT Backup Register [%s]
address_offset : 0xBE10F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[507]

VBATT Backup Register [%s]
address_offset : 0xBE80A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[508]

VBATT Backup Register [%s]
address_offset : 0xBEF06 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[509]

VBATT Backup Register [%s]
address_offset : 0xBF603 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[510]

VBATT Backup Register [%s]
address_offset : 0xBFD01 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SBYCR

Standby Control Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

Reserved : These bits are read as 00000000000000. The write value should be 00000000000000.
bits : 0 - 12 (13 bit)
access : read-write

OPE : Output Port Enable
bits : 14 - 13 (0 bit)
access : read-write

Enumeration:

#0 : 0

In software standby mode Address output pins, Data output pins, and other bus control signal output pins are set to the high-impedance state. In snooze mode, the status of the address bus and bus control signals are same as before entering software standby mode.

#1 : 1

In software standby mode Address output pins, Data output pins, and other bus control signal output pins retain the output state.

End of enumeration elements list.

SSBY : Software Standby
bits : 15 - 14 (0 bit)
access : read-write

Enumeration:

#0 : 0

Sleep mode

#1 : 1

Software Standby mode

End of enumeration elements list.

RSTSR1

Reset Status Register 1
address_offset : 0xC0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IWDTRF : Independent Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Independent watchdog timer reset not detected.

#1 : 1

Independent watchdog timer reset detected.

End of enumeration elements list.

WDTRF : Watchdog Timer Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Watchdog timer reset not detected.

#1 : 1

Watchdog timer reset detected.

End of enumeration elements list.

SWRF : Software Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Software reset not detected.

#1 : 1

Software reset detected.

End of enumeration elements list.

RPERF : RAM Parity Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 8 - 7 (0 bit)
access : read-write

Enumeration:

#0 : 0

RAM parity error reset not detected.

#1 : 1

RAM parity error reset detected.

End of enumeration elements list.

REERF : RAM ECC Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 9 - 8 (0 bit)
access : read-write

Enumeration:

#0 : 0

RAM ECC error reset not detected.

#1 : 1

RAM ECC error reset detected.

End of enumeration elements list.

BUSSRF : Bus Slave MPU Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 10 - 9 (0 bit)
access : read-write

Enumeration:

#0 : 0

Bus Slave MPU reset not detected.

#1 : 1

Bus Slave MPU reset detected.

End of enumeration elements list.

BUSMRF : Bus Master MPU Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 11 - 10 (0 bit)
access : read-write

Enumeration:

#0 : 0

Bus Master MPU reset not detected.

#1 : 1

Bus Master MPU reset detected.

End of enumeration elements list.

SPERF : SP Error Reset Detect FlagNote: Only 0 can be written to clear the flag. The reset flag must be written as 0 after the reset flag is read as 1.
bits : 12 - 11 (0 bit)
access : read-write

Enumeration:

#0 : 0

SP error reset not detected.

#1 : 1

SP error reset detected.

End of enumeration elements list.

Reserved : These bits are read as 000. The write value should be 000.
bits : 13 - 14 (2 bit)
access : read-write

VBTBKR[511]

VBATT Backup Register [%s]
address_offset : 0xC0400 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[36]

VBATT Backup Register [%s]
address_offset : 0xC09A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[37]

VBATT Backup Register [%s]
address_offset : 0xC5BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKRACR

Backup Register Access Control Register
address_offset : 0xC6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BKRACS : Backup Register Access Control Register
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

#000 : 000

Access control disable. When System clock source is SOSC or LOCO.

#110 : 110

Access control enable. System clock source is other than SOSC or LOCO.

: others

Setting prohibited

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

VBTBKR[38]

VBATT Backup Register [%s]
address_offset : 0xCAE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USBCKCR

USB Clock Control register
address_offset : 0xD0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HSTS : USB Clock Source Select
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

PLL(Value after reset)

#1 : 1

HOCO

End of enumeration elements list.

Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write

VBTBKR[39]

VBATT Backup Register [%s]
address_offset : 0xD00C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[40]

VBATT Backup Register [%s]
address_offset : 0xD534 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[41]

VBATT Backup Register [%s]
address_offset : 0xDA5D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[42]

VBATT Backup Register [%s]
address_offset : 0xDF87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LVD1CR1

Voltage Monitor %s Circuit Control Register 1
address_offset : 0xE0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDTSEL : Voltage Monitor Interrupt Generation Condition Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

When VCC>=Vdet (rise) is detected

#01 : 01

When VCC

#10 : 10

When drop and rise are detected

#11 : 11

Settings prohibited

End of enumeration elements list.

IRQSEL : Voltage Monitor Interrupt Type Select
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Non-maskable interrupt

#1 : 1

Maskable interrupt

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

LVD1SR

Voltage Monitor %s Circuit Status Register
address_offset : 0xE1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DET : Voltage Monitor Voltage Change Detection Flag NOTE: Only 0 can be written to this bit. After writing 0 to this bit, it takes 2 system clock cycles for the bit to be read as 0.
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Not detected

#1 : 1

Vdet1 passage detection

End of enumeration elements list.

MON : Voltage Monitor 1 Signal Monitor Flag
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

VCC < Vdet

#1 : 1

VCC >= Vdet or MON bit is disabled

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

LVD2CR1

Voltage Monitor %s Circuit Control Register 1
address_offset : 0xE2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDTSEL : Voltage Monitor Interrupt Generation Condition Select
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

#00 : 00

When VCC>=Vdet (rise) is detected

#01 : 01

When VCC

#10 : 10

When drop and rise are detected

#11 : 11

Settings prohibited

End of enumeration elements list.

IRQSEL : Voltage Monitor Interrupt Type Select
bits : 2 - 1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Non-maskable interrupt

#1 : 1

Maskable interrupt

End of enumeration elements list.

Reserved : These bits are read as 00000. The write value should be 00000.
bits : 3 - 6 (4 bit)
access : read-write

LVD2SR

Voltage Monitor %s Circuit Status Register
address_offset : 0xE3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

Enumeration:

#0 : 0

Not detected

#1 : 1

Vdet1 passage detection

End of enumeration elements list.

MON : Voltage Monitor 1 Signal Monitor Flag
bits : 1 - 0 (0 bit)
access : read-only

Enumeration:

#0 : 0

VCC < Vdet

#1 : 1

VCC >= Vdet or MON bit is disabled

End of enumeration elements list.

Reserved : These bits are read as 000000. The write value should be 000000.
bits : 2 - 6 (5 bit)
access : read-write

VBTBKR[43]

VBATT Backup Register [%s]
address_offset : 0xE4B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[44]

VBATT Backup Register [%s]
address_offset : 0xE9DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[45]

VBATT Backup Register [%s]
address_offset : 0xEF0B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[1]

VBATT Backup Register [%s]
address_offset : 0xF01 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[46]

VBATT Backup Register [%s]
address_offset : 0xF439 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[47]

VBATT Backup Register [%s]
address_offset : 0xF968 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VBTBKR[48]

VBATT Backup Register [%s]
address_offset : 0xFE98 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

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ChipSelect

SYSTEM

Peripheral Memory Blocks

Registers

VBTBKR[49]

VBTBKR[50]

VBTBKR[51]

VBTBKR[52]

VBTBKR[53]

VBTBKR[54]

VBTBKR[55]

VBTBKR[56]

VBTBKR[57]

VBTBKR[58]

VBTBKR[59]

VBTBKR[60]

VBTBKR[2]

VBTBKR[61]

VBTBKR[62]

VBTBKR[63]

VBTBKR[64]

VBTBKR[65]

VBTBKR[66]

VBTBKR[67]

VBTBKR[68]

VBTBKR[69]

VBTBKR[70]

VBTBKR[71]

VBTBKR[72]

VBTBKR[73]

VBTBKR[74]

VBTBKR[75]

VBTBKR[3]

VBTBKR[76]

VBTBKR[77]

VBTBKR[78]

VBTBKR[79]

VBTBKR[80]

VBTBKR[81]

VBTBKR[82]

VBTBKR[83]

VBTBKR[84]

MSTPCRA

VBTBKR[85]

VBTBKR[86]

VBTBKR[87]

VBTBKR[88]

VBTBKR[89]

VBTBKR[90]

VBTBKR[4]

VBTBKR[91]

VBTBKR[92]

VBTBKR[93]

VBTBKR[94]

VBTBKR[95]

VBTBKR[96]

SCKDIVCR

VBTBKR[97]

VBTBKR[98]

VBTBKR[99]

VBTBKR[100]

VBTBKR[101]

VBTBKR[102]

VBTBKR[103]

VBTBKR[104]

VBTBKR[105]

VBTBKR[5]

VBTBKR[106]

VBTBKR[107]

VBTBKR[108]

VBTBKR[109]

VBTBKR[110]

VBTBKR[111]

VBTBKR[112]

VBTBKR[113]

VBTBKR[114]

SCKSCR

VBTBKR[115]

VBTBKR[116]

VBTBKR[117]