\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x120 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x80 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x60 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xB0 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x28 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x3 Bytes (0x0)
size : 0x25 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x7 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2A Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x2B Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x40 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x42 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x43 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x62 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x63 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x66 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x67 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6A Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6B Bytes (0x0)
size : 0x15 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6E Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6F Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x82 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x83 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x86 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x87 Bytes (0x0)
size : 0x15 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8A Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8B Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xB2 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xB3 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC2 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC3 Bytes (0x0)
size : 0x25 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC6 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xC7 Bytes (0x0)
size : 0x24 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xE8 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xEA Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0xEB Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x102 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x103 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x122 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x123 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x126 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x127 Bytes (0x0)
size : 0x19 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x12A Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x12B Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x140 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x142 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x143 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x16C Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x16E Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x16F Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x180 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x182 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x183 Bytes (0x0)
size : 0x1C byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1A0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1A2 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1A3 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1A8 Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1AA Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1AB Bytes (0x0)
size : 0x14 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1C0 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1C2 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1C3 Bytes (0x0)
size : 0x18 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1E0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1E2 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1E3 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1E8 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1EA Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x1EB Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x200 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x202 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x203 Bytes (0x0)
size : 0x28 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x240 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x242 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x243 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x278 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x27A Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x27B Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
P000 Pin Function Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function SelectThese bits select the peripheral function. For individual pin functions, see the MPC table
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P00%s Pin Function Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x1054 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x1064 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x106C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x114 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x116 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x118 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P408 Pin Function Control Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive(DSCR1 = 0)/Middle drive for llC Fast-mode(DSCR1 = 1)
#1 : 1
Middle drive(DSCR1 = 0)/Setting prohibited(DSCR1 = 1)
End of enumeration elements list.
DSCR1 : Drive Strength Control Register
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive(DSCR = 0)/Middle drive(DSCR = 1)
#1 : 1
Middle drive for IIC Fast-mode(DSCR = 0)/Setting prohibited(DSCR = 1)
End of enumeration elements list.
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect falling edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the setting table.
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P408 Pin Function Control Register
address_offset : 0x122 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P408PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive(DSCR1 = 0)/Middle drive for llC Fast-mode(DSCR1 = 1)
#1 : 1
Middle drive(DSCR1 = 0)/Setting prohibited(DSCR1 = 1)
End of enumeration elements list.
DSCR1 : Drive Strength Control Register
bits : 11 - 10 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive(DSCR = 0)/Middle drive(DSCR = 1)
#1 : 1
Middle drive for IIC Fast-mode(DSCR = 0)/Setting prohibited(DSCR = 1)
End of enumeration elements list.
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect falling edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P408 Pin Function Control Register
address_offset : 0x123 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P408PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P0%s Pin Function Control Register
address_offset : 0x124 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P409 Pin Function Control Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P409 Pin Function Control Register
address_offset : 0x126 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P409 Pin Function Control Register
address_offset : 0x127 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x1270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x1282 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x128B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x12A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x1490 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x14A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x14AE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x14E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x151 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x16 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x162 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x162 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x164 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x166 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x167 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x169 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x16B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x16CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x16D5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x188 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x18C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x18E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x19 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x19C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x1A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x1A5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x1A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x1B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x1BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x1BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x1C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x1C8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x1D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x1D4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x1D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x1FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P000 Pin Function Control Register
address_offset : 0x2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P40%s Pin Function Control Register
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x204 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x206 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x20A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x211 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x21A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x21D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x234 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x238 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x23E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x243 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x254 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x256 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x256 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x259 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x264 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x26C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x284 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x286 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x2BC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x2C2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0x2C2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x2C2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x2C5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x2CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x2CB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x2CC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x2CF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x2D4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x2D8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x2DC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x2DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P000 Pin Function Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P000PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P60%s Pin Function Control Register
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x304 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x306 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x30A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x30D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x31C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x324 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x328 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x344 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x346 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x354 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x356 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x36 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x364 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P20%s Pin Function Control Register
address_offset : 0x36A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P20%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x37C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x382 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x384 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x385 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x386 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x392 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P2%s Pin Function Control Register
address_offset : 0x397 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P2%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x3AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x3B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x3B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x3B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x3C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x3C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x3C4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x3C6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x3CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x3CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x3D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x3D4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x3D6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x3F6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x3FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x400 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x404 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x406 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x40C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x414 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x418 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x448 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x44E Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P5%s Pin Function Control Register
address_offset : 0x451 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P5%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x480 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x484 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x484 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x486 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x48A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x48D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x4A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x4AA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x4AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x4AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x4B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x4B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x4C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x4C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x4CC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x4D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x4E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x4EA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x4ED Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x4F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x4F4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P9%sPFS
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x4F6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P9%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x4FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x502 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x505 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x50C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x514 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x518 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x518 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x52 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x522 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x527 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x54 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x544 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x54A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x54D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x56 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x598 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x598 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x5A4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x5A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x5A6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x5AA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x5AA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x5AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x5AD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x5BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x5C2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x5C5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x5E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x5EA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x5EF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P108 Pin Function Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the setting table.
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P80%s Pin Function Control Register
address_offset : 0x604 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x60A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x60C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x60D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x614 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x618 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P108 Pin Function Control Register
address_offset : 0x62 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P40%s Pin Function Control Register
address_offset : 0x628 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P108 Pin Function Control Register
address_offset : 0x63 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P108PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P40%s Pin Function Control Register
address_offset : 0x634 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x63A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P109 Pin Function Control Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the setting table.
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P50%s Pin Function Control Register
address_offset : 0x658 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P109 Pin Function Control Register
address_offset : 0x66 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Port Drive Capability
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
Middle drive.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Failing
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
No effected
#1 : 1
Detect failing edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P50%s Pin Function Control Register
address_offset : 0x662 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x667 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P109 Pin Function Control Register
address_offset : 0x67 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P109PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P30%s Pin Function Control Register
address_offset : 0x674 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P110 Pin Function Control Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x684 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x68C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x694 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P110 Pin Function Control Register
address_offset : 0x6A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x6A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P3%s Pin Function Control Register
address_offset : 0x6A9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P3%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x6AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P110 Pin Function Control Register
address_offset : 0x6B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P110PFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x6B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x6B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x6C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x6CA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x6CD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x6D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x70C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x714 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x718 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x718 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x724 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x72A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x73C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x74A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x751 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x754 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x766 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x76C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x76F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x772 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P9%sPFS
reset_Mask : 0x0
P9%s Pin Function Control Register
address_offset : 0x775 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P9%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x798 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x7A2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x7A7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x7A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x7AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x7B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x7B4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x7B8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x7BA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x80C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x814 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0x818 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x82 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0
P200 Pin Function Control Register
address_offset : 0x83 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P200PFS
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x838 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x84 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P201 Pin Function Control Register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
High drive
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect falling edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
PMR : Port Mode Control
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Uses the pin as a general I/O pin.
#1 : 1
Uses the pin as an I/O port for peripheral functions.
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 17 - 22 (6 bit)
access : read-write
PSEL : Port Function Select These bits select the peripheral function. For individual pin functions, see the setting table.
bits : 24 - 27 (4 bit)
access : read-write
Reserved : These bits are read as 000. The write value should be 000.
bits : 29 - 30 (2 bit)
access : read-write
P30%s Pin Function Control Register
address_offset : 0x84C Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0x85 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x854 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P30%s Pin Function Control Register
address_offset : 0x856 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P30%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0x86 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P201 Pin Function Control Register
address_offset : 0x86 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : These bits are read as 000. The write value should be 000.
bits : 7 - 8 (2 bit)
access : read-write
DSCR : Drive Strength Control Register
bits : 10 - 9 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low drive
#1 : 1
High drive
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 11 - 10 (0 bit)
access : read-write
EOR : Event on Rising
bits : 12 - 11 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect rising edge
End of enumeration elements list.
EOF : Event on Falling
bits : 13 - 12 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not care
#1 : 1
Detect falling edge
End of enumeration elements list.
ISEL : IRQ input enable
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Not used as IRQn input pin
#1 : 1
Used as IRQn input pin
End of enumeration elements list.
ASEL : Analog Input enable
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Used other than as analog pin
#1 : 1
Used as analog pin
End of enumeration elements list.
P6%s Pin Function Control Register
address_offset : 0x860 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x862 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x864 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P4%s Pin Function Control Register
address_offset : 0x869 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P409PFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x86A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x86C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0x86F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P201 Pin Function Control Register
address_offset : 0x87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P201PFS
reset_Mask : 0x0
PODR : Port Output Data
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Low output
#1 : 1
High output
End of enumeration elements list.
PIDR : Port Input Data
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Low input
#1 : 1
High input
End of enumeration elements list.
PDR : Port Direction
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Input (Functions as an input pin.)
#1 : 1
Output (Functions as an output pin.)
End of enumeration elements list.
PCR : Pull-up Control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disables an input pull-up.
#1 : 1
Enables an input pull-up.
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 5 - 4 (0 bit)
access : read-write
NCODR : N-Channel Open Drain Control
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
CMOS output
#1 : 1
NMOS open-drain output
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
P00%s Pin Function Control Register
address_offset : 0x8C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x8D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x8E2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0x8E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x8FC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x90A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x90C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0x911 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x914 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P90%s Pin Function Control Register
address_offset : 0x918 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P90%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x928 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x934 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0x93A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x970 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x982 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P40%s Pin Function Control Register
address_offset : 0x98B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P40%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x9A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x9AA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P7%s Pin Function Control Register
address_offset : 0x9AF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P7%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xA18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xA22 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0xA24 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xA27 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P6%s Pin Function Control Register
address_offset : 0xA2A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P6%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xA54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xA6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xA64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xA6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xAA8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xAB4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xABA Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xABC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xACA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xAD1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xAF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xB4 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xB8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xBB0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xBC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P50%s Pin Function Control Register
address_offset : 0xBCB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P50%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC2 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xC28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P300 Pin Function Control Register
address_offset : 0xC3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P300PFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xC34 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xC3A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xC54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xC64 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P60%s Pin Function Control Register
address_offset : 0xC6C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P60%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xC7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xC8A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P70%s Pin Function Control Register
address_offset : 0xC91 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P70%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0xCA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xCC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P10%s Pin Function Control Register
address_offset : 0xCD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P10%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xD6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0xDC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P1%s Pin Function Control Register
address_offset : 0xDE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P1%sPFS
reset_Mask : 0x0
P00%s Pin Function Control Register
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P00%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xE3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xE4A Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P80%s Pin Function Control Register
address_offset : 0xE51 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P80%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xEA Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
P0%s Pin Function Control Register
address_offset : 0xEF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
alternate_register : P0%sPFS
reset_Mask : 0x0
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