\n
address_offset : 0x0 Bytes (0x0)
size : 0x5 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6 Bytes (0x0)
size : 0x6 byte (0x0)
mem_usage : registers
protection : not protected
CAC Control Register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CFME : Clock Frequency Measurement Enable.
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
Reserved : These bits are read as 0000000. The write value should be 0000000.
bits : 1 - 6 (6 bit)
access : read-write
CAC Control Register 1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CACREFE : CACREF Pin Input Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
FMCS : Measurement Target Clock Select
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
#000 : 000
Main clock
#001 : 001
Sub-clock
#010 : 010
HOCO clock
#011 : 011
MOCO clock
#100 : 100
LOCO clock
#101 : 101
Peripheral module clock(PCLKB)
#110 : 110
IWDTCLK clock
#111 : 111
Setting prohibited
End of enumeration elements list.
TCSS : Measurement Target Clock Frequency Division Ratio Select
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#00 : 00
No division
#01 : 01
x 1/4 clock
#10 : 10
x 1/8 clock
#11 : 11
x 1/32 clock
End of enumeration elements list.
EDGES : Valid Edge Select
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#00 : 00
Rising edge
#01 : 01
Falling edge
#10 : 10
Both rising and falling edges
#11 : 11
Setting prohibited
End of enumeration elements list.
CAC Control Register 2
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RPS : Reference Signal Select
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
CACREF pin input
#1 : 1
Internal clock (internally generated signal)
End of enumeration elements list.
RSCS : Measurement Reference Clock Select
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
#000 : 000
Main clock
#001 : 001
Sub-clock
#010 : 010
HOCO clock
#011 : 011
MOCO clock
#100 : 100
LOCO clock
#101 : 101
Peripheral module clock(PCLKB)
#110 : 110
IWDTCLK clock
#111 : 111
Setting prohibited
End of enumeration elements list.
RCDS : Measurement Reference Clock Frequency Division Ratio Select
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
#00 : 00
1/32 clock
#01 : 01
1/128 clock
#10 : 10
1/1024 clock
#11 : 11
1/8192 clock
End of enumeration elements list.
DFS : Digital Filter Selection
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#00 : 00
Digital filtering is disabled.
#01 : 01
The sampling clock for the digital filter is the frequency measuring clock.
#10 : 10
The sampling clock for the digital filter is the frequency measuring clock divided by 4.
#11 : 11
The sampling clock for the digital filter is the frequency measuring clock divided by 16.
End of enumeration elements list.
CAC Interrupt Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FERRIE : Frequency Error Interrupt Request Enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
MENDIE : Measurement End Interrupt Request Enable
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
OVFIE : Overflow Interrupt Request Enable
bits : 2 - 1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable
#1 : 1
Enable
End of enumeration elements list.
FERRFCL : FERRF Clear
bits : 4 - 3 (0 bit)
access : write-only
Enumeration:
#0 : 0
No effect on operations
#1 : 1
Clears the FERRF flag
End of enumeration elements list.
MENDFCL : MENDF Clear
bits : 5 - 4 (0 bit)
access : write-only
Enumeration:
#0 : 0
No effect on operations
#1 : 1
Clears the MENDF flag
End of enumeration elements list.
OVFFCL : OVFF Clear
bits : 6 - 5 (0 bit)
access : write-only
Enumeration:
#0 : 0
No effect on operations
#1 : 1
Clears the OVFF flag
End of enumeration elements list.
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
Reserved : This bit is read as 0. The write value should be 0.
bits : 7 - 6 (0 bit)
access : read-write
CAC Status Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
FERRF : Frequency Error Flag
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : 0
The clock frequency is within the range corresponding to the settings.
#1 : 1
The clock frequency has deviated beyond the range corresponding to the settings (frequency error).
End of enumeration elements list.
MENDF : Measurement End Flag
bits : 1 - 0 (0 bit)
access : read-only
Enumeration:
#0 : 0
Measurement is in progress.
#1 : 1
Measurement has ended.
End of enumeration elements list.
OVFF : Counter Overflow Flag
bits : 2 - 1 (0 bit)
access : read-only
Enumeration:
#0 : 0
The counter has not overflowed.
#1 : 1
The counter has overflowed.
End of enumeration elements list.
CAC Upper-Limit Value Setting Register
address_offset : 0x6 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CAULVR : CAULVR is a 16-bit readable/writable register that stores the upper-limit value of the frequency.
bits : 0 - 14 (15 bit)
access : read-write
CAC Lower-Limit Value Setting Register
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CALLVR : CALLVR is a 16-bit readable/writable register that stores the lower-limit value of the frequency.
bits : 0 - 14 (15 bit)
access : read-write
CAC Counter Buffer Register
address_offset : 0xA Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CACNTBR : CACNTBR is a 16-bit read-only register that retains the counter value at the time a valid reference signal edge is input
bits : 0 - 14 (15 bit)
access : read-only
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