\n
address_offset : 0x0 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x100 Bytes (0x0)
size : 0x36 byte (0x0)
mem_usage : registers
protection : not protected
LCD Mode Register 0
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LBAS : LCD Display Bias Method Select
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : 00
1/2 bias method
#01 : 01
1/3 bias method
#10 : 10
1/4 bias method
#11 : 11
Setting prohibited
End of enumeration elements list.
LDTY : Time Slice of LCD Display Select
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
#000 : 000
Static
#001 : 001
2-time slice
#010 : 010
3-time slice
#011 : 011
4-time slice
#101 : 101
8-time slice
End of enumeration elements list.
LWAVE : LCD display waveform selection
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Waveform A
#1 : 1
Waveform B
End of enumeration elements list.
MDSET : LCD drive voltage generator selection
bits : 6 - 6 (1 bit)
access : read-write
Enumeration:
#00 : 00
External resistance division method
#01 : 01
Internal voltage boosting method
#10 : 10
Capacitor split method
#11 : 11
Setting prohibited
End of enumeration elements list.
LCD Mode Register 1
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LCDVLM : Voltage Boosting Pin Initial Value Switching Control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Set when VDD >= 2.7 V
#1 : 1
Set when VDD <= 4.2 V
End of enumeration elements list.
Reserved : These bits are read as 00. The write value should be 00.
bits : 1 - 1 (1 bit)
access : read-write
LCDSEL : Display data area control
bits : 3 - 2 (0 bit)
access : read-write
Enumeration:
#0 : 0
Displaying an A-pattern area data (lower four bits of LCD display data register)(BLON=0)/Alternately displaying A-pattern and B-pattern area data (blinking display corresponding to the constant-period interrupt (INTRTC) timing of the real-time clock (RTC))(BLON=1)
#1 : 1
Displaying a B-pattern area data (higher four bits of LCD display data register)(BLON=0)/Alternately displaying A-pattern and B-pattern area data (blinking display corresponding to the constant-period interrupt (INTRTC) timing of the real-time clock (RTC))(BLON=1)
End of enumeration elements list.
BLON : Display data area control
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Displaying an A-pattern area data (lower four bits of LCD display data register)(LCDSEL=0)/Displaying a B-pattern area data (higher four bits of LCD display data register)(LCDSEL=1)
#1 : 1
Alternately displaying A-pattern and B-pattern area data (blinking display corresponding to the constant-period interrupt (INTRTC) timing of the real-time clock (RTC))
End of enumeration elements list.
VLCON : Voltage boost circuit or capacitor split circuit operation enable/disable
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stops voltage boost circuit or capacitor split circuit operation
#1 : 1
Enables voltage boost circuit or capacitor split circuit operation
End of enumeration elements list.
SCOC : LCD Display Enable/Disable
bits : 6 - 5 (0 bit)
access : read-write
Enumeration:
#0 : 0
Output ground level to segment/common pin(LCDON=0)/Output ground level to segment/common pin(LCDON=1)
#1 : 1
Display off (all segment outputs are deselected)(LCDON=0)/Display on(LCDON=1)
End of enumeration elements list.
LCDON : LCD Display Enable/Disable
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Output ground level to segment/common pin(SCOC=0)/Display off (all segment outputs are deselected)(SCOC=1)
#1 : 1
Output ground level to segment/common pin(SCOC=0)/Display on(SCOC=1)
End of enumeration elements list.
LCD Display Data Register %s
address_offset : 0x1069 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1178 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1288 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1399 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x14AB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x15BE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x16D2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x17E7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x18FD Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1A14 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1B2C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1C45 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1D5F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1E7A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x1F96 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Clock Control Register 0
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LCDC : LCD clock (LCDCL)
bits : 0 - 4 (5 bit)
access : read-write
Enumeration:
#000001 : 000001
(Sub clock)/22 or (LOCO clock)/22
#000010 : 000010
(Sub clock)/23 or (LOCO clock)/23
#000011 : 000011
(Sub clock)/24 or (LOCO clock)/24
#000100 : 000100
(Sub clock)/25 or (LOCO clock)/25
#000101 : 000101
(Sub clock)/26 or (LOCO clock)/26
#000110 : 000110
(Sub clock)/27 or (LOCO clock)/27
#000111 : 000111
(Sub clock)/28 or (LOCO clock)/28
#001000 : 001000
(Sub clock)/29 or (LOCO clock)/29
#001001 : 001001
(Sub clock)/210 or (LOCO clock)/210
#010001 : 010001
(Main clock)/28 or (HOCO clock)/28
#010010 : 010010
(Main clock)/29 or (HOCO clock)/29
#010011 : 010011
(Main clock)/210 or (HOCO clock)/210
#010100 : 010100
(Main clock)/211 or (HOCO clock)/211
#010101 : 010101
(Main clock)/212 or (HOCO clock)/212
#010110 : 010110
(Main clock)/213 or (HOCO clock)/213
#010111 : 010111
(Main clock)/214 or (HOCO clock)/214
#011000 : 011000
(Main clock)/215 or (HOCO clock)/215
#011001 : 011001
(Main clock)/216 or (HOCO clock)/216
#011010 : 011010
(Main clock)/217 or (HOCO clock)/217
#011011 : 011011
(Main clock)/218 or (HOCO clock)/218
#101011 : 101011
(Main clock)/219 or (HOCO clock)/219
End of enumeration elements list.
LCD Display Data Register %s
address_offset : 0x200 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x20B3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x21D1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x22F0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2410 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2531 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2653 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2776 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x289A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x29BF Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2AE5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2C0C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2D34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2E5D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x2F87 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Boost Level Control Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VLCD : Reference Voltage(Contrast Adjustment) Select
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00100 : 00100
Reference voltageselection(contrast adjustment): 1.00 V (default) VL4 voltage: 3.00 V(1/3 bias method)/4.00 V(1/4 bias method)
#00101 : 00101
Reference voltageselection(contrast adjustment): 1.05 V VL4 voltage: 3.15 V(1/3 bias method)/4.20 V(1/4 bias method)
#00110 : 00110
Reference voltageselection(contrast adjustment): 1.10 V VL4 voltage: 3.30 V(1/3 bias method)/4.40 V(1/4 bias method)
#00111 : 00111
Reference voltageselection(contrast adjustment): 1.15 V VL4 voltage: 3.45 V(1/3 bias method)/4.60 V(1/4 bias method)
#01000 : 01000
Reference voltageselection(contrast adjustment): 1.20 V VL4 voltage: 3.60 V(1/3 bias method)/4.80 V(1/4 bias method)
#01001 : 01001
Reference voltageselection(contrast adjustment): 1.25 V VL4 voltage: 3.75 V(1/3 bias method)/5.00 V(1/4 bias method)
#01010 : 01010
Reference voltageselection(contrast adjustment): 1.30 V VL4 voltage: 3.90 V(1/3 bias method)/5.20 V(1/4 bias method)
#01011 : 01011
Reference voltageselection(contrast adjustment): 1.35 V VL4 voltage: 4.05 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#01100 : 01100
Reference voltageselection(contrast adjustment): 1.40 V VL4 voltage: 4.20 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#01101 : 01101
Reference voltageselection(contrast adjustment): 1.45 V VL4 voltage: 4.35 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#01110 : 01110
Reference voltageselection(contrast adjustment): 1.50 V VL4 voltage: 4.50 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#01111 : 01111
Reference voltageselection(contrast adjustment): 1.55 V VL4 voltage: 4.65 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#10000 : 10000
Reference voltageselection(contrast adjustment): 1.60 V VL4 voltage: 4.80 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#10001 : 10001
Reference voltageselection(contrast adjustment): 1.65 V VL4 voltage: 4.95 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#10010 : 10010
Reference voltageselection(contrast adjustment): 1.70 V VL4 voltage: 5.10 V(1/3 bias method)/Setting prohibited(1/4 bias method)
#10011 : 10011
Reference voltageselection(contrast adjustment): 1.75 V VL4 voltage: 5.25 V(1/3 bias method)/Setting prohibited(1/4 bias method)
End of enumeration elements list.
LCD Display Data Register %s
address_offset : 0x301 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x30B2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x31DE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x330B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3439 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3568 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3698 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x37C9 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x38FB Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3A2E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3B62 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x3C97 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x403 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x506 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x60A Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x70F Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x815 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0x91C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xA24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xB2D Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xC37 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xD42 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xE4E Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
LCD Display Data Register %s
address_offset : 0xF5B Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SEG : LCD Display Data
bits : 0 - 6 (7 bit)
access : read-write
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