\n

TAPA

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x40 byte (0x0)
mem_usage : registers
protection : not protected

Registers

TAPAFLG

TAPAOPHS

TAPAOPHT

TAPACTLO

TAPACTL1

TAPAEMU

TAPAACWE

TAPAACTS

TAPAACTT


TAPAFLG

TAPA FLAG Register
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TAPAFLG TAPAFLG read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TAPAOPHS

Hi-Z Start Trigger Register
address_offset : 0x14 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TAPAOPHS TAPAOPHS write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPAOPHT

Hi-Z Stop Trigger Register
address_offset : 0x18 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TAPAOPHT TAPAOPHT write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPACTLO

Control Register 0
address_offset : 0x20 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAPACTLO TAPACTLO read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

TAPACTL1

Control Register 1
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAPACTL1 TAPACTL1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPAEMU

Emulation Register
address_offset : 0x28 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAPAEMU TAPAEMU read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPAACWE

Asynchronous Hi-Z Start Trigger Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TAPAACWE TAPAACWE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPAACTS

Asynchronous Hi-Z Stop Trigger Register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TAPAACTS TAPAACTS write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

TAPAACTT

Asynchronous Hi-Z Stop Trigger Register
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

TAPAACTT TAPAACTT write-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0


Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.