\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x3 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x6 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
D/A Conversion Value Setting Register %s
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write
D/A Conversion Value Setting Register %s
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write
D/A Conversion Value Setting Register %s
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write
D/A Conversion Value Setting Register %s
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write
D/A Converter Mode Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAMD0 : D/A operation mode select 0
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Channel 0 for normal operation mode
#1 : 1
Channel 0 for real-time output mode(event link)
End of enumeration elements list.
DAMD1 : D/A operation mode select 1
bits : 1 - 0 (0 bit)
access : read-write
Enumeration:
#0 : 0
Channel 1 for normal operation mode
#1 : 1
Channel 1 for real-time output mode(event link)
End of enumeration elements list.
DACE0 : D/A operation enable 0
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
D/A conversion disabled for channel 0
#1 : 1
D/A conversion enabled for channel 0
End of enumeration elements list.
DACE1 : D/A operation enable 1
bits : 5 - 4 (0 bit)
access : read-write
Enumeration:
#0 : 0
D/A conversion disabled for channel 1
#1 : 1
D/A conversion enabled for channel 1
End of enumeration elements list.
D/A A/D Synchronous Start Control Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DACADST : D/A A/D Synchronous Conversion
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not synchronize DAC8 with ADC16 operation (disable interference reduction between D/A and A/D conversion)
#1 : 1
Synchronize DAC8 with ADC16 operation (enable interference reduction between D/A and A/D conversion).
End of enumeration elements list.
D/A SW Charge Pump Control Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PUMPEN : Charge pump enable
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Charge pump disable
#1 : 1
Charge pump enable
End of enumeration elements list.
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