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R_DAC8

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x3 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x6 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DACS[0]

DACS0

DACS[1]

DACS1

DAM

DACADSCR

DACPC


DACS[0]

D/A Conversion Value Setting Register %s
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACS[0] DACS[0] read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACS

DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write


DACS0

D/A Conversion Value Setting Register %s
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACS0 DACS0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACS

DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write


DACS[1]

D/A Conversion Value Setting Register %s
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACS[1] DACS[1] read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACS

DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write


DACS1

D/A Conversion Value Setting Register %s
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACS1 DACS1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACS

DACS : DACS D/A conversion store data
bits : 0 - 6 (7 bit)
access : read-write


DAM

D/A Converter Mode Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DAM DAM read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DAMD0 DAMD1 DACE0 DACE1

DAMD0 : D/A operation mode select 0
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Channel 0 for normal operation mode

#1 : 1

Channel 0 for real-time output mode(event link)

End of enumeration elements list.

DAMD1 : D/A operation mode select 1
bits : 1 - 0 (0 bit)
access : read-write

Enumeration:

#0 : 0

Channel 1 for normal operation mode

#1 : 1

Channel 1 for real-time output mode(event link)

End of enumeration elements list.

DACE0 : D/A operation enable 0
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

D/A conversion disabled for channel 0

#1 : 1

D/A conversion enabled for channel 0

End of enumeration elements list.

DACE1 : D/A operation enable 1
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

D/A conversion disabled for channel 1

#1 : 1

D/A conversion enabled for channel 1

End of enumeration elements list.


DACADSCR

D/A A/D Synchronous Start Control Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACADSCR DACADSCR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DACADST

DACADST : D/A A/D Synchronous Conversion
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Do not synchronize DAC8 with ADC16 operation (disable interference reduction between D/A and A/D conversion)

#1 : 1

Synchronize DAC8 with ADC16 operation (enable interference reduction between D/A and A/D conversion).

End of enumeration elements list.


DACPC

D/A SW Charge Pump Control Register
address_offset : 0x7 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DACPC DACPC read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PUMPEN

PUMPEN : Charge pump enable
bits : 0 - -1 (0 bit)
access : read-write

Enumeration:

#0 : 0

Charge pump disable

#1 : 1

Charge pump enable

End of enumeration elements list.



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