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R_PMISC

Peripheral Memory Blocks

address_offset : 0x3 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PFENET

PWPR


PFENET

Ethernet Control Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PFENET PFENET read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 Reserved PHYMODE0 PHYMODE1 Reserved

Reserved : These bits are read as 0000. The write value should be 0000.
bits : 0 - 2 (3 bit)
access : read-write

PHYMODE0 : Ethernet Mode Setting ch0
bits : 4 - 3 (0 bit)
access : read-write

Enumeration:

#0 : 0

RMII mode (ETHERC channel 0)

#1 : 1

MII mode (ETHERC channel 0)

End of enumeration elements list.

PHYMODE1 : Ethernet Mode Setting ch1
bits : 5 - 4 (0 bit)
access : read-write

Enumeration:

#0 : 0

RMII mode (ETHERC channel 1)

#1 : 1

MII mode (ETHERC channel 1)

End of enumeration elements list.

Reserved : These bits are read as 00. The write value should be 00.
bits : 6 - 6 (1 bit)
access : read-write


PWPR

Write-Protect Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PWPR PWPR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 PFSWE B0WI

PFSWE : PmnPFS Register Write
bits : 6 - 5 (0 bit)
access : read-write

Enumeration:

#0 : 0

Writing to the PmnPFS register is disabled

#1 : 1

Writing to the PmnPFS register is enabled.

End of enumeration elements list.

B0WI : PFSWE Bit Write Disable
bits : 7 - 6 (0 bit)

Enumeration:

#0 : 0

Writing to the PFSWE bit is enabled

End of enumeration elements list.



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