\n
address_offset : 0x0 Bytes (0x0)
size : 0x2 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x4 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x30 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x34 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x3C Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x24 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected
address_offset : 0x8 Bytes (0x0)
size : 0x19 byte (0x0)
mem_usage : registers
protection : not protected
Startup Control Register 1
address_offset : 0x0 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKDIV : SDADC24 Reference Clock Division
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
#0000 : 0000
No Division
#0001 : 0001
SDADCCLK/2
#0010 : 0010
SDADCCLK/3
#0011 : 0011
SDADCCLK/4
#0100 : 0100
SDADCCLK/5
#0101 : 0101
SDADCCLK/6
#0110 : 0110
SDADCCLK/8
#0111 : 0111
SDADCCLK/12
#1000 : 1000
SDADCCLK/16
End of enumeration elements list.
SDADLPM : A/D conversion operation model select
bits : 7 - 6 (0 bit)
access : read-write
Enumeration:
#0 : 0
Normal A/D conversion mode, SDADC Reference Clock: 4 MHz, Oversampingly clock: 1MHz
End of enumeration elements list.
VSBIAS : Reference voltage select
bits : 8 - 10 (3 bit)
access : read-write
Enumeration:
#0000 : 0000
0.8V
#0001 : 0001
1.0V
#0010 : 0010
1.2V
#0011 : 0011
1.4V
#0100 : 0100
1.6V
#0101 : 0101
1.8V
#0110 : 0110
2.0V
#0111 : 0111
2.2V
#1111 : 1111
2.4V(only available when VREFSEL=0)
End of enumeration elements list.
VREFSEL : VREF mode select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Internal VREF Mode
End of enumeration elements list.
Input Multiplexer %s Setting Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGC : Gain selection of a programmable gain instrumentation amplifier ( Gset1, Gset2, Gtotal )
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00000 : 00000
(1, 1, 1)
#00100 : 00100
(2, 1, 2)
#01000 : 01000
(3, 1, 3)
#01100 : 01100
(4, 1, 4)
#10000 : 10000
(8, 1, 8)
#00001 : 00001
(1, 2, 2)
#00101 : 00101
(2, 2, 4)
#01001 : 01001
(3, 2, 6)
#01101 : 01101
(4, 2, 8)
#10001 : 10001
(8, 2, 16)
#00010 : 00010
(1, 4, 4)
#00110 : 00110
(2, 4, 8)
#01010 : 01010
(3, 4, 12)
#01110 : 01110
(4, 4, 16)
#10010 : 10010
(8, 4, 32)
#00011 : 00011
(1, 8, 8)
#00111 : 00111
(2, 8, 16)
#01011 : 01011
(3, 8, 24)
#01111 : 01111
(4, 8, 32).
End of enumeration elements list.
PGAOSR : Oversampling ratio select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#000 : 000
64
#001 : 001
128
#010 : 010
256
#011 : 011
512
#100 : 100
1024
#101 : 101
2048
End of enumeration elements list.
PGAOFS : Offset voltage select
bits : 8 - 11 (4 bit)
access : read-write
PGAPOL : Polarity select
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Positive-side single-end input
#1 : 1
Negative-side single-end input
End of enumeration elements list.
PGASEL : Analog Channel Input Mode Select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Differential input mode
#1 : 1
Single-end input mode
End of enumeration elements list.
PGACTM : Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN
bits : 16 - 19 (4 bit)
access : read-write
PGACTN : Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
#000 : 000
0
#001 : 001
1
#010 : 010
2
#011 : 011
3
#100 : 100
4
#101 : 101
5
#110 : 110
6
#111 : 111
7
End of enumeration elements list.
PGAAVN : Selection of the number of data to be averaged
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#00 : 00
8
#01 : 01
16
#10 : 10
32
#11 : 11
64
End of enumeration elements list.
PGAAVE : Selection of averaging processing
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#00 : 00
Do not average the A/D conversion results
#01 : 01
Do not average the A/D conversion results
#10 : 10
Average the A/D conversion results and generates SDADC_ADI each time an A/D conversion occurs
#11 : 11
Perform averaging, and generate SDADC_ADI at each time of average value output (A/D conversion is performed N times).
End of enumeration elements list.
PGAREV : Single-End Input A/D Converted Data Inversion Select
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not invert the conversion result data
#1 : 1
Invert the conversion result data
End of enumeration elements list.
PGACVE : Calibration enable
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not calculate the calibration correction factor
#1 : 1
Calculate the calibration correction factor
End of enumeration elements list.
PGAASN : Selection of the mode for specifying the number of A/D conversions in ADSCAN
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : 0
Specify 1 to 8,032 times by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
#1 : 1
Specify 1 to 255 times linearly by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
End of enumeration elements list.
Input Multiplexer %s Setting Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGC : Gain selection of a programmable gain instrumentation amplifier ( Gset1, Gset2, Gtotal )
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00000 : 00000
(1, 1, 1)
#00100 : 00100
(2, 1, 2)
#01000 : 01000
(3, 1, 3)
#01100 : 01100
(4, 1, 4)
#10000 : 10000
(8, 1, 8)
#00001 : 00001
(1, 2, 2)
#00101 : 00101
(2, 2, 4)
#01001 : 01001
(3, 2, 6)
#01101 : 01101
(4, 2, 8)
#10001 : 10001
(8, 2, 16)
#00010 : 00010
(1, 4, 4)
#00110 : 00110
(2, 4, 8)
#01010 : 01010
(3, 4, 12)
#01110 : 01110
(4, 4, 16)
#10010 : 10010
(8, 4, 32)
#00011 : 00011
(1, 8, 8)
#00111 : 00111
(2, 8, 16)
#01011 : 01011
(3, 8, 24)
#01111 : 01111
(4, 8, 32).
End of enumeration elements list.
PGAOSR : Oversampling ratio select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#000 : 000
64
#001 : 001
128
#010 : 010
256
#011 : 011
512
#100 : 100
1024
#101 : 101
2048
End of enumeration elements list.
PGAOFS : Offset voltage select
bits : 8 - 11 (4 bit)
access : read-write
PGAPOL : Polarity select
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Positive-side single-end input
#1 : 1
Negative-side single-end input
End of enumeration elements list.
PGASEL : Analog Channel Input Mode Select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Differential input mode
#1 : 1
Single-end input mode
End of enumeration elements list.
PGACTM : Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN
bits : 16 - 19 (4 bit)
access : read-write
PGACTN : Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
#000 : 000
0
#001 : 001
1
#010 : 010
2
#011 : 011
3
#100 : 100
4
#101 : 101
5
#110 : 110
6
#111 : 111
7
End of enumeration elements list.
PGAAVN : Selection of the number of data to be averaged
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#00 : 00
8
#01 : 01
16
#10 : 10
32
#11 : 11
64
End of enumeration elements list.
PGAAVE : Selection of averaging processing
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#00 : 00
Do not average the A/D conversion results
#01 : 01
Do not average the A/D conversion results
#10 : 10
Average the A/D conversion results and generates SDADC_ADI each time an A/D conversion occurs
#11 : 11
Perform averaging, and generate SDADC_ADI at each time of average value output (A/D conversion is performed N times).
End of enumeration elements list.
PGAREV : Single-End Input A/D Converted Data Inversion Select
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not invert the conversion result data
#1 : 1
Invert the conversion result data
End of enumeration elements list.
PGACVE : Calibration enable
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not calculate the calibration correction factor
#1 : 1
Calculate the calibration correction factor
End of enumeration elements list.
PGAASN : Selection of the mode for specifying the number of A/D conversions in ADSCAN
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : 0
Specify 1 to 8,032 times by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
#1 : 1
Specify 1 to 255 times linearly by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
End of enumeration elements list.
Sigma-Delta A/D Converter Control Register 1
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDADSCM : Selection of autoscan mode
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Continuous scan mode
#1 : 1
Single scan mode
End of enumeration elements list.
SDADTMD : Selection of A/D conversion trigger signal
bits : 4 - 3 (0 bit)
access : read-write
Enumeration:
#0 : 0
Software trigger (conversion is started by a write to SFR)
#1 : 1
Hardware trigger (conversion is started in synchronization with the event signal selected by ELC_SDADC24).
End of enumeration elements list.
SDADBMP : A/D conversion control of the signal from input multiplexer
bits : 8 - 11 (4 bit)
access : read-write
PGADISA : Control of disconnection detection
bits : 16 - 15 (0 bit)
access : read-write
Enumeration:
#0 : 0
Normal operation
#1 : 1
State of disconnection detection
End of enumeration elements list.
PGADISC : Disconnection Detection Assist Setting
bits : 17 - 16 (0 bit)
access : read-write
Enumeration:
#0 : 0
Discharge
#1 : 1
Pre-charge
End of enumeration elements list.
PGASLFT : PGA offset self-diagnosis enable
bits : 20 - 19 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable PGA offset self-diagnosis
#1 : 1
Enable PGA offset self-diagnosis
End of enumeration elements list.
Sigma-Delta A/D Converter Control Register 2
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDADST : Control of A/D conversion
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Stop A/D conversion
#1 : 1
Start A/D conversion
End of enumeration elements list.
Sigma-delta A/D Converter Conversion Result Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SDADCRD : The 24-bit A/D conversion result
bits : 0 - 22 (23 bit)
access : read-only
SDADCRS : Status of an A/D conversion result
bits : 24 - 23 (0 bit)
access : read-only
Enumeration:
#0 : 0
Normal status (within the range)
#1 : 1
Overflow occurred
End of enumeration elements list.
SDADCRC : Channel number for an A/D conversion result
bits : 25 - 26 (2 bit)
access : read-only
Enumeration:
#000 : 000
Reset value (Conversion result is invalid)
#001 : 001
Input multiplexer 0 (ANSD0P / ANSD0N)
#010 : 010
Input multiplexer 1 (ANSD1P / ANSD1N)
#011 : 011
Input multiplexer 2 (ANSD2P / ANSD2N)
#100 : 100
Input multiplexer 3 (ANSD3P / ANSD3N)
#101 : 101
Input multiplexer 4 (AMP0O / AMP1O)
End of enumeration elements list.
Sigma-delta A/D Converter Average Value Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SDADMVD : The 24-bit A/D average value
bits : 0 - 22 (23 bit)
access : read-only
SDADMVS : Status of an A/D conversion result
bits : 24 - 23 (0 bit)
access : read-only
Enumeration:
#0 : 0
Normal status (within the range)
#1 : 1
Overflow occurred
End of enumeration elements list.
SDADMVC : Channel number for an A/D conversion result
bits : 25 - 26 (2 bit)
access : read-only
Enumeration:
#000 : 000
Reset value (Conversion result is invalid)
#001 : 001
Input multiplexer 0 (ANSD0P / ANSD0N)
#010 : 010
Input multiplexer 1 (ANSD1P / ANSD1N)
#011 : 011
Input multiplexer 2 (ANSD2P / ANSD2N)
#100 : 100
Input multiplexer 3 (ANSD3P / ANSD3N)
#101 : 101
Input multiplexer 4 (AMP0O / AMP1O).
End of enumeration elements list.
Input Multiplexer %s Setting Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGC : Gain selection of a programmable gain instrumentation amplifier ( Gset1, Gset2, Gtotal )
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00000 : 00000
(1, 1, 1)
#00100 : 00100
(2, 1, 2)
#01000 : 01000
(3, 1, 3)
#01100 : 01100
(4, 1, 4)
#10000 : 10000
(8, 1, 8)
#00001 : 00001
(1, 2, 2)
#00101 : 00101
(2, 2, 4)
#01001 : 01001
(3, 2, 6)
#01101 : 01101
(4, 2, 8)
#10001 : 10001
(8, 2, 16)
#00010 : 00010
(1, 4, 4)
#00110 : 00110
(2, 4, 8)
#01010 : 01010
(3, 4, 12)
#01110 : 01110
(4, 4, 16)
#10010 : 10010
(8, 4, 32)
#00011 : 00011
(1, 8, 8)
#00111 : 00111
(2, 8, 16)
#01011 : 01011
(3, 8, 24)
#01111 : 01111
(4, 8, 32).
End of enumeration elements list.
PGAOSR : Oversampling ratio select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#000 : 000
64
#001 : 001
128
#010 : 010
256
#011 : 011
512
#100 : 100
1024
#101 : 101
2048
End of enumeration elements list.
PGAOFS : Offset voltage select
bits : 8 - 11 (4 bit)
access : read-write
PGAPOL : Polarity select
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Positive-side single-end input
#1 : 1
Negative-side single-end input
End of enumeration elements list.
PGASEL : Analog Channel Input Mode Select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Differential input mode
#1 : 1
Single-end input mode
End of enumeration elements list.
PGACTM : Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN
bits : 16 - 19 (4 bit)
access : read-write
PGACTN : Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
#000 : 000
0
#001 : 001
1
#010 : 010
2
#011 : 011
3
#100 : 100
4
#101 : 101
5
#110 : 110
6
#111 : 111
7
End of enumeration elements list.
PGAAVN : Selection of the number of data to be averaged
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#00 : 00
8
#01 : 01
16
#10 : 10
32
#11 : 11
64
End of enumeration elements list.
PGAAVE : Selection of averaging processing
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#00 : 00
Do not average the A/D conversion results
#01 : 01
Do not average the A/D conversion results
#10 : 10
Average the A/D conversion results and generates SDADC_ADI each time an A/D conversion occurs
#11 : 11
Perform averaging, and generate SDADC_ADI at each time of average value output (A/D conversion is performed N times).
End of enumeration elements list.
PGAREV : Single-End Input A/D Converted Data Inversion Select
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not invert the conversion result data
#1 : 1
Invert the conversion result data
End of enumeration elements list.
PGACVE : Calibration enable
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not calculate the calibration correction factor
#1 : 1
Calculate the calibration correction factor
End of enumeration elements list.
PGAASN : Selection of the mode for specifying the number of A/D conversions in ADSCAN
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : 0
Specify 1 to 8,032 times by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
#1 : 1
Specify 1 to 255 times linearly by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
End of enumeration elements list.
Calibration Control Register
address_offset : 0x30 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLBMD : These bits are read as 0. The write value should be 0.
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
#00 : 00
Internal calibration mode
#01 : 01
External offset calibration mode
#10 : 10
External gain calibration mode
#11 : 11
Settings are prohibited
End of enumeration elements list.
Calibration Start Control Register
address_offset : 0x34 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLBST : Calibration start control
bits : 0 - -1 (0 bit)
access : read-write
Enumeration:
#0 : 0
Disable writing
#1 : 1
Start calibration
End of enumeration elements list.
Calibration Status Register
address_offset : 0x3C Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CLBSS : Calibration status
bits : 0 - -1 (0 bit)
access : read-only
Enumeration:
#0 : 0
Calibration is not running
#1 : 1
Calibration is running
End of enumeration elements list.
Startup Control Register 2
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BGRPON : BGR part power control
bits : 0 - -1 (0 bit)
Enumeration:
#0 : 0
Turn off power to ADBGR, SBIAS, VREFI, and ADREG
#1 : 1
Turn onpower to ADBGR, SBIAS, VREFI, and ADREG
End of enumeration elements list.
ADCPON : ADREG forced power-down
bits : 1 - 0 (0 bit)
Enumeration:
#0 : 0
Turn off power to VBIAS, PGA and sigma-delta A/D converter
#1 : 1
Turn on power to VBIAS, PGA and sigma-delta A/D converter
End of enumeration elements list.
ADFPWDS : ADC reference supply part
bits : 2 - 1 (0 bit)
Enumeration:
#0 : 0
Power of ADREG controlled by BGRPON register
#1 : 1
Power of ADREG is off regardless of BGRPON setting
End of enumeration elements list.
Input Multiplexer %s Setting Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGC : Gain selection of a programmable gain instrumentation amplifier ( Gset1, Gset2, Gtotal )
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00000 : 00000
(1, 1, 1)
#00100 : 00100
(2, 1, 2)
#01000 : 01000
(3, 1, 3)
#01100 : 01100
(4, 1, 4)
#10000 : 10000
(8, 1, 8)
#00001 : 00001
(1, 2, 2)
#00101 : 00101
(2, 2, 4)
#01001 : 01001
(3, 2, 6)
#01101 : 01101
(4, 2, 8)
#10001 : 10001
(8, 2, 16)
#00010 : 00010
(1, 4, 4)
#00110 : 00110
(2, 4, 8)
#01010 : 01010
(3, 4, 12)
#01110 : 01110
(4, 4, 16)
#10010 : 10010
(8, 4, 32)
#00011 : 00011
(1, 8, 8)
#00111 : 00111
(2, 8, 16)
#01011 : 01011
(3, 8, 24)
#01111 : 01111
(4, 8, 32).
End of enumeration elements list.
PGAOSR : Oversampling ratio select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#000 : 000
64
#001 : 001
128
#010 : 010
256
#011 : 011
512
#100 : 100
1024
#101 : 101
2048
End of enumeration elements list.
PGAOFS : Offset voltage select
bits : 8 - 11 (4 bit)
access : read-write
PGAPOL : Polarity select
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Positive-side single-end input
#1 : 1
Negative-side single-end input
End of enumeration elements list.
PGASEL : Analog Channel Input Mode Select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Differential input mode
#1 : 1
Single-end input mode
End of enumeration elements list.
PGACTM : Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN
bits : 16 - 19 (4 bit)
access : read-write
PGACTN : Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
#000 : 000
0
#001 : 001
1
#010 : 010
2
#011 : 011
3
#100 : 100
4
#101 : 101
5
#110 : 110
6
#111 : 111
7
End of enumeration elements list.
PGAAVN : Selection of the number of data to be averaged
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#00 : 00
8
#01 : 01
16
#10 : 10
32
#11 : 11
64
End of enumeration elements list.
PGAAVE : Selection of averaging processing
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#00 : 00
Do not average the A/D conversion results
#01 : 01
Do not average the A/D conversion results
#10 : 10
Average the A/D conversion results and generates SDADC_ADI each time an A/D conversion occurs
#11 : 11
Perform averaging, and generate SDADC_ADI at each time of average value output (A/D conversion is performed N times).
End of enumeration elements list.
PGAREV : Single-End Input A/D Converted Data Inversion Select
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not invert the conversion result data
#1 : 1
Invert the conversion result data
End of enumeration elements list.
PGACVE : Calibration enable
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not calculate the calibration correction factor
#1 : 1
Calculate the calibration correction factor
End of enumeration elements list.
PGAASN : Selection of the mode for specifying the number of A/D conversions in ADSCAN
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : 0
Specify 1 to 8,032 times by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
#1 : 1
Specify 1 to 255 times linearly by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
End of enumeration elements list.
Input Multiplexer %s Setting Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PGAGC : Gain selection of a programmable gain instrumentation amplifier ( Gset1, Gset2, Gtotal )
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
#00000 : 00000
(1, 1, 1)
#00100 : 00100
(2, 1, 2)
#01000 : 01000
(3, 1, 3)
#01100 : 01100
(4, 1, 4)
#10000 : 10000
(8, 1, 8)
#00001 : 00001
(1, 2, 2)
#00101 : 00101
(2, 2, 4)
#01001 : 01001
(3, 2, 6)
#01101 : 01101
(4, 2, 8)
#10001 : 10001
(8, 2, 16)
#00010 : 00010
(1, 4, 4)
#00110 : 00110
(2, 4, 8)
#01010 : 01010
(3, 4, 12)
#01110 : 01110
(4, 4, 16)
#10010 : 10010
(8, 4, 32)
#00011 : 00011
(1, 8, 8)
#00111 : 00111
(2, 8, 16)
#01011 : 01011
(3, 8, 24)
#01111 : 01111
(4, 8, 32).
End of enumeration elements list.
PGAOSR : Oversampling ratio select
bits : 5 - 6 (2 bit)
access : read-write
Enumeration:
#000 : 000
64
#001 : 001
128
#010 : 010
256
#011 : 011
512
#100 : 100
1024
#101 : 101
2048
End of enumeration elements list.
PGAOFS : Offset voltage select
bits : 8 - 11 (4 bit)
access : read-write
PGAPOL : Polarity select
bits : 14 - 13 (0 bit)
access : read-write
Enumeration:
#0 : 0
Positive-side single-end input
#1 : 1
Negative-side single-end input
End of enumeration elements list.
PGASEL : Analog Channel Input Mode Select
bits : 15 - 14 (0 bit)
access : read-write
Enumeration:
#0 : 0
Differential input mode
#1 : 1
Single-end input mode
End of enumeration elements list.
PGACTM : Coefficient (m) selection of the A/D conversion count (N) in AUTOSCAN
bits : 16 - 19 (4 bit)
access : read-write
PGACTN : Coefficient (n) selection of the A/D conversion count (N) in AUTOSCAN
bits : 21 - 22 (2 bit)
access : read-write
Enumeration:
#000 : 000
0
#001 : 001
1
#010 : 010
2
#011 : 011
3
#100 : 100
4
#101 : 101
5
#110 : 110
6
#111 : 111
7
End of enumeration elements list.
PGAAVN : Selection of the number of data to be averaged
bits : 24 - 24 (1 bit)
access : read-write
Enumeration:
#00 : 00
8
#01 : 01
16
#10 : 10
32
#11 : 11
64
End of enumeration elements list.
PGAAVE : Selection of averaging processing
bits : 26 - 26 (1 bit)
access : read-write
Enumeration:
#00 : 00
Do not average the A/D conversion results
#01 : 01
Do not average the A/D conversion results
#10 : 10
Average the A/D conversion results and generates SDADC_ADI each time an A/D conversion occurs
#11 : 11
Perform averaging, and generate SDADC_ADI at each time of average value output (A/D conversion is performed N times).
End of enumeration elements list.
PGAREV : Single-End Input A/D Converted Data Inversion Select
bits : 28 - 27 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not invert the conversion result data
#1 : 1
Invert the conversion result data
End of enumeration elements list.
PGACVE : Calibration enable
bits : 30 - 29 (0 bit)
access : read-write
Enumeration:
#0 : 0
Do not calculate the calibration correction factor
#1 : 1
Calculate the calibration correction factor
End of enumeration elements list.
PGAASN : Selection of the mode for specifying the number of A/D conversions in ADSCAN
bits : 31 - 30 (0 bit)
access : read-write
Enumeration:
#0 : 0
Specify 1 to 8,032 times by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
#1 : 1
Specify 1 to 255 times linearly by using the value set in the PGACTN[2:0] and PGACTM[4:0] bits
End of enumeration elements list.
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