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CAN

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x20000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

FCNnMmDAT0B

FCNnMmDAT1B

FCNnMmDAT2B

FCNnMmDAT3B

FCNnDNBMRX0

FCNnDNBMRX1

FCNnMmDAT4B

FCNnMmDAT5B

FCNnMmDAT6B

FCNnMmDAT7B

FCNnMmDTLGB

FCNnMmSTRB

FCNnCMMKCTL01W

FCNnCMMKCTL03W

FCNnCMMKCTL05W

FCNnCMMKCTL07W

FCNnCMMKCTL09W

FCNnCMMKCTL11W

FCNnCMMKCTL13W

FCNnCMMKCTL15W

FCNnMmDAT0W

FCNnMmDAT4W

FCNnMmMID0W

FCNnGMADCTL

FCNnCMLCSTR

FCNnCMINSTR

FCNnCMBRPRS

FCNnCMLISTR

FCNnCMLOSTR

FCNnGMCSPRE

FCNnGMCLCTL

FCNnGMABCTL

FCNnCMCLCTL

FCNnCMERCNT

FCNnCMIECTL

FCNnCMISCTL

FCNnCMBTCTL

FCNnCMRGRX

FCNnCMTGTX

FCNnCMTSCTL

FCNnCMMKCTL01H

FCNnCMMKCTL02H

FCNnCMMKCTL03H

FCNnCMMKCTL04H

FCNnCMMKCTL05H

FCNnCMMKCTL06H

FCNnCMMKCTL07H

FCNnCMMKCTL08H

FCNnCMMKCTL09H

FCNnCMMKCTL10H

FCNnCMMKCTL11H

FCNnCMMKCTL12H

FCNnCMMKCTL13H

FCNnCMMKCTL14H

FCNnCMMKCTL15H

FCNnCMMKCTL16H

FCNnMmDAT0H

FCNnMmDAT2H

FCNnMmDAT4H

FCNnMmDAT6H

FCNnMmMID0H

FCNnMmMID1H

FCNnMmCTL


FCNnMmDAT0B

Message buffer register 0 (Byte data)
address_offset : 0x1000 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT0B FCNnMmDAT0B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT1B

Message buffer register 1 (Byte data)
address_offset : 0x1004 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT1B FCNnMmDAT1B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT2B

Message buffer register 2 (Byte data)
address_offset : 0x1008 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT2B FCNnMmDAT2B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT3B

Message buffer register 3 (Byte data)
address_offset : 0x100C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT3B FCNnMmDAT3B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnDNBMRX0

global data update bit monitor register 0
address_offset : 0x100C0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnDNBMRX0 FCNnDNBMRX0 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnDNBMRX1

global data update bit monitor register 1
address_offset : 0x100D0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnDNBMRX1 FCNnDNBMRX1 read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT4B

Message buffer register 4 (Byte data)
address_offset : 0x1010 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT4B FCNnMmDAT4B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT5B

Message buffer register 5 (Byte data)
address_offset : 0x1014 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT5B FCNnMmDAT5B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT6B

Message buffer register 6 (Byte data)
address_offset : 0x1018 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT6B FCNnMmDAT6B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDAT7B

Message buffer register 7 (Byte data)
address_offset : 0x101C Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT7B FCNnMmDAT7B read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmDTLGB

Message data length register
address_offset : 0x1020 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDTLGB FCNnMmDTLGB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnMmSTRB

Message configuration register
address_offset : 0x1024 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmSTRB FCNnMmSTRB read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMMKCTL01W

module mask 1 register [28 to 0]
address_offset : 0x10300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL01W FCNnCMMKCTL01W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL03W

module mask 2 register [28 to 0]
address_offset : 0x10310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL03W FCNnCMMKCTL03W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL05W

module mask 3 register [28 to 0]
address_offset : 0x10320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL05W FCNnCMMKCTL05W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL07W

module mask 4 register [28 to 0]
address_offset : 0x10330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL07W FCNnCMMKCTL07W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL09W

module mask 5 register [28 to 0]
address_offset : 0x10340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL09W FCNnCMMKCTL09W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL11W

module mask 6 register [28 to 0]
address_offset : 0x10350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL11W FCNnCMMKCTL11W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL13W

module mask 7 register [28 to 0]
address_offset : 0x10360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL13W FCNnCMMKCTL13W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL15W

module mask 8 register [28 to 0]
address_offset : 0x10370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL15W FCNnCMMKCTL15W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT0W

Message buffer register 0 (Word data)
address_offset : 0x11000 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT0W FCNnMmDAT0W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT4W

Message buffer register 4 (Word data)
address_offset : 0x11010 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT4W FCNnMmDAT4W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmMID0W

Message ID register 0 (Word data)
address_offset : 0x11028 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmMID0W FCNnMmMID0W read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnGMADCTL

global automatic block transmission delay setting register
address_offset : 0x20 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnGMADCTL FCNnGMADCTL read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMLCSTR

module last error information register
address_offset : 0x248 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMLCSTR FCNnCMLCSTR read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMINSTR

module information register
address_offset : 0x24C Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnCMINSTR FCNnCMINSTR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMBRPRS

module bit-rate prescaler and clock selector register
address_offset : 0x268 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMBRPRS FCNnCMBRPRS read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMLISTR

module last receive pointer register
address_offset : 0x278 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnCMLISTR FCNnCMLISTR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnCMLOSTR

module last transmit pointer register
address_offset : 0x288 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnCMLOSTR FCNnCMLOSTR read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnGMCSPRE

global clock selection register
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnGMCSPRE FCNnGMCSPRE read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0

FCNnGMCLCTL

global control register
address_offset : 0x8000 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnGMCLCTL FCNnGMCLCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnGMABCTL

global automatic block transmission control register
address_offset : 0x8018 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnGMABCTL FCNnGMABCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMCLCTL

module control register
address_offset : 0x8240 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMCLCTL FCNnCMCLCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMERCNT

module error counter register
address_offset : 0x8250 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

FCNnCMERCNT FCNnCMERCNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMIECTL

module interrupt enable register
address_offset : 0x8258 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMIECTL FCNnCMIECTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMISCTL

module interrupt status register
address_offset : 0x8260 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMISCTL FCNnCMISCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMBTCTL

module bit-rate register
address_offset : 0x8270 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMBTCTL FCNnCMBTCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMRGRX

module receive history list register
address_offset : 0x8280 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMRGRX FCNnCMRGRX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMTGTX

module transmit history list register
address_offset : 0x8290 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMTGTX FCNnCMTGTX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMTSCTL

module time stamp register
address_offset : 0x8298 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMTSCTL FCNnCMTSCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL01H

module mask 1 register [15 to 0]
address_offset : 0x8300 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL01H FCNnCMMKCTL01H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL02H

module mask 1 register [28 to 16]
address_offset : 0x8308 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL02H FCNnCMMKCTL02H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL03H

module mask 2 register [15 to 0]
address_offset : 0x8310 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL03H FCNnCMMKCTL03H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL04H

module mask 2 register [28 to 16]
address_offset : 0x8318 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL04H FCNnCMMKCTL04H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL05H

module mask 3 register [15 to 0]
address_offset : 0x8320 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL05H FCNnCMMKCTL05H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL06H

module mask 3 register [28 to 16]
address_offset : 0x8328 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL06H FCNnCMMKCTL06H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL07H

module mask 4 register [15 to 0]
address_offset : 0x8330 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL07H FCNnCMMKCTL07H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL08H

module mask 4 register [28 to 16]
address_offset : 0x8338 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL08H FCNnCMMKCTL08H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL09H

module mask 5 register [15 to 0]
address_offset : 0x8340 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL09H FCNnCMMKCTL09H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL10H

module mask 5 register [28 to 16]
address_offset : 0x8348 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL10H FCNnCMMKCTL10H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL11H

module mask 6 register [15 to 0]
address_offset : 0x8350 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL11H FCNnCMMKCTL11H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL12H

module mask 6 register [28 to 16]
address_offset : 0x8358 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL12H FCNnCMMKCTL12H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL13H

module mask 7 register [15 to 0]
address_offset : 0x8360 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL13H FCNnCMMKCTL13H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL14H

module mask 7 register [28 to 16]
address_offset : 0x8368 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL14H FCNnCMMKCTL14H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL15H

module mask 8 register [15 to 0]
address_offset : 0x8370 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL15H FCNnCMMKCTL15H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnCMMKCTL16H

module mask 8 register [28 to 16]
address_offset : 0x8378 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnCMMKCTL16H FCNnCMMKCTL16H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT0H

Message buffer register 0 (Half word data)
address_offset : 0x9000 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT0H FCNnMmDAT0H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT2H

Message buffer register 2 (Half word data)
address_offset : 0x9008 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT2H FCNnMmDAT2H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT4H

Message buffer register 4 (Half word data)
address_offset : 0x9010 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT4H FCNnMmDAT4H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmDAT6H

Message buffer register 6 (Half word data)
address_offset : 0x9018 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmDAT6H FCNnMmDAT6H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmMID0H

Message ID register 0 (Half word data)
address_offset : 0x9028 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmMID0H FCNnMmMID0H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmMID1H

Message ID register 1 (Half word data)
address_offset : 0x9030 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmMID1H FCNnMmMID1H read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

FCNnMmCTL

Message control register
address_offset : 0x9038 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FCNnMmCTL FCNnMmCTL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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