\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : RTCC Enable
bits : 0 - 0 (1 bit)
access : read-write
DEBUGRUN : Debug Mode Run Enable
bits : 2 - 2 (1 bit)
access : read-write
PRECCV0TOP : Pre-counter CCV0 Top Value Enable
bits : 4 - 4 (1 bit)
access : read-write
CCV1TOP : CCV1 Top Value Enable
bits : 5 - 5 (1 bit)
access : read-write
CNTPRESC : Counter Prescaler Value
bits : 8 - 11 (4 bit)
access : read-write
Enumeration:
0x00000000 : DIV1
CLKCNT = LFECLKRTCC/1
0x00000001 : DIV2
CLKCNT = LFECLKRTCC/2
0x00000002 : DIV4
CLKCNT = LFECLKRTCC/4
0x00000003 : DIV8
CLKCNT = LFECLKRTCC/8
0x00000004 : DIV16
CLKCNT = LFECLKRTCC/16
0x00000005 : DIV32
CLKCNT = LFECLKRTCC/32
0x00000006 : DIV64
CLKCNT = LFECLKRTCC/64
0x00000007 : DIV128
CLKCNT = LFECLKRTCC/128
0x00000008 : DIV256
CLKCNT = LFECLKRTCC/256
0x00000009 : DIV512
CLKCNT = LFECLKRTCC/512
0x0000000A : DIV1024
CLKCNT = LFECLKRTCC/1024
0x0000000B : DIV2048
CLKCNT = LFECLKRTCC/2048
0x0000000C : DIV4096
CLKCNT = LFECLKRTCC/4096
0x0000000D : DIV8192
CLKCNT = LFECLKRTCC/8192
0x0000000E : DIV16384
CLKCNT = LFECLKRTCC/16384
0x0000000F : DIV32768
CLKCNT = LFECLKRTCC/32768
End of enumeration elements list.
CNTTICK : Counter Prescaler Mode
bits : 12 - 12 (1 bit)
access : read-write
BUMODETSEN : Backup Mode Timestamp Enable
bits : 14 - 14 (1 bit)
access : read-write
OSCFDETEN : Oscillator Failure Detection Enable
bits : 15 - 15 (1 bit)
access : read-write
CNTMODE : Main Counter Mode
bits : 16 - 16 (1 bit)
access : read-write
LYEARCORRDIS : Leap Year Correction Disabled
bits : 17 - 17 (1 bit)
access : read-write
Time of Day Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECU : Seconds, Units
bits : 0 - 3 (4 bit)
access : read-write
SECT : Seconds, Tens
bits : 4 - 6 (3 bit)
access : read-write
MINU : Minutes, Units
bits : 8 - 11 (4 bit)
access : read-write
MINT : Minutes, Tens
bits : 12 - 14 (3 bit)
access : read-write
HOURU : Hours, Units
bits : 16 - 19 (4 bit)
access : read-write
HOURT : Hours, Tens
bits : 20 - 21 (2 bit)
access : read-write
Retention Register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x120 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x124 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x128 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x12C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x130 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x134 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x138 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x13C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Date Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAYOMU : Day of Month, Units
bits : 0 - 3 (4 bit)
access : read-write
DAYOMT : Day of Month, Tens
bits : 4 - 5 (2 bit)
access : read-write
MONTHU : Month, Units
bits : 8 - 11 (4 bit)
access : read-write
MONTHT : Month, Tens
bits : 12 - 12 (1 bit)
access : read-write
YEARU : Year, Units
bits : 16 - 19 (4 bit)
access : read-write
YEART : Year, Tens
bits : 20 - 23 (4 bit)
access : read-write
DAYOW : Day of Week
bits : 24 - 26 (3 bit)
access : read-write
Retention Register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x148 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x14C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x150 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x154 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x158 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x15C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x160 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x164 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x168 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x16C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x170 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x174 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x178 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Retention Register
address_offset : 0x17C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
RTCC Interrupt Flags
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
OF : Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only
CC0 : Channel 0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only
CC1 : Channel 1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-only
CC2 : Channel 2 Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-only
OSCFAIL : Oscillator Failure Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-only
CNTTICK : Main Counter Tick
bits : 5 - 5 (1 bit)
access : read-only
MINTICK : Minute Tick
bits : 6 - 6 (1 bit)
access : read-only
HOURTICK : Hour Tick
bits : 7 - 7 (1 bit)
access : read-only
DAYTICK : Day Tick
bits : 8 - 8 (1 bit)
access : read-only
DAYOWOF : Day of Week Overflow
bits : 9 - 9 (1 bit)
access : read-only
MONTHTICK : Month Tick
bits : 10 - 10 (1 bit)
access : read-only
Retention Register
address_offset : 0x180 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
REG : General Purpose Retention Register
bits : 0 - 31 (32 bit)
access : read-write
Interrupt Flag Set Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OF : Set OF Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
CC0 : Set CC0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
CC1 : Set CC1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
CC2 : Set CC2 Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only
OSCFAIL : Set OSCFAIL Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only
CNTTICK : Set CNTTICK Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only
MINTICK : Set MINTICK Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only
HOURTICK : Set HOURTICK Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only
DAYTICK : Set DAYTICK Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only
DAYOWOF : Set DAYOWOF Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only
MONTHTICK : Set MONTHTICK Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only
Interrupt Flag Clear Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
OF : Clear OF Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only
CC0 : Clear CC0 Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only
CC1 : Clear CC1 Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only
CC2 : Clear CC2 Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only
OSCFAIL : Clear OSCFAIL Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only
CNTTICK : Clear CNTTICK Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only
MINTICK : Clear MINTICK Interrupt Flag
bits : 6 - 6 (1 bit)
access : write-only
HOURTICK : Clear HOURTICK Interrupt Flag
bits : 7 - 7 (1 bit)
access : write-only
DAYTICK : Clear DAYTICK Interrupt Flag
bits : 8 - 8 (1 bit)
access : write-only
DAYOWOF : Clear DAYOWOF Interrupt Flag
bits : 9 - 9 (1 bit)
access : write-only
MONTHTICK : Clear MONTHTICK Interrupt Flag
bits : 10 - 10 (1 bit)
access : write-only
Interrupt Enable Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OF : OF Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
CC0 : CC0 Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
CC1 : CC1 Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
CC2 : CC2 Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
OSCFAIL : OSCFAIL Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
CNTTICK : CNTTICK Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write
MINTICK : MINTICK Interrupt Enable
bits : 6 - 6 (1 bit)
access : read-write
HOURTICK : HOURTICK Interrupt Enable
bits : 7 - 7 (1 bit)
access : read-write
DAYTICK : DAYTICK Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write
DAYOWOF : DAYOWOF Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write
MONTHTICK : MONTHTICK Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write
Status Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
BUMODETS : Timestamp for Backup Mode Entry Stored
bits : 0 - 0 (1 bit)
access : read-only
Command Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CLRSTATUS : Clear RTCC_STATUS Register
bits : 0 - 0 (1 bit)
access : write-only
Synchronization Busy Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMD : CMD Register Busy
bits : 5 - 5 (1 bit)
access : read-only
Retention RAM Power-down Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RAM : Retention RAM Power-down
bits : 0 - 0 (1 bit)
access : read-write
Configuration Lock Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : read-write
Enumeration:
0x00000000 : UNLOCKED
None
0x00000001 : LOCKED
None
End of enumeration elements list.
Wake Up Enable
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EM4WU : EM4 Wake-up Enable
bits : 0 - 0 (1 bit)
access : read-write
Pre-Counter Value Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRECNT : Pre-Counter Value
bits : 0 - 14 (15 bit)
access : read-write
CC Channel Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : CC Channel Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : OFF
Compare/Capture channel turned off
0x00000001 : INPUTCAPTURE
Input capture
0x00000002 : OUTPUTCOMPARE
Output compare
End of enumeration elements list.
CMOA : Compare Match Output Action
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0x00000000 : PULSE
A single clock cycle pulse is generated on output
0x00000001 : TOGGLE
Toggle output on compare match
0x00000002 : CLEAR
Clear output on compare match
0x00000003 : SET
Set output on compare match
End of enumeration elements list.
ICEDGE : Input Capture Edge Select
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x00000000 : RISING
Rising edges detected
0x00000001 : FALLING
Falling edges detected
0x00000002 : BOTH
Both edges detected
0x00000003 : NONE
No edge detection, signal is left as it is
End of enumeration elements list.
PRSSEL : Compare/Capture Channel PRS Input Channel Selection
bits : 6 - 10 (5 bit)
access : read-write
Enumeration:
0x00000000 : PRSCH0
PRS Channel 0 selected as input
0x00000001 : PRSCH1
PRS Channel 1 selected as input
0x00000002 : PRSCH2
PRS Channel 2 selected as input
0x00000003 : PRSCH3
PRS Channel 3 selected as input
0x00000004 : PRSCH4
PRS Channel 4 selected as input
0x00000005 : PRSCH5
PRS Channel 5 selected as input
0x00000006 : PRSCH6
PRS Channel 6 selected as input
0x00000007 : PRSCH7
PRS Channel 7 selected as input
0x00000008 : PRSCH8
PRS Channel 8 selected as input
0x00000009 : PRSCH9
PRS Channel 9 selected as input
0x0000000A : PRSCH10
PRS Channel 10 selected as input
0x0000000B : PRSCH11
PRS Channel 11 selected as input
0x0000000C : PRSCH12
PRS Channel 12 selected as input
0x0000000D : PRSCH13
PRS Channel 13 selected as input
0x0000000E : PRSCH14
PRS Channel 14 selected as input
0x0000000F : PRSCH15
PRS Channel 15 selected as input
0x00000010 : PRSCH16
PRS Channel 16 selected as input
0x00000011 : PRSCH17
PRS Channel 17 selected as input
0x00000012 : PRSCH18
PRS Channel 18 selected as input
0x00000013 : PRSCH19
PRS Channel 19 selected as input
0x00000014 : PRSCH20
PRS Channel 20 selected as input
0x00000015 : PRSCH21
PRS Channel 21 selected as input
0x00000016 : PRSCH22
PRS Channel 22 selected as input
0x00000017 : PRSCH23
PRS Channel 23 selected as input
End of enumeration elements list.
COMPBASE : Capture Compare Channel Comparison Base
bits : 11 - 11 (1 bit)
access : read-write
COMPMASK : Capture Compare Channel Comparison Mask
bits : 12 - 16 (5 bit)
access : read-write
DAYCC : Day Capture/Compare Selection
bits : 17 - 17 (1 bit)
access : read-write
Capture/Compare Value Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCV : Capture/Compare Value
bits : 0 - 31 (32 bit)
access : read-write
Capture/Compare Time Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECU : Seconds, Units
bits : 0 - 3 (4 bit)
access : read-write
SECT : Seconds, Tens
bits : 4 - 6 (3 bit)
access : read-write
MINU : Minutes, Units
bits : 8 - 11 (4 bit)
access : read-write
MINT : Minutes, Tens
bits : 12 - 14 (3 bit)
access : read-write
HOURU : Hours, Units
bits : 16 - 19 (4 bit)
access : read-write
HOURT : Hours, Tens
bits : 20 - 21 (2 bit)
access : read-write
Capture/Compare Date Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAYU : Day of Month/week, Units
bits : 0 - 3 (4 bit)
access : read-write
DAYT : Day of Month/week, Tens
bits : 4 - 5 (2 bit)
access : read-write
MONTHU : Month, Units
bits : 8 - 11 (4 bit)
access : read-write
MONTHT : Month, Tens
bits : 12 - 12 (1 bit)
access : read-write
CC Channel Control Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : CC Channel Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : OFF
Compare/Capture channel turned off
0x00000001 : INPUTCAPTURE
Input capture
0x00000002 : OUTPUTCOMPARE
Output compare
End of enumeration elements list.
CMOA : Compare Match Output Action
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0x00000000 : PULSE
A single clock cycle pulse is generated on output
0x00000001 : TOGGLE
Toggle output on compare match
0x00000002 : CLEAR
Clear output on compare match
0x00000003 : SET
Set output on compare match
End of enumeration elements list.
ICEDGE : Input Capture Edge Select
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x00000000 : RISING
Rising edges detected
0x00000001 : FALLING
Falling edges detected
0x00000002 : BOTH
Both edges detected
0x00000003 : NONE
No edge detection, signal is left as it is
End of enumeration elements list.
PRSSEL : Compare/Capture Channel PRS Input Channel Selection
bits : 6 - 10 (5 bit)
access : read-write
Enumeration:
0x00000000 : PRSCH0
PRS Channel 0 selected as input
0x00000001 : PRSCH1
PRS Channel 1 selected as input
0x00000002 : PRSCH2
PRS Channel 2 selected as input
0x00000003 : PRSCH3
PRS Channel 3 selected as input
0x00000004 : PRSCH4
PRS Channel 4 selected as input
0x00000005 : PRSCH5
PRS Channel 5 selected as input
0x00000006 : PRSCH6
PRS Channel 6 selected as input
0x00000007 : PRSCH7
PRS Channel 7 selected as input
0x00000008 : PRSCH8
PRS Channel 8 selected as input
0x00000009 : PRSCH9
PRS Channel 9 selected as input
0x0000000A : PRSCH10
PRS Channel 10 selected as input
0x0000000B : PRSCH11
PRS Channel 11 selected as input
0x0000000C : PRSCH12
PRS Channel 12 selected as input
0x0000000D : PRSCH13
PRS Channel 13 selected as input
0x0000000E : PRSCH14
PRS Channel 14 selected as input
0x0000000F : PRSCH15
PRS Channel 15 selected as input
0x00000010 : PRSCH16
PRS Channel 16 selected as input
0x00000011 : PRSCH17
PRS Channel 17 selected as input
0x00000012 : PRSCH18
PRS Channel 18 selected as input
0x00000013 : PRSCH19
PRS Channel 19 selected as input
0x00000014 : PRSCH20
PRS Channel 20 selected as input
0x00000015 : PRSCH21
PRS Channel 21 selected as input
0x00000016 : PRSCH22
PRS Channel 22 selected as input
0x00000017 : PRSCH23
PRS Channel 23 selected as input
End of enumeration elements list.
COMPBASE : Capture Compare Channel Comparison Base
bits : 11 - 11 (1 bit)
access : read-write
COMPMASK : Capture Compare Channel Comparison Mask
bits : 12 - 16 (5 bit)
access : read-write
DAYCC : Day Capture/Compare Selection
bits : 17 - 17 (1 bit)
access : read-write
Capture/Compare Value Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCV : Capture/Compare Value
bits : 0 - 31 (32 bit)
access : read-write
Capture/Compare Time Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECU : Seconds, Units
bits : 0 - 3 (4 bit)
access : read-write
SECT : Seconds, Tens
bits : 4 - 6 (3 bit)
access : read-write
MINU : Minutes, Units
bits : 8 - 11 (4 bit)
access : read-write
MINT : Minutes, Tens
bits : 12 - 14 (3 bit)
access : read-write
HOURU : Hours, Units
bits : 16 - 19 (4 bit)
access : read-write
HOURT : Hours, Tens
bits : 20 - 21 (2 bit)
access : read-write
Capture/Compare Date Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAYU : Day of Month/week, Units
bits : 0 - 3 (4 bit)
access : read-write
DAYT : Day of Month/week, Tens
bits : 4 - 5 (2 bit)
access : read-write
MONTHU : Month, Units
bits : 8 - 11 (4 bit)
access : read-write
MONTHT : Month, Tens
bits : 12 - 12 (1 bit)
access : read-write
CC Channel Control Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MODE : CC Channel Mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0x00000000 : OFF
Compare/Capture channel turned off
0x00000001 : INPUTCAPTURE
Input capture
0x00000002 : OUTPUTCOMPARE
Output compare
End of enumeration elements list.
CMOA : Compare Match Output Action
bits : 2 - 3 (2 bit)
access : read-write
Enumeration:
0x00000000 : PULSE
A single clock cycle pulse is generated on output
0x00000001 : TOGGLE
Toggle output on compare match
0x00000002 : CLEAR
Clear output on compare match
0x00000003 : SET
Set output on compare match
End of enumeration elements list.
ICEDGE : Input Capture Edge Select
bits : 4 - 5 (2 bit)
access : read-write
Enumeration:
0x00000000 : RISING
Rising edges detected
0x00000001 : FALLING
Falling edges detected
0x00000002 : BOTH
Both edges detected
0x00000003 : NONE
No edge detection, signal is left as it is
End of enumeration elements list.
PRSSEL : Compare/Capture Channel PRS Input Channel Selection
bits : 6 - 10 (5 bit)
access : read-write
Enumeration:
0x00000000 : PRSCH0
PRS Channel 0 selected as input
0x00000001 : PRSCH1
PRS Channel 1 selected as input
0x00000002 : PRSCH2
PRS Channel 2 selected as input
0x00000003 : PRSCH3
PRS Channel 3 selected as input
0x00000004 : PRSCH4
PRS Channel 4 selected as input
0x00000005 : PRSCH5
PRS Channel 5 selected as input
0x00000006 : PRSCH6
PRS Channel 6 selected as input
0x00000007 : PRSCH7
PRS Channel 7 selected as input
0x00000008 : PRSCH8
PRS Channel 8 selected as input
0x00000009 : PRSCH9
PRS Channel 9 selected as input
0x0000000A : PRSCH10
PRS Channel 10 selected as input
0x0000000B : PRSCH11
PRS Channel 11 selected as input
0x0000000C : PRSCH12
PRS Channel 12 selected as input
0x0000000D : PRSCH13
PRS Channel 13 selected as input
0x0000000E : PRSCH14
PRS Channel 14 selected as input
0x0000000F : PRSCH15
PRS Channel 15 selected as input
0x00000010 : PRSCH16
PRS Channel 16 selected as input
0x00000011 : PRSCH17
PRS Channel 17 selected as input
0x00000012 : PRSCH18
PRS Channel 18 selected as input
0x00000013 : PRSCH19
PRS Channel 19 selected as input
0x00000014 : PRSCH20
PRS Channel 20 selected as input
0x00000015 : PRSCH21
PRS Channel 21 selected as input
0x00000016 : PRSCH22
PRS Channel 22 selected as input
0x00000017 : PRSCH23
PRS Channel 23 selected as input
End of enumeration elements list.
COMPBASE : Capture Compare Channel Comparison Base
bits : 11 - 11 (1 bit)
access : read-write
COMPMASK : Capture Compare Channel Comparison Mask
bits : 12 - 16 (5 bit)
access : read-write
DAYCC : Day Capture/Compare Selection
bits : 17 - 17 (1 bit)
access : read-write
Capture/Compare Value Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CCV : Capture/Compare Value
bits : 0 - 31 (32 bit)
access : read-write
Capture/Compare Time Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECU : Seconds, Units
bits : 0 - 3 (4 bit)
access : read-write
SECT : Seconds, Tens
bits : 4 - 6 (3 bit)
access : read-write
MINU : Minutes, Units
bits : 8 - 11 (4 bit)
access : read-write
MINT : Minutes, Tens
bits : 12 - 14 (3 bit)
access : read-write
HOURU : Hours, Units
bits : 16 - 19 (4 bit)
access : read-write
HOURT : Hours, Tens
bits : 20 - 21 (2 bit)
access : read-write
Capture/Compare Date Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DAYU : Day of Month/week, Units
bits : 0 - 3 (4 bit)
access : read-write
DAYT : Day of Month/week, Tens
bits : 4 - 5 (2 bit)
access : read-write
MONTHU : Month, Units
bits : 8 - 11 (4 bit)
access : read-write
MONTHT : Month, Tens
bits : 12 - 12 (1 bit)
access : read-write
Counter Value Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CNT : Counter Value
bits : 0 - 31 (32 bit)
access : read-write
Combined Pre-Counter and Counter Value Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRECNT : Pre-Counter Value
bits : 0 - 14 (15 bit)
access : read-only
CNTLSB : Counter Value
bits : 15 - 31 (17 bit)
access : read-only
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