\n

FPUEH

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IF

IFS

IFC

IEN


IF

Interrupt Flag Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IF IF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FPIOC FPDZC FPUFC FPOFC FPIDC FPIXC

FPIOC : FPU invalid operation
bits : 0 - 0 (1 bit)
access : read-only

FPDZC : FPU divide-by-zero exception
bits : 1 - 1 (1 bit)
access : read-only

FPUFC : FPU underflow exception
bits : 2 - 2 (1 bit)
access : read-only

FPOFC : FPU overflow exception
bits : 3 - 3 (1 bit)
access : read-only

FPIDC : FPU input denormal exception
bits : 4 - 4 (1 bit)
access : read-only

FPIXC : FPU inexact exception
bits : 5 - 5 (1 bit)
access : read-only


IFS

Interrupt Flag Set Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFS IFS write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FPIOC FPDZC FPUFC FPOFC FPIDC FPIXC

FPIOC : Set FPIOC Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

FPDZC : Set FPDZC Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only

FPUFC : Set FPUFC Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only

FPOFC : Set FPOFC Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only

FPIDC : Set FPIDC Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only

FPIXC : Set FPIXC Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only


IFC

Interrupt Flag Clear Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFC IFC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FPIOC FPDZC FPUFC FPOFC FPIDC FPIXC

FPIOC : Clear FPIOC Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

FPDZC : Clear FPDZC Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only

FPUFC : Clear FPUFC Interrupt Flag
bits : 2 - 2 (1 bit)
access : write-only

FPOFC : Clear FPOFC Interrupt Flag
bits : 3 - 3 (1 bit)
access : write-only

FPIDC : Clear FPIDC Interrupt Flag
bits : 4 - 4 (1 bit)
access : write-only

FPIXC : Clear FPIXC Interrupt Flag
bits : 5 - 5 (1 bit)
access : write-only


IEN

Interrupt Enable Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FPIOC FPDZC FPUFC FPOFC FPIDC FPIXC

FPIOC : FPIOC Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

FPDZC : FPDZC Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

FPUFC : FPUFC Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

FPOFC : FPOFC Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

FPIDC : FPIDC Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write

FPIXC : FPIXC Interrupt Enable
bits : 5 - 5 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.