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RMU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

RSTCAUSE

CMD


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKUPRDIS

LOCKUPRDIS : Lockup Reset Disable
bits : 0 - 0 (1 bit)
access : read-write


RSTCAUSE

Reset Cause Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RSTCAUSE RSTCAUSE read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORST BODUNREGRST BODREGRST EXTRST WDOGRST LOCKUPRST SYSREQRST EM4RST EM4WURST BODAVDD0 BODAVDD1

PORST : Power On Reset
bits : 0 - 0 (1 bit)
access : read-only

BODUNREGRST : Brown Out Detector Unregulated Domain Reset
bits : 1 - 1 (1 bit)
access : read-only

BODREGRST : Brown Out Detector Regulated Domain Reset
bits : 2 - 2 (1 bit)
access : read-only

EXTRST : External Pin Reset
bits : 3 - 3 (1 bit)
access : read-only

WDOGRST : Watchdog Reset
bits : 4 - 4 (1 bit)
access : read-only

LOCKUPRST : LOCKUP Reset
bits : 5 - 5 (1 bit)
access : read-only

SYSREQRST : System Request Reset
bits : 6 - 6 (1 bit)
access : read-only

EM4RST : EM4 Reset
bits : 7 - 7 (1 bit)
access : read-only

EM4WURST : EM4 Wake-up Reset
bits : 8 - 8 (1 bit)
access : read-only

BODAVDD0 : AVDD0 Bod Reset
bits : 9 - 9 (1 bit)
access : read-only

BODAVDD1 : AVDD1 Bod Reset
bits : 10 - 10 (1 bit)
access : read-only


CMD

Command Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RCCLR

RCCLR : Reset Cause Clear
bits : 0 - 0 (1 bit)
access : write-only



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