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FPU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0xD byte (0x0)
mem_usage : registers
protection : not protected

Registers

FPCCR

FPCAR

FPSCR


FPCCR

Floating-point context control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPCCR FPCCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LSPACT USER THREAD HFRDY MMRDY BFRDY MONRDY LSPEN ASPEN

LSPACT : LSPACT
bits : 0 - 0 (1 bit)

USER : USER
bits : 1 - 1 (1 bit)

THREAD : THREAD
bits : 3 - 3 (1 bit)

HFRDY : HFRDY
bits : 4 - 4 (1 bit)

MMRDY : MMRDY
bits : 5 - 5 (1 bit)

BFRDY : BFRDY
bits : 6 - 6 (1 bit)

MONRDY : MONRDY
bits : 8 - 8 (1 bit)

LSPEN : LSPEN
bits : 30 - 30 (1 bit)

ASPEN : ASPEN
bits : 31 - 31 (1 bit)


FPCAR

Floating-point context address register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPCAR FPCAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDRESS

ADDRESS : Location of unpopulated floating-point
bits : 3 - 31 (29 bit)


FPSCR

Floating-point status control register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FPSCR FPSCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IOC DZC OFC UFC IXC IDC RMode FZ DN AHP V C Z N

IOC : Invalid operation cumulative exception bit
bits : 0 - 0 (1 bit)

DZC : Division by zero cumulative exception bit.
bits : 1 - 1 (1 bit)

OFC : Overflow cumulative exception bit
bits : 2 - 2 (1 bit)

UFC : Underflow cumulative exception bit
bits : 3 - 3 (1 bit)

IXC : Inexact cumulative exception bit
bits : 4 - 4 (1 bit)

IDC : Input denormal cumulative exception bit.
bits : 7 - 7 (1 bit)

RMode : Rounding Mode control field
bits : 22 - 23 (2 bit)

FZ : Flush-to-zero mode control bit:
bits : 24 - 24 (1 bit)

DN : Default NaN mode control bit
bits : 25 - 25 (1 bit)

AHP : Alternative half-precision control bit
bits : 26 - 26 (1 bit)

V : Overflow condition code flag
bits : 28 - 28 (1 bit)

C : Carry condition code flag
bits : 29 - 29 (1 bit)

Z : Zero condition code flag
bits : 30 - 30 (1 bit)

N : Negative condition code flag
bits : 31 - 31 (1 bit)



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