\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
Main Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLE : TRNG Module Enable
bits : 0 - 0 (1 bit)
access : read-write
TESTEN : Test Enable
bits : 2 - 2 (1 bit)
access : read-write
CONDBYPASS : Conditioning Bypass
bits : 3 - 3 (1 bit)
access : read-write
REPCOUNTIEN : Interrupt Enable for Repetition Count Test Failure
bits : 4 - 4 (1 bit)
access : read-write
APT64IEN : Interrupt Enable for Adaptive Proportion Test Failure (64-sample Window)
bits : 5 - 5 (1 bit)
access : read-write
APT4096IEN : Interrupt Enable for Adaptive Proportion Test Failure (4096-sample Window)
bits : 6 - 6 (1 bit)
access : read-write
FULLIEN : Interrupt Enable for FIFO Full
bits : 7 - 7 (1 bit)
access : read-write
SOFTRESET : Software Reset
bits : 8 - 8 (1 bit)
access : read-write
PREIEN : Interrupt enable for AIS31 preliminary noise alarm
bits : 9 - 9 (1 bit)
access : read-write
ALMIEN : Interrupt enable for AIS31 noise alarm
bits : 10 - 10 (1 bit)
access : read-write
FORCERUN : Oscillator Force Run
bits : 11 - 11 (1 bit)
access : read-write
BYPNIST : NIST Start-up Test Bypass.
bits : 12 - 12 (1 bit)
access : read-write
BYPAIS31 : AIS31 Start-up Test Bypass.
bits : 13 - 13 (1 bit)
access : read-write
Key Register 0
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key 0
bits : 0 - 31 (32 bit)
access : read-write
FIFO Data
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VALUE : FIFO Read Data
bits : 0 - 31 (32 bit)
access : read-only
Key Register 1
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key 1
bits : 0 - 31 (32 bit)
access : read-write
Key Register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key 2
bits : 0 - 31 (32 bit)
access : read-write
Key Register 3
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Key 3
bits : 0 - 31 (32 bit)
access : read-write
Test Data Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Test data input to conditioning function or to the continuous tests
bits : 0 - 31 (32 bit)
access : read-write
Status Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TESTDATABUSY : Test Data Busy
bits : 0 - 0 (1 bit)
access : read-only
REPCOUNTIF : Repetition Count Test Interrupt Status
bits : 4 - 4 (1 bit)
access : read-only
APT64IF : Adaptive Proportion test failure (64-sample window) interrupt status
bits : 5 - 5 (1 bit)
access : read-only
APT4096IF : Adaptive Proportion test failure (4096-sample window) interrupt status
bits : 6 - 6 (1 bit)
access : read-only
FULLIF : FIFO Full Interrupt Status
bits : 7 - 7 (1 bit)
access : read-only
PREIF : AIS31 Preliminary Noise Alarm interrupt status
bits : 8 - 8 (1 bit)
access : read-write
ALMIF : AIS31 Noise Alarm interrupt status
bits : 9 - 9 (1 bit)
access : read-only
Initial Wait Counter
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
VALUE : Wait counter value
bits : 0 - 7 (8 bit)
access : read-write
FIFO Level Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VALUE : FIFO Level
bits : 0 - 31 (32 bit)
access : read-only
FIFO Depth Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
VALUE : FIFO Depth.
bits : 0 - 31 (32 bit)
access : read-only
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