CMU_S

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

add a new register to this peripheral

IPVERSION

LOCK

DPLLREFCLKCTRL

EM01GRPACLKCTRL

WDOGLOCK

EM23GRPACLKCTRL

EM4GRPACLKCTRL

IADCCLKCTRL

IF

WDOG0CLKCTRL

WDOG1CLKCTRL

IEN

RTCCCLKCTRL

PRORTCCLKCTRL

RADIOCLKCTRL

CALCMD

CALCTRL

CALCNT

SYSCLKCTRL

STATUS

TRACECLKCTRL

EXPORTCLKCTRL


IPVERSION

No Description
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP Version ID
bits : 0 - 31 (32 bit)
access : read-only


LOCK

No Description
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

37879 : UNLOCK


End of enumeration elements list.


DPLLREFCLKCTRL

No Description
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DPLLREFCLKCTRL DPLLREFCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : DISABLED

DPLLREFCLK is not clocked

1 : HFXO

HFXO is clocking DPLLREFCLK

2 : LFXO

LFXO is clocking DPLLREFCLK

3 : CLKIN0

CLKIN0 is clocking DPLLREFCLK

End of enumeration elements list.


EM01GRPACLKCTRL

No Description
address_offset : 0x120 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM01GRPACLKCTRL EM01GRPACLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

1 : HFRCODPLL

HFRCODPLL is clocking EM01GRPACLK

2 : HFXO

HFXO is clocking EM01GRPACLK

3 : HFRCOEM23

HFRCOEM23 is clocking EM01GRPACLK

4 : FSRCO

FSRCO is clocking EM01GRPACLK

End of enumeration elements list.


WDOGLOCK

No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

WDOGLOCK WDOGLOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

37879 : UNLOCK


End of enumeration elements list.


EM23GRPACLKCTRL

No Description
address_offset : 0x140 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM23GRPACLKCTRL EM23GRPACLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking EM23GRPACLK

2 : LFXO

LFXO is clocking EM23GRPACLK

3 : ULFRCO

ULFRCO is clocking EM23GRPACLK

End of enumeration elements list.


EM4GRPACLKCTRL

No Description
address_offset : 0x160 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM4GRPACLKCTRL EM4GRPACLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking EM4GRPACLK

2 : LFXO

LFXO is clocking EM4GRPACLK

3 : ULFRCO

ULFRCO is clocking EM4GRPACLK

End of enumeration elements list.


IADCCLKCTRL

No Description
address_offset : 0x180 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IADCCLKCTRL IADCCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

1 : EM01GRPACLK

EM01GRPACLK is clocking IADCCLK

2 : HFRCOEM23

HFRCOEM23 is clocking IADCCLK

3 : FSRCO

FSRCO is clocking IADCCLK

End of enumeration elements list.


IF

No Description
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALRDY CALOF

CALRDY : Calibration Ready Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write

CALOF : Calibration Overflow Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write


WDOG0CLKCTRL

No Description
address_offset : 0x200 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WDOG0CLKCTRL WDOG0CLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking WDOG0CLK

2 : LFXO

LFXO is clocking WDOG0CLK

3 : ULFRCO

ULFRCO is clocking WDOG0CLK

4 : HCLKDIV1024

HCLKDIV1024 is clocking WDOG0CLK

End of enumeration elements list.


WDOG1CLKCTRL

No Description
address_offset : 0x208 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WDOG1CLKCTRL WDOG1CLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking WDOG1CLK

2 : LFXO

LFXO is clocking WDOG1CLK

3 : ULFRCO

ULFRCO is clocking WDOG1CLK

4 : HCLKDIV1024

HCLKDIV1024 is clocking WDOG1CLK

End of enumeration elements list.


IEN

No Description
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALRDY CALOF

CALRDY : Calibration Ready Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

CALOF : Calibration Overflow Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write


RTCCCLKCTRL

No Description
address_offset : 0x240 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RTCCCLKCTRL RTCCCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking RTCCCLK

2 : LFXO

LFXO is clocking RTCCCLK

3 : ULFRCO

ULFRCO is clocking RTCCCLK

End of enumeration elements list.


PRORTCCLKCTRL

No Description
address_offset : 0x248 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRORTCCLKCTRL PRORTCCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

1 : LFRCO

LFRCO is clocking PRORTCCLK

2 : LFXO

LFXO is clocking PRORTCCLK

3 : ULFRCO

ULFRCO is clocking PRORTCCLK

End of enumeration elements list.


RADIOCLKCTRL

No Description
address_offset : 0x280 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RADIOCLKCTRL RADIOCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN

EN : Enable
bits : 0 - 0 (1 bit)
access : read-write


CALCMD

No Description
address_offset : 0x50 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CALCMD CALCMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALSTART CALSTOP

CALSTART : Calibration Start
bits : 0 - 0 (1 bit)
access : write-only

CALSTOP : Calibration Stop
bits : 1 - 1 (1 bit)
access : write-only


CALCTRL

No Description
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CALCTRL CALCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALTOP CONT UPSEL DOWNSEL

CALTOP : Calibration Counter Top Value
bits : 0 - 19 (20 bit)
access : read-write

CONT : Continuous Calibration
bits : 23 - 23 (1 bit)
access : read-write

UPSEL : Calibration Up-counter Select
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Up-counter is not clocked

1 : PRS

PRS CMU_CALUP consumer is clocking up-counter

2 : HFXO

HFXO is clocking up-counter

3 : LFXO

LFXO is clocking up-counter

4 : HFRCODPLL

HFRCODPLL is clocking up-counter

5 : HFRCOEM23

HFRCOEM23 is clocking up-counter

8 : FSRCO

FSRCO is clocking up-counter

9 : LFRCO

LFRCO is clocking up-counter

10 : ULFRCO

ULFRCO is clocking up-counter

End of enumeration elements list.

DOWNSEL : Calibration Down-counter Select
bits : 28 - 31 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Down-counter is not clocked

1 : HCLK

HCLK is clocking down-counter

2 : PRS

PRS CMU_CALDN consumer is clocking down-counter

3 : HFXO

HFXO is clocking down-counter

4 : LFXO

LFXO is clocking down-counter

5 : HFRCODPLL

HFRCODPLL is clocking down-counter

6 : HFRCOEM23

HFRCOEM23 is clocking down-counter

9 : FSRCO

FSRCO is clocking down-counter

10 : LFRCO

LFRCO is clocking down-counter

11 : ULFRCO

ULFRCO is clocking down-counter

End of enumeration elements list.


CALCNT

No Description
address_offset : 0x58 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CALCNT CALCNT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALCNT

CALCNT : Calibration Result Counter Value
bits : 0 - 19 (20 bit)
access : read-only


SYSCLKCTRL

No Description
address_offset : 0x70 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSCLKCTRL SYSCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL PCLKPRESC HCLKPRESC

CLKSEL : Clock Select
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

1 : FSRCO

FSRCO is clocking SYSCLK

2 : HFRCODPLL

HFRCODPLL is clocking SYSCLK

3 : HFXO

HFXO is clocking SYSCLK

4 : CLKIN0

CLKIN0 is clocking SYSCLK

End of enumeration elements list.

PCLKPRESC : PCLK Prescaler
bits : 10 - 10 (1 bit)
access : read-write

Enumeration:

0 : DIV1

PCLK is HCLK divided by 1

1 : DIV2

PCLK is HCLK divided by 2

End of enumeration elements list.

HCLKPRESC : HCLK Prescaler
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : DIV1

HCLK is SYSCLK divided by 1

1 : DIV2

HCLK is SYSCLK divided by 2

3 : DIV4

HCLK is SYSCLK divided by 4

End of enumeration elements list.


STATUS

No Description
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CALRDY WDOGLOCK LOCK

CALRDY : Calibration Ready
bits : 0 - 0 (1 bit)
access : read-only

WDOGLOCK : Configuration Lock Status for WDOG
bits : 30 - 30 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED


1 : LOCKED


End of enumeration elements list.

LOCK : Configuration Lock Status
bits : 31 - 31 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED


1 : LOCKED


End of enumeration elements list.


TRACECLKCTRL

No Description
address_offset : 0x80 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRACECLKCTRL TRACECLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKSEL

CLKSEL : Clock Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

2 : HCLK

HCLK is clocking TRACECLK

3 : HFRCOEM23

HFRCOEM23 is clocking TRACECLK

End of enumeration elements list.


EXPORTCLKCTRL

No Description
address_offset : 0x90 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXPORTCLKCTRL EXPORTCLKCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKOUTSEL0 CLKOUTSEL1 CLKOUTSEL2 PRESC

CLKOUTSEL0 : Clock Output Select 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

CLKOUT0 is not clocked

1 : HCLK

HCLK is clocking CLKOUT0

2 : HFEXPCLK

HFEXPCLK is clocking CLKOUT0

3 : ULFRCO

ULFRCO is clocking CLKOUT0

4 : LFRCO

LFRCO is clocking CLKOUT0

5 : LFXO

LFXO is clocking CLKOUT0

6 : HFRCODPLL

HFRCODPLL is clocking CLKOUT0

7 : HFRCOEM23

HFRCOEM23 is clocking CLKOUT0

8 : HFXO

HFXO is clocking CLKOUT0

9 : FSRCO

FSRCO is clocking CLKOUT0

End of enumeration elements list.

CLKOUTSEL1 : Clock Output Select 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

CLKOUT1 is not clocked

1 : HCLK

HCLK is clocking CLKOUT1

2 : HFEXPCLK

HFEXPCLK is clocking CLKOUT1

3 : ULFRCO

ULFRCO is clocking CLKOUT1

4 : LFRCO

LFRCO is clocking CLKOUT1

5 : LFXO

LFXO is clocking CLKOUT1

6 : HFRCODPLL

HFRCODPLL is clocking CLKOUT1

7 : HFRCOEM23

HFRCOEM23 is clocking CLKOUT1

8 : HFXO

HFXO is clocking CLKOUT1

9 : FSRCO

FSRCO is clocking CLKOUT1

End of enumeration elements list.

CLKOUTSEL2 : Clock Output Select 2
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

CLKOUT2 is not clocked

1 : HCLK

HCLK is clocking CLKOUT2

2 : HFEXPCLK

HFEXPCLK is clocking CLKOUT2

3 : ULFRCO

ULFRCO is clocking CLKOUT2

4 : LFRCO

LFRCO is clocking CLKOUT2

5 : LFXO

LFXO is clocking CLKOUT2

6 : HFRCODPLL

HFRCODPLL is clocking CLKOUT2

7 : HFRCOEM23

HFRCOEM23 is clocking CLKOUT2

8 : HFXO

HFXO is clocking CLKOUT2

9 : FSRCO

FSRCO is clocking CLKOUT2

End of enumeration elements list.

PRESC : EXPORTCLK Prescaler
bits : 24 - 28 (5 bit)
access : read-write



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