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GPIO_S

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

PORTA_CTRL

PORTA_DOUT

PORTA_DIN

PORTB_CTRL

LOCK

GPIOLOCKSTATUS

ABUSALLOC

BBUSALLOC

CDBUSALLOC

PORTB_MODEL

PORTA_MODEL

PORTB_DOUT

EXTIPSELL

EXTIPINSELL

EXTIRISE

EXTIFALL

IF

IEN

EM4WUEN

EM4WUPOL

PORTB_DIN

DBGROUTEPEN

TRACEROUTEPEN

ACMP0_ROUTEEN

ACMP0_ACMPOUTROUTE

ACMP1_ROUTEEN

ACMP1_ACMPOUTROUTE

CMU_ROUTEEN

CMU_CLKIN0ROUTE

CMU_CLKOUT0ROUTE

CMU_CLKOUT1ROUTE

CMU_CLKOUT2ROUTE

FRC_ROUTEEN

FRC_DCLKROUTE

FRC_DFRAMEROUTE

FRC_DOUTROUTE

I2C0_ROUTEEN

I2C0_SCLROUTE

I2C0_SDAROUTE

I2C1_ROUTEEN

I2C1_SCLROUTE

I2C1_SDAROUTE

LETIMER0_ROUTEEN

LETIMER0_OUT0ROUTE

LETIMER0_OUT1ROUTE

MODEM_ROUTEEN

MODEM_ANT0ROUTE

MODEM_ANT1ROUTE

MODEM_DCLKROUTE

MODEM_DINROUTE

MODEM_DOUTROUTE

PRS0_ROUTEEN

PRS0_ASYNCH0ROUTE

PRS0_ASYNCH1ROUTE

PRS0_ASYNCH2ROUTE

PRS0_ASYNCH3ROUTE

PRS0_ASYNCH4ROUTE

PRS0_ASYNCH5ROUTE

PRS0_ASYNCH6ROUTE

PRS0_ASYNCH7ROUTE

PRS0_ASYNCH8ROUTE

PRS0_ASYNCH9ROUTE

PRS0_ASYNCH10ROUTE

PRS0_ASYNCH11ROUTE

PRS0_SYNCH0ROUTE

PRS0_SYNCH1ROUTE

PRS0_SYNCH2ROUTE

PRS0_SYNCH3ROUTE

TIMER0_ROUTEEN

TIMER0_CC0ROUTE

TIMER0_CC1ROUTE

TIMER0_CC2ROUTE

TIMER0_CDTI0ROUTE

TIMER0_CDTI1ROUTE

TIMER0_CDTI2ROUTE

TIMER1_ROUTEEN

TIMER1_CC0ROUTE

TIMER1_CC1ROUTE

TIMER1_CC2ROUTE

TIMER1_CDTI0ROUTE

TIMER1_CDTI1ROUTE

TIMER1_CDTI2ROUTE

TIMER2_ROUTEEN

TIMER2_CC0ROUTE

TIMER2_CC1ROUTE

TIMER2_CC2ROUTE

TIMER2_CDTI0ROUTE

TIMER2_CDTI1ROUTE

TIMER2_CDTI2ROUTE

TIMER3_ROUTEEN

TIMER3_CC0ROUTE

TIMER3_CC1ROUTE

TIMER3_CC2ROUTE

TIMER3_CDTI0ROUTE

TIMER3_CDTI1ROUTE

TIMER3_CDTI2ROUTE

USART0_ROUTEEN

USART0_CSROUTE

USART0_CTSROUTE

USART0_RTSROUTE

USART0_RXROUTE

USART0_CLKROUTE

USART0_TXROUTE

USART1_ROUTEEN

USART1_CSROUTE

USART1_CTSROUTE

USART1_RTSROUTE

USART1_RXROUTE

USART1_CLKROUTE

USART1_TXROUTE

USART2_ROUTEEN

USART2_CSROUTE

USART2_CTSROUTE

USART2_RTSROUTE

USART2_RXROUTE

PORTC_CTRL

USART2_CLKROUTE

USART2_TXROUTE

PORTC_MODEL

PORTC_DOUT

PORTC_DIN

PORTD_CTRL

PORTD_MODEL

PORTD_DOUT

PORTD_DIN


PORTA_CTRL

Port control
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_CTRL PORTA_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


PORTA_DOUT

data out
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_DOUT PORTA_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 6 (7 bit)
access : read-write


PORTA_DIN

data in
address_offset : 0x14 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTA_DIN PORTA_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 6 (7 bit)
access : read-only


PORTB_CTRL

Port control
address_offset : 0x30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_CTRL PORTB_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


LOCK

No Description
address_offset : 0x300 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

LOCK LOCK write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCKKEY

LOCKKEY : Configuration Lock Key
bits : 0 - 15 (16 bit)
access : write-only

Enumeration:

42292 : UNLOCK


End of enumeration elements list.


GPIOLOCKSTATUS

No Description
address_offset : 0x310 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

GPIOLOCKSTATUS GPIOLOCKSTATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LOCK

LOCK : GPIO LOCK Status
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : UNLOCKED


1 : LOCKED


End of enumeration elements list.


ABUSALLOC

A Bus allocation
address_offset : 0x320 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ABUSALLOC ABUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AEVEN0 AEVEN1 AODD0 AODD1

AEVEN0 : A Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

14 : DIAGA

The bus is allocated to DIAGA

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AEVEN1 : A Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AODD0 : A Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

14 : DIAGA

The bus is allocated to DIAGA

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

AODD1 : A Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


BBUSALLOC

B Bus allocation
address_offset : 0x324 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BBUSALLOC BBUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BEVEN0 BEVEN1 BODD0 BODD1

BEVEN0 : B Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BEVEN1 : B Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BODD0 : B Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

BODD1 : B Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


CDBUSALLOC

CD Bus allocation
address_offset : 0x328 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CDBUSALLOC CDBUSALLOC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CDEVEN0 CDEVEN1 CDODD0 CDODD1

CDEVEN0 : CD Bus Even 0
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

12 : PMON

The bus is allocated to Process Monitor

13 : EFUSE

The bus is allocated for EFUSE programming voltage

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDEVEN1 : CD Bus Even 1
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDODD0 : CD Bus Odd 0
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

12 : PMON

The bus is allocated to Process Monitor

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.

CDODD1 : CD Bus Odd 1
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : TRISTATE

The bus is not allocated

1 : ADC0

The bus is allocated to ADC0

2 : ACMP0

The bus is allocated to ACMP0

3 : ACMP1

The bus is allocated to ACMP1

15 : DEBUG

DEBUG mode, bus allocated to all clients

End of enumeration elements list.


PORTB_MODEL

mode low
address_offset : 0x34 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_MODEL PORTB_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTA_MODEL

mode low
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTA_MODEL PORTA_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE6 : MODE n
bits : 24 - 27 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTB_DOUT

data out
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTB_DOUT PORTB_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 1 (2 bit)
access : read-write


EXTIPSELL

External Interrupt Port Select Low
address_offset : 0x400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPSELL EXTIPSELL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPSEL0 EXTIPSEL1 EXTIPSEL2 EXTIPSEL3 EXTIPSEL4 EXTIPSEL5 EXTIPSEL6 EXTIPSEL7

EXTIPSEL0 : External Interrupt Port Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL1 : External Interrupt Port Select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL2 : External Interrupt Port Select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL3 : External Interrupt Port Select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL4 : External Interrupt Port Select
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL5 : External Interrupt Port Select
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL6 : External Interrupt Port Select
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.

EXTIPSEL7 : External Interrupt Port Select
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : PORTA

Port A group selected

1 : PORTB

Port B group selected

2 : PORTC

Port C group selected

3 : PORTD

Port D group selected

End of enumeration elements list.


EXTIPINSELL

External Interrupt Pin Select Low
address_offset : 0x408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIPINSELL EXTIPINSELL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIPINSEL0 EXTIPINSEL1 EXTIPINSEL2 EXTIPINSEL3 EXTIPINSEL4 EXTIPINSEL5 EXTIPINSEL6 EXTIPINSEL7

EXTIPINSEL0 : External Interrupt Pin select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL1 : External Interrupt Pin select
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL2 : External Interrupt Pin select
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL3 : External Interrupt Pin select
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL4 : External Interrupt Pin select
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL5 : External Interrupt Pin select
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL6 : External Interrupt Pin select
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.

EXTIPINSEL7 : External Interrupt Pin select
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0 : OFFSET0

OFFSET=0

1 : OFFSET1

OFFSET=1

2 : OFFSET2

OFFSET=2

3 : OFFSET3

OFFSET=3

End of enumeration elements list.


EXTIRISE

External Interrupt Rising Edge Trigger
address_offset : 0x410 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIRISE EXTIRISE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIRISE

EXTIRISE : EXT Int Rise
bits : 0 - 7 (8 bit)
access : read-write


EXTIFALL

External Interrupt Falling Edge Trigger
address_offset : 0x414 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EXTIFALL EXTIFALL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIFALL

EXTIFALL : EXT Int FALL
bits : 0 - 7 (8 bit)
access : read-write


IF

Interrupt Flag
address_offset : 0x420 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXT EM4WU

EXT : External Pin Flag
bits : 0 - 15 (16 bit)
access : read-write

EM4WU : EM4 wake up
bits : 16 - 31 (16 bit)
access : read-write


IEN

Interrupt Enable
address_offset : 0x424 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIEN EM4WUIEN

EXTIEN : External Pin Enable
bits : 0 - 15 (16 bit)
access : read-write

EM4WUIEN : EM4 Wake Up Interrupt En
bits : 16 - 31 (16 bit)
access : read-write


EM4WUEN

No Description
address_offset : 0x42C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM4WUEN EM4WUEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EM4WUEN

EM4WUEN : EM4 wake up enable
bits : 16 - 27 (12 bit)
access : read-write


EM4WUPOL

No Description
address_offset : 0x430 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EM4WUPOL EM4WUPOL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EM4WUPOL

EM4WUPOL : EM4 Wake-Up Polarity
bits : 16 - 27 (12 bit)
access : read-write


PORTB_DIN

data in
address_offset : 0x44 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTB_DIN PORTB_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 1 (2 bit)
access : read-only


DBGROUTEPEN

No Description
address_offset : 0x440 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DBGROUTEPEN DBGROUTEPEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWCLKTCKPEN SWDIOTMSPEN TDOPEN TDIPEN

SWCLKTCKPEN : Route Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

SWDIOTMSPEN : Route Location 0
bits : 1 - 1 (1 bit)
access : read-write

TDOPEN : JTAG Test Debug Output Pin Enable
bits : 2 - 2 (1 bit)
access : read-write

TDIPEN : JTAG Test Debug Input Pin Enable
bits : 3 - 3 (1 bit)
access : read-write


TRACEROUTEPEN

No Description
address_offset : 0x444 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TRACEROUTEPEN TRACEROUTEPEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SWVPEN TRACECLKPEN TRACEDATA0PEN

SWVPEN : Serial Wire Viewer Output Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

TRACECLKPEN : Trace Clk Pin Enable
bits : 1 - 1 (1 bit)
access : read-write

TRACEDATA0PEN : Trace Data0 Pin Enable
bits : 2 - 2 (1 bit)
access : read-write


ACMP0_ROUTEEN

No Description
address_offset : 0x450 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP0_ROUTEEN ACMP0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPOUTPEN

ACMPOUTPEN : ACMPOUT pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write


ACMP0_ACMPOUTROUTE

No Description
address_offset : 0x454 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP0_ACMPOUTROUTE ACMP0_ACMPOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ACMPOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ACMPOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


ACMP1_ROUTEEN

No Description
address_offset : 0x45C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP1_ROUTEEN ACMP1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPOUTPEN

ACMPOUTPEN : ACMPOUT pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write


ACMP1_ACMPOUTROUTE

No Description
address_offset : 0x460 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACMP1_ACMPOUTROUTE ACMP1_ACMPOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ACMPOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ACMPOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_ROUTEEN

No Description
address_offset : 0x468 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_ROUTEEN CMU_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLKOUT0PEN CLKOUT1PEN CLKOUT2PEN

CLKOUT0PEN : CLKOUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CLKOUT1PEN : CLKOUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CLKOUT2PEN : CLKOUT2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write


CMU_CLKIN0ROUTE

No Description
address_offset : 0x46C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKIN0ROUTE CMU_CLKIN0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKIN0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKIN0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT0ROUTE

No Description
address_offset : 0x470 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT0ROUTE CMU_CLKOUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT1ROUTE

No Description
address_offset : 0x474 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT1ROUTE CMU_CLKOUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


CMU_CLKOUT2ROUTE

No Description
address_offset : 0x478 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CMU_CLKOUT2ROUTE CMU_CLKOUT2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CLKOUT2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CLKOUT2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_ROUTEEN

No Description
address_offset : 0x484 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_ROUTEEN FRC_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DCLKPEN DFRAMEPEN DOUTPEN

DCLKPEN : DCLK pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

DFRAMEPEN : DFRAME pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

DOUTPEN : DOUT pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write


FRC_DCLKROUTE

No Description
address_offset : 0x488 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DCLKROUTE FRC_DCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_DFRAMEROUTE

No Description
address_offset : 0x48C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DFRAMEROUTE FRC_DFRAMEROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DFRAME port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DFRAME pin select register
bits : 16 - 19 (4 bit)
access : read-write


FRC_DOUTROUTE

No Description
address_offset : 0x490 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FRC_DOUTROUTE FRC_DOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C0_ROUTEEN

No Description
address_offset : 0x498 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_ROUTEEN I2C0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLPEN SDAPEN

SCLPEN : SCL pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

SDAPEN : SDA pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


I2C0_SCLROUTE

No Description
address_offset : 0x49C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SCLROUTE I2C0_SCLROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCL port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCL pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C0_SDAROUTE

No Description
address_offset : 0x4A0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C0_SDAROUTE I2C0_SDAROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SDA port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SDA pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C1_ROUTEEN

No Description
address_offset : 0x4A8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_ROUTEEN I2C1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCLPEN SDAPEN

SCLPEN : SCL pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

SDAPEN : SDA pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


I2C1_SCLROUTE

No Description
address_offset : 0x4AC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_SCLROUTE I2C1_SCLROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCL port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCL pin select register
bits : 16 - 19 (4 bit)
access : read-write


I2C1_SDAROUTE

No Description
address_offset : 0x4B0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

I2C1_SDAROUTE I2C1_SDAROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SDA port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SDA pin select register
bits : 16 - 19 (4 bit)
access : read-write


LETIMER0_ROUTEEN

No Description
address_offset : 0x4B8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER0_ROUTEEN LETIMER0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 OUT0PEN OUT1PEN

OUT0PEN : OUT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

OUT1PEN : OUT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write


LETIMER0_OUT0ROUTE

No Description
address_offset : 0x4BC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER0_OUT0ROUTE LETIMER0_OUT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : OUT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : OUT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


LETIMER0_OUT1ROUTE

No Description
address_offset : 0x4C0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LETIMER0_OUT1ROUTE LETIMER0_OUT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : OUT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : OUT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ROUTEEN

No Description
address_offset : 0x4C8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ROUTEEN MODEM_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ANT0PEN ANT1PEN DCLKPEN DOUTPEN

ANT0PEN : ANT0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

ANT1PEN : ANT1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

DCLKPEN : DCLK pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

DOUTPEN : DOUT pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write


MODEM_ANT0ROUTE

No Description
address_offset : 0x4CC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANT0ROUTE MODEM_ANT0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANT0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANT0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_ANT1ROUTE

No Description
address_offset : 0x4D0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_ANT1ROUTE MODEM_ANT1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ANT1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ANT1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DCLKROUTE

No Description
address_offset : 0x4D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DCLKROUTE MODEM_DCLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DINROUTE

No Description
address_offset : 0x4D8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DINROUTE MODEM_DINROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DIN port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DIN pin select register
bits : 16 - 19 (4 bit)
access : read-write


MODEM_DOUTROUTE

No Description
address_offset : 0x4DC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODEM_DOUTROUTE MODEM_DOUTROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : DOUT port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : DOUT pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ROUTEEN

No Description
address_offset : 0x4E4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ROUTEEN PRS0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ASYNCH0PEN ASYNCH1PEN ASYNCH2PEN ASYNCH3PEN ASYNCH4PEN ASYNCH5PEN ASYNCH6PEN ASYNCH7PEN ASYNCH8PEN ASYNCH9PEN ASYNCH10PEN ASYNCH11PEN SYNCH0PEN SYNCH1PEN SYNCH2PEN SYNCH3PEN

ASYNCH0PEN : ASYNCH0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

ASYNCH1PEN : ASYNCH1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

ASYNCH2PEN : ASYNCH2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

ASYNCH3PEN : ASYNCH3 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

ASYNCH4PEN : ASYNCH4 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

ASYNCH5PEN : ASYNCH5 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write

ASYNCH6PEN : ASYNCH6 pin enable control bit
bits : 6 - 6 (1 bit)
access : read-write

ASYNCH7PEN : ASYNCH7 pin enable control bit
bits : 7 - 7 (1 bit)
access : read-write

ASYNCH8PEN : ASYNCH8 pin enable control bit
bits : 8 - 8 (1 bit)
access : read-write

ASYNCH9PEN : ASYNCH9 pin enable control bit
bits : 9 - 9 (1 bit)
access : read-write

ASYNCH10PEN : ASYNCH10 pin enable control bit
bits : 10 - 10 (1 bit)
access : read-write

ASYNCH11PEN : ASYNCH11 pin enable control bit
bits : 11 - 11 (1 bit)
access : read-write

SYNCH0PEN : SYNCH0 pin enable control bit
bits : 12 - 12 (1 bit)
access : read-write

SYNCH1PEN : SYNCH1 pin enable control bit
bits : 13 - 13 (1 bit)
access : read-write

SYNCH2PEN : SYNCH2 pin enable control bit
bits : 14 - 14 (1 bit)
access : read-write

SYNCH3PEN : SYNCH3 pin enable control bit
bits : 15 - 15 (1 bit)
access : read-write


PRS0_ASYNCH0ROUTE

No Description
address_offset : 0x4E8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH0ROUTE PRS0_ASYNCH0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH1ROUTE

No Description
address_offset : 0x4EC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH1ROUTE PRS0_ASYNCH1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH2ROUTE

No Description
address_offset : 0x4F0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH2ROUTE PRS0_ASYNCH2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH3ROUTE

No Description
address_offset : 0x4F4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH3ROUTE PRS0_ASYNCH3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH4ROUTE

No Description
address_offset : 0x4F8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH4ROUTE PRS0_ASYNCH4ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH4 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH4 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH5ROUTE

No Description
address_offset : 0x4FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH5ROUTE PRS0_ASYNCH5ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH5 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH5 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH6ROUTE

No Description
address_offset : 0x500 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH6ROUTE PRS0_ASYNCH6ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH6 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH6 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH7ROUTE

No Description
address_offset : 0x504 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH7ROUTE PRS0_ASYNCH7ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH7 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH7 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH8ROUTE

No Description
address_offset : 0x508 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH8ROUTE PRS0_ASYNCH8ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH8 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH8 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH9ROUTE

No Description
address_offset : 0x50C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH9ROUTE PRS0_ASYNCH9ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH9 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH9 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH10ROUTE

No Description
address_offset : 0x510 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH10ROUTE PRS0_ASYNCH10ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH10 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH10 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_ASYNCH11ROUTE

No Description
address_offset : 0x514 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_ASYNCH11ROUTE PRS0_ASYNCH11ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : ASYNCH11 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : ASYNCH11 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH0ROUTE

No Description
address_offset : 0x518 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH0ROUTE PRS0_SYNCH0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH1ROUTE

No Description
address_offset : 0x51C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH1ROUTE PRS0_SYNCH1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH2ROUTE

No Description
address_offset : 0x520 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH2ROUTE PRS0_SYNCH2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


PRS0_SYNCH3ROUTE

No Description
address_offset : 0x524 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PRS0_SYNCH3ROUTE PRS0_SYNCH3ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SYNCH3 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SYNCH3 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_ROUTEEN

No Description
address_offset : 0x52C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_ROUTEEN TIMER0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CDTI0PEN CDTI1PEN CDTI2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CDTI0PEN : CDTI0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CDTI1PEN : CDTI1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CDTI2PEN : CDTI2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER0_CC0ROUTE

No Description
address_offset : 0x530 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC0ROUTE TIMER0_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CC1ROUTE

No Description
address_offset : 0x534 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC1ROUTE TIMER0_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CC2ROUTE

No Description
address_offset : 0x538 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CC2ROUTE TIMER0_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CDTI0ROUTE

No Description
address_offset : 0x53C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CDTI0ROUTE TIMER0_CDTI0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CDTI1ROUTE

No Description
address_offset : 0x540 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CDTI1ROUTE TIMER0_CDTI1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER0_CDTI2ROUTE

No Description
address_offset : 0x544 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER0_CDTI2ROUTE TIMER0_CDTI2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_ROUTEEN

No Description
address_offset : 0x54C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_ROUTEEN TIMER1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CDTI0PEN CDTI1PEN CDTI2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CDTI0PEN : CDTI0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CDTI1PEN : CDTI1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CDTI2PEN : CDTI2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER1_CC0ROUTE

No Description
address_offset : 0x550 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC0ROUTE TIMER1_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CC1ROUTE

No Description
address_offset : 0x554 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC1ROUTE TIMER1_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CC2ROUTE

No Description
address_offset : 0x558 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CC2ROUTE TIMER1_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CDTI0ROUTE

No Description
address_offset : 0x55C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CDTI0ROUTE TIMER1_CDTI0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CDTI1ROUTE

No Description
address_offset : 0x560 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CDTI1ROUTE TIMER1_CDTI1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER1_CDTI2ROUTE

No Description
address_offset : 0x564 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER1_CDTI2ROUTE TIMER1_CDTI2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_ROUTEEN

No Description
address_offset : 0x56C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_ROUTEEN TIMER2_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CDTI0PEN CDTI1PEN CDTI2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CDTI0PEN : CDTI0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CDTI1PEN : CDTI1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CDTI2PEN : CDTI2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER2_CC0ROUTE

No Description
address_offset : 0x570 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC0ROUTE TIMER2_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CC1ROUTE

No Description
address_offset : 0x574 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC1ROUTE TIMER2_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CC2ROUTE

No Description
address_offset : 0x578 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CC2ROUTE TIMER2_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CDTI0ROUTE

No Description
address_offset : 0x57C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CDTI0ROUTE TIMER2_CDTI0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CDTI1ROUTE

No Description
address_offset : 0x580 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CDTI1ROUTE TIMER2_CDTI1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER2_CDTI2ROUTE

No Description
address_offset : 0x584 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER2_CDTI2ROUTE TIMER2_CDTI2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_ROUTEEN

No Description
address_offset : 0x58C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_ROUTEEN TIMER3_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CC0PEN CC1PEN CC2PEN CDTI0PEN CDTI1PEN CDTI2PEN

CC0PEN : CC0 pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

CC1PEN : CC1 pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

CC2PEN : CC2 pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CDTI0PEN : CDTI0 pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

CDTI1PEN : CDTI1 pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write

CDTI2PEN : CDTI2 pin enable control bit
bits : 5 - 5 (1 bit)
access : read-write


TIMER3_CC0ROUTE

No Description
address_offset : 0x590 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC0ROUTE TIMER3_CC0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CC1ROUTE

No Description
address_offset : 0x594 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC1ROUTE TIMER3_CC1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CC2ROUTE

No Description
address_offset : 0x598 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CC2ROUTE TIMER3_CC2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CDTI0ROUTE

No Description
address_offset : 0x59C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CDTI0ROUTE TIMER3_CDTI0ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC0 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC0 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CDTI1ROUTE

No Description
address_offset : 0x5A0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CDTI1ROUTE TIMER3_CDTI1ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC1 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC1 pin select register
bits : 16 - 19 (4 bit)
access : read-write


TIMER3_CDTI2ROUTE

No Description
address_offset : 0x5A4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMER3_CDTI2ROUTE TIMER3_CDTI2ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CCC2 port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CCC2 pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_ROUTEEN

No Description
address_offset : 0x5AC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_ROUTEEN USART0_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN CLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CLKPEN : CLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


USART0_CSROUTE

No Description
address_offset : 0x5B0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CSROUTE USART0_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_CTSROUTE

No Description
address_offset : 0x5B4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CTSROUTE USART0_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_RTSROUTE

No Description
address_offset : 0x5B8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_RTSROUTE USART0_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_RXROUTE

No Description
address_offset : 0x5BC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_RXROUTE USART0_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_CLKROUTE

No Description
address_offset : 0x5C0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_CLKROUTE USART0_CLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART0_TXROUTE

No Description
address_offset : 0x5C4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART0_TXROUTE USART0_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_ROUTEEN

No Description
address_offset : 0x5CC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_ROUTEEN USART1_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN CLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CLKPEN : CLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


USART1_CSROUTE

No Description
address_offset : 0x5D0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_CSROUTE USART1_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_CTSROUTE

No Description
address_offset : 0x5D4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_CTSROUTE USART1_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_RTSROUTE

No Description
address_offset : 0x5D8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_RTSROUTE USART1_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_RXROUTE

No Description
address_offset : 0x5DC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_RXROUTE USART1_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_CLKROUTE

No Description
address_offset : 0x5E0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_CLKROUTE USART1_CLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART1_TXROUTE

No Description
address_offset : 0x5E4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART1_TXROUTE USART1_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART2_ROUTEEN

No Description
address_offset : 0x5EC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_ROUTEEN USART2_ROUTEEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CSPEN RTSPEN RXPEN CLKPEN TXPEN

CSPEN : CS pin enable control bit
bits : 0 - 0 (1 bit)
access : read-write

RTSPEN : RTS pin enable control bit
bits : 1 - 1 (1 bit)
access : read-write

RXPEN : RX pin enable control bit
bits : 2 - 2 (1 bit)
access : read-write

CLKPEN : CLK pin enable control bit
bits : 3 - 3 (1 bit)
access : read-write

TXPEN : TX pin enable control bit
bits : 4 - 4 (1 bit)
access : read-write


USART2_CSROUTE

No Description
address_offset : 0x5F0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_CSROUTE USART2_CSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART2_CTSROUTE

No Description
address_offset : 0x5F4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_CTSROUTE USART2_CTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : CTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : CTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART2_RTSROUTE

No Description
address_offset : 0x5F8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_RTSROUTE USART2_RTSROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RTS port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RTS pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART2_RXROUTE

No Description
address_offset : 0x5FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_RXROUTE USART2_RXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : RX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : RX pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTC_CTRL

Port control
address_offset : 0x60 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_CTRL PORTC_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


USART2_CLKROUTE

No Description
address_offset : 0x600 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_CLKROUTE USART2_CLKROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : SCLK port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : SCLK pin select register
bits : 16 - 19 (4 bit)
access : read-write


USART2_TXROUTE

No Description
address_offset : 0x604 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

USART2_TXROUTE USART2_TXROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PORT PIN

PORT : TX port select register
bits : 0 - 1 (2 bit)
access : read-write

PIN : TX pin select register
bits : 16 - 19 (4 bit)
access : read-write


PORTC_MODEL

mode low
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_MODEL PORTC_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE5 : MODE n
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTC_DOUT

data out
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTC_DOUT PORTC_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 5 (6 bit)
access : read-write


PORTC_DIN

data in
address_offset : 0x74 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTC_DIN PORTC_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 5 (6 bit)
access : read-only


PORTD_CTRL

Port control
address_offset : 0x90 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_CTRL PORTD_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEWRATE DINDIS SLEWRATEALT DINDISALT

SLEWRATE : Slew Rate
bits : 4 - 6 (3 bit)
access : read-write

DINDIS : Data In Disable
bits : 12 - 12 (1 bit)
access : read-write

SLEWRATEALT : Slew Rate Alt
bits : 20 - 22 (3 bit)
access : read-write

DINDISALT : Data In Disable Alt
bits : 28 - 28 (1 bit)
access : read-write


PORTD_MODEL

mode low
address_offset : 0x94 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_MODEL PORTD_MODEL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4

MODE0 : MODE n
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE1 : MODE n
bits : 4 - 7 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE2 : MODE n
bits : 8 - 11 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE3 : MODE n
bits : 12 - 15 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.

MODE4 : MODE n
bits : 16 - 19 (4 bit)
access : read-write

Enumeration:

0 : DISABLED

Input disabled. Pullup if DOUT is set.

1 : INPUT

Input enabled. Filter if DOUT is set.

2 : INPUTPULL

Input enabled. DOUT determines pull direction.

3 : INPUTPULLFILTER

Input enabled with filter. DOUT determines pull direction.

4 : PUSHPULL

Push-pull output.

5 : PUSHPULLALT

Push-pull using alternate control.

6 : WIREDOR

Wired-or output.

7 : WIREDORPULLDOWN

Wired-or output with pull-down.

8 : WIREDAND

Open-drain output.

9 : WIREDANDFILTER

Open-drain output with filter.

10 : WIREDANDPULLUP

Open-drain output with pullup.

11 : WIREDANDPULLUPFILTER

Open-drain output with filter and pullup.

12 : WIREDANDALT

Open-drain output using alternate control.

13 : WIREDANDALTFILTER

Open-drain output using alternate control with filter.

14 : WIREDANDALTPULLUP

Open-drain output using alternate control with pullup.

15 : WIREDANDALTPULLUPFILTER

Open-drain output using alternate control with filter and pullup.

End of enumeration elements list.


PORTD_DOUT

data out
address_offset : 0xA0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PORTD_DOUT PORTD_DOUT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DOUT

DOUT : Data output
bits : 0 - 4 (5 bit)
access : read-write


PORTD_DIN

data in
address_offset : 0xA4 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PORTD_DIN PORTD_DIN read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DIN

DIN : Data input
bits : 0 - 4 (5 bit)
access : read-only



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