\n

BUFC_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IPVERSION

BUF0_WRITEOFFSET

BUF0_READOFFSET

BUF0_READDATA

BUF0_WRITEDATA

BUF0_XWRITE

BUF0_STATUS

BUF0_THRESHOLDCTRL

BUF0_CMD

BUF0_FIFOASYNC

BUF1_CTRL

BUF1_ADDR

EN

BUF1_WRITEOFFSET

BUF1_READOFFSET

BUF1_READDATA

BUF1_WRITEDATA

BUF1_XWRITE

BUF1_STATUS

BUF1_THRESHOLDCTRL

BUF1_CMD

BUF1_FIFOASYNC

BUF2_CTRL

BUF2_ADDR

BUF2_WRITEOFFSET

BUF2_READOFFSET

BUF2_READDATA

BUF0_CTRL

BUF2_WRITEDATA

BUF2_XWRITE

BUF2_STATUS

BUF2_THRESHOLDCTRL

BUF2_CMD

BUF2_FIFOASYNC

BUF3_CTRL

BUF3_ADDR

BUF3_WRITEOFFSET

BUF3_READOFFSET

BUF3_READDATA

BUF3_WRITEDATA

BUF3_XWRITE

BUF3_STATUS

BUF3_THRESHOLDCTRL

BUF0_ADDR

BUF3_CMD

BUF3_FIFOASYNC

IF

IEN

RAMBASEADDR


IPVERSION

No Description
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP Version
bits : 0 - 31 (32 bit)
access : read-only


BUF0_WRITEOFFSET

No Description
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_WRITEOFFSET BUF0_WRITEOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEOFFSET

WRITEOFFSET : Write Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF0_READOFFSET

No Description
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_READOFFSET BUF0_READOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READOFFSET

READOFFSET : Read Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF0_READDATA

No Description
address_offset : 0x1C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_READDATA BUF0_READDATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READDATA

READDATA : Buffer Read Data
bits : 0 - 7 (8 bit)
access : read-only


BUF0_WRITEDATA

No Description
address_offset : 0x20 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_WRITEDATA BUF0_WRITEDATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEDATA

WRITEDATA : Buffer Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF0_XWRITE

No Description
address_offset : 0x24 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_XWRITE BUF0_XWRITE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XORWRITEDATA

XORWRITEDATA : Buffer XOR Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF0_STATUS

No Description
address_offset : 0x28 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_STATUS BUF0_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYTES THRESHOLDFLAG

BYTES : Number of Bytes in the Buffer
bits : 0 - 12 (13 bit)
access : read-only

THRESHOLDFLAG : Buffer Threshold Flag
bits : 20 - 20 (1 bit)
access : read-only


BUF0_THRESHOLDCTRL

No Description
address_offset : 0x2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_THRESHOLDCTRL BUF0_THRESHOLDCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRESHOLD THRESHOLDMODE

THRESHOLD : Buffer Threshold Value
bits : 0 - 11 (12 bit)
access : read-write

THRESHOLDMODE : Buffer Threshold Mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : LARGER

THRESHOLDIF will be set if BYTES is larger than THRESHOLD

1 : LESSOREQUAL

THRESHOLDIF will be set if BYTES is less than or equal to THRESHOLD

End of enumeration elements list.


BUF0_CMD

No Description
address_offset : 0x30 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_CMD BUF0_CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLEAR PREFETCH

CLEAR : Buffer Clear
bits : 0 - 0 (1 bit)
access : write-only

PREFETCH : Prefetch
bits : 1 - 1 (1 bit)
access : write-only


BUF0_FIFOASYNC

No Description
address_offset : 0x34 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF0_FIFOASYNC BUF0_FIFOASYNC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RST

RST : Reset ASYNC
bits : 0 - 0 (1 bit)
access : write-only


BUF1_CTRL

No Description
address_offset : 0x38 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_CTRL BUF1_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE

SIZE : Buffer Size
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : SIZE64

Sets Buffer size to 64 bytes

1 : SIZE128

Sets Buffer size to 128 bytes

2 : SIZE256

Sets Buffer size to 256 bytes

3 : SIZE512

Sets Buffer size to 512 bytes

4 : SIZE1024

Sets Buffer size to 1024 bytes

5 : SIZE2048

Sets Buffer size to 2048 bytes

6 : SIZE4096

Sets Buffer size to 4096 bytes

End of enumeration elements list.


BUF1_ADDR

No Description
address_offset : 0x3C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_ADDR BUF1_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Buffer Address
bits : 0 - 23 (24 bit)
access : read-write


EN

No Description
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

EN EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN

EN : Enable peripheral clock to this module
bits : 0 - 0 (1 bit)
access : read-write


BUF1_WRITEOFFSET

No Description
address_offset : 0x40 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_WRITEOFFSET BUF1_WRITEOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEOFFSET

WRITEOFFSET : Write Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF1_READOFFSET

No Description
address_offset : 0x44 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_READOFFSET BUF1_READOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READOFFSET

READOFFSET : Read Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF1_READDATA

No Description
address_offset : 0x4C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_READDATA BUF1_READDATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READDATA

READDATA : Buffer Read Data
bits : 0 - 7 (8 bit)
access : read-only


BUF1_WRITEDATA

No Description
address_offset : 0x50 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_WRITEDATA BUF1_WRITEDATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEDATA

WRITEDATA : Buffer Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF1_XWRITE

No Description
address_offset : 0x54 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_XWRITE BUF1_XWRITE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XORWRITEDATA

XORWRITEDATA : Buffer XOR Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF1_STATUS

No Description
address_offset : 0x58 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_STATUS BUF1_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYTES THRESHOLDFLAG

BYTES : Number of Bytes in the Buffer
bits : 0 - 12 (13 bit)
access : read-only

THRESHOLDFLAG : Buffer Threshold Flag
bits : 20 - 20 (1 bit)
access : read-only


BUF1_THRESHOLDCTRL

No Description
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_THRESHOLDCTRL BUF1_THRESHOLDCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRESHOLD THRESHOLDMODE

THRESHOLD : Buffer Threshold Value
bits : 0 - 11 (12 bit)
access : read-write

THRESHOLDMODE : Buffer Threshold Mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : LARGER

THRESHOLDIF will be set if BYTES is larger than THRESHOLD

1 : LESSOREQUAL

THRESHOLDIF will be set if BYTES is less than or equal to THRESHOLD

End of enumeration elements list.


BUF1_CMD

No Description
address_offset : 0x60 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_CMD BUF1_CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLEAR PREFETCH

CLEAR : Buffer Clear
bits : 0 - 0 (1 bit)
access : write-only

PREFETCH : Prefetch
bits : 1 - 1 (1 bit)
access : write-only


BUF1_FIFOASYNC

No Description
address_offset : 0x64 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF1_FIFOASYNC BUF1_FIFOASYNC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RST

RST : Reset ASYNC
bits : 0 - 0 (1 bit)
access : write-only


BUF2_CTRL

No Description
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_CTRL BUF2_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE

SIZE : Buffer Size
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : SIZE64

Sets Buffer size to 64 bytes

1 : SIZE128

Sets Buffer size to 128 bytes

2 : SIZE256

Sets Buffer size to 256 bytes

3 : SIZE512

Sets Buffer size to 512 bytes

4 : SIZE1024

Sets Buffer size to 1024 bytes

5 : SIZE2048

Sets Buffer size to 2048 bytes

6 : SIZE4096

Sets Buffer size to 4096 bytes

End of enumeration elements list.


BUF2_ADDR

No Description
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_ADDR BUF2_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Buffer Address
bits : 0 - 23 (24 bit)
access : read-write


BUF2_WRITEOFFSET

No Description
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_WRITEOFFSET BUF2_WRITEOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEOFFSET

WRITEOFFSET : Write Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF2_READOFFSET

No Description
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_READOFFSET BUF2_READOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READOFFSET

READOFFSET : Read Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF2_READDATA

No Description
address_offset : 0x7C Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_READDATA BUF2_READDATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READDATA

READDATA : Buffer Read Data
bits : 0 - 7 (8 bit)
access : read-only


BUF0_CTRL

No Description
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_CTRL BUF0_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE

SIZE : Buffer Size
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : SIZE64

Sets Buffer size to 64 bytes

1 : SIZE128

Sets Buffer size to 128 bytes

2 : SIZE256

Sets Buffer size to 256 bytes

3 : SIZE512

Sets Buffer size to 512 bytes

4 : SIZE1024

Sets Buffer size to 1024 bytes

5 : SIZE2048

Sets Buffer size to 2048 bytes

6 : SIZE4096

Sets Buffer size to 4096 bytes

End of enumeration elements list.


BUF2_WRITEDATA

No Description
address_offset : 0x80 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_WRITEDATA BUF2_WRITEDATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEDATA

WRITEDATA : Buffer Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF2_XWRITE

No Description
address_offset : 0x84 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_XWRITE BUF2_XWRITE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XORWRITEDATA

XORWRITEDATA : Buffer XOR Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF2_STATUS

No Description
address_offset : 0x88 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_STATUS BUF2_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYTES THRESHOLDFLAG

BYTES : Number of Bytes in the Buffer
bits : 0 - 12 (13 bit)
access : read-only

THRESHOLDFLAG : Buffer Threshold Flag
bits : 20 - 20 (1 bit)
access : read-only


BUF2_THRESHOLDCTRL

No Description
address_offset : 0x8C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_THRESHOLDCTRL BUF2_THRESHOLDCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRESHOLD THRESHOLDMODE

THRESHOLD : Buffer Threshold Value
bits : 0 - 11 (12 bit)
access : read-write

THRESHOLDMODE : Buffer Threshold Mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : LARGER

THRESHOLDIF will be set if BYTES is larger than THRESHOLD

1 : LESSOREQUAL

THRESHOLDIF will be set if BYTES is less than or equal to THRESHOLD

End of enumeration elements list.


BUF2_CMD

No Description
address_offset : 0x90 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_CMD BUF2_CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLEAR PREFETCH

CLEAR : Buffer Clear
bits : 0 - 0 (1 bit)
access : write-only

PREFETCH : Prefetch
bits : 1 - 1 (1 bit)
access : write-only


BUF2_FIFOASYNC

No Description
address_offset : 0x94 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF2_FIFOASYNC BUF2_FIFOASYNC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RST

RST : Reset ASYNC
bits : 0 - 0 (1 bit)
access : write-only


BUF3_CTRL

No Description
address_offset : 0x98 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_CTRL BUF3_CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SIZE

SIZE : Buffer Size
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0 : SIZE64

Sets Buffer size to 64 bytes

1 : SIZE128

Sets Buffer size to 128 bytes

2 : SIZE256

Sets Buffer size to 256 bytes

3 : SIZE512

Sets Buffer size to 512 bytes

4 : SIZE1024

Sets Buffer size to 1024 bytes

5 : SIZE2048

Sets Buffer size to 2048 bytes

6 : SIZE4096

Sets Buffer size to 4096 bytes

End of enumeration elements list.


BUF3_ADDR

No Description
address_offset : 0x9C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_ADDR BUF3_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Buffer Address
bits : 0 - 23 (24 bit)
access : read-write


BUF3_WRITEOFFSET

No Description
address_offset : 0xA0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_WRITEOFFSET BUF3_WRITEOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEOFFSET

WRITEOFFSET : Write Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF3_READOFFSET

No Description
address_offset : 0xA4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_READOFFSET BUF3_READOFFSET read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READOFFSET

READOFFSET : Read Offset
bits : 0 - 12 (13 bit)
access : read-write


BUF3_READDATA

No Description
address_offset : 0xAC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_READDATA BUF3_READDATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 READDATA

READDATA : Buffer Read Data
bits : 0 - 7 (8 bit)
access : read-only


BUF3_WRITEDATA

No Description
address_offset : 0xB0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_WRITEDATA BUF3_WRITEDATA write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WRITEDATA

WRITEDATA : Buffer Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF3_XWRITE

No Description
address_offset : 0xB4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_XWRITE BUF3_XWRITE write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 XORWRITEDATA

XORWRITEDATA : Buffer XOR Write Data
bits : 0 - 7 (8 bit)
access : write-only


BUF3_STATUS

No Description
address_offset : 0xB8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_STATUS BUF3_STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BYTES THRESHOLDFLAG

BYTES : Number of Bytes in the Buffer
bits : 0 - 12 (13 bit)
access : read-only

THRESHOLDFLAG : Buffer Threshold Flag
bits : 20 - 20 (1 bit)
access : read-only


BUF3_THRESHOLDCTRL

No Description
address_offset : 0xBC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_THRESHOLDCTRL BUF3_THRESHOLDCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 THRESHOLD THRESHOLDMODE

THRESHOLD : Buffer Threshold Value
bits : 0 - 11 (12 bit)
access : read-write

THRESHOLDMODE : Buffer Threshold Mode
bits : 13 - 13 (1 bit)
access : read-write

Enumeration:

0 : LARGER

THRESHOLDIF will be set if BYTES is larger than THRESHOLD

1 : LESSOREQUAL

THRESHOLDIF will be set if BYTES is less than or equal to THRESHOLD

End of enumeration elements list.


BUF0_ADDR

No Description
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_ADDR BUF0_ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Buffer Address
bits : 0 - 23 (24 bit)
access : read-write


BUF3_CMD

No Description
address_offset : 0xC0 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_CMD BUF3_CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLEAR PREFETCH

CLEAR : Buffer Clear
bits : 0 - 0 (1 bit)
access : write-only

PREFETCH : Prefetch
bits : 1 - 1 (1 bit)
access : write-only


BUF3_FIFOASYNC

No Description
address_offset : 0xC4 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BUF3_FIFOASYNC BUF3_FIFOASYNC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RST

RST : Reset ASYNC
bits : 0 - 0 (1 bit)
access : write-only


IF

No Description
address_offset : 0xE0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF0OF BUF0UF BUF0THR BUF0CORR BUF1OF BUF1UF BUF1THR BUF1CORR BUF2OF BUF2UF BUF2THR BUF2CORR BUF3OF BUF3UF BUF3THR BUF3CORR BUSERROR

BUF0OF : Buffer 0 Overflow
bits : 0 - 0 (1 bit)
access : read-write

BUF0UF : Buffer 0 Underflow
bits : 1 - 1 (1 bit)
access : read-write

BUF0THR : Buffer 0 Threshold Event
bits : 2 - 2 (1 bit)
access : read-write

BUF0CORR : Buffer 0 Corrupt
bits : 3 - 3 (1 bit)
access : read-write

BUF1OF : Buffer 1 Overflow
bits : 8 - 8 (1 bit)
access : read-write

BUF1UF : Buffer 1 Underflow
bits : 9 - 9 (1 bit)
access : read-write

BUF1THR : Buffer 2 Threshold Event
bits : 10 - 10 (1 bit)
access : read-write

BUF1CORR : Buffer 1 Corrupt
bits : 11 - 11 (1 bit)
access : read-write

BUF2OF : Buffer 2 Overflow
bits : 16 - 16 (1 bit)
access : read-write

BUF2UF : Buffer 2 Underflow
bits : 17 - 17 (1 bit)
access : read-write

BUF2THR : Buffer 2 Threshold Event
bits : 18 - 18 (1 bit)
access : read-write

BUF2CORR : Buffer 2 Corrupt
bits : 19 - 19 (1 bit)
access : read-write

BUF3OF : Buffer 3 Overflow
bits : 24 - 24 (1 bit)
access : read-write

BUF3UF : Buffer 3 Underflow
bits : 25 - 25 (1 bit)
access : read-write

BUF3THR : Buffer 3 Threshold Event
bits : 26 - 26 (1 bit)
access : read-write

BUF3CORR : Buffer 3 Corrupt
bits : 27 - 27 (1 bit)
access : read-write

BUSERROR : Bus Error
bits : 31 - 31 (1 bit)
access : read-write


IEN

No Description
address_offset : 0xEC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUF0OF BUF0UF BUF0THR BUF0CORR BUF1OF BUF1UF BUF1THR BUF1CORR BUF2OF BUF2UF BUF2THR BUF2CORR BUF3OF BUF3UF BUF3THR BUF3CORR BUSERROR

BUF0OF : BUF0OF Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

BUF0UF : BUF0UF Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

BUF0THR : BUF0THR Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

BUF0CORR : BUF0CORR Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write

BUF1OF : BUF1OF Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write

BUF1UF : BUF1UF Interrupt Enable
bits : 9 - 9 (1 bit)
access : read-write

BUF1THR : BUF1THR Interrupt Enable
bits : 10 - 10 (1 bit)
access : read-write

BUF1CORR : BUF1CORR Interrupt Enable
bits : 11 - 11 (1 bit)
access : read-write

BUF2OF : BUF2OF Interrupt Enable
bits : 16 - 16 (1 bit)
access : read-write

BUF2UF : BUF2UF Interrupt Enable
bits : 17 - 17 (1 bit)
access : read-write

BUF2THR : BUF2THR Interrupt Enable
bits : 18 - 18 (1 bit)
access : read-write

BUF2CORR : BUF2CORR Interrupt Enable
bits : 19 - 19 (1 bit)
access : read-write

BUF3OF : BUF3OF Interrupt Enable
bits : 24 - 24 (1 bit)
access : read-write

BUF3UF : BUF3UF Interrupt Enable
bits : 25 - 25 (1 bit)
access : read-write

BUF3THR : BUF3THR Interrupt Enable
bits : 26 - 26 (1 bit)
access : read-write

BUF3CORR : BUF3CORR Interrupt Enable
bits : 27 - 27 (1 bit)
access : read-write

BUSERROR : BUSERROR Interrupt Enable
bits : 31 - 31 (1 bit)
access : read-write


RAMBASEADDR

No Description
address_offset : 0xF0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

RAMBASEADDR RAMBASEADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RAMBASEADDR

RAMBASEADDR : RAM BASE ADDR
bits : 16 - 31 (16 bit)
access : read-write



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