Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
IPVERSION
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IPVERSION
bits : 0 - 31 (32 bit)
access : read-only
Test
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SYNCCLK : Sync Clock
bits : 0 - 0 (1 bit)
access : read-write
SYNCMODE : Sync Mode
bits : 1 - 1 (1 bit)
access : read-write
FORCEREQUEST : Force Request
bits : 4 - 4 (1 bit)
access : read-write
FORCEHICAP : Force high capacitance driver
bits : 8 - 8 (1 bit)
access : read-write
FORCELOCAP : Force low capacitance driver
bits : 9 - 9 (1 bit)
access : read-write
FORCEBOOSTON : Force Boost On
bits : 12 - 12 (1 bit)
access : read-write
FORCEBOOSTOFF : Force Boost Off
bits : 13 - 13 (1 bit)
access : read-write
No Description
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WARMUPTIME : Warm up time
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : WUCYCLES72
Warm up cycle = 72 3.6us @20 MHz
1 : WUCYCLES96
Warm up cycle = 96 4.8us @ 20 MHz
2 : WUCYCLES128
Warm up cycle = 128 6.4us @ 20 MHz
3 : WUCYCLES160
Warm up cycle = 160 8.0us @ 20 MHz
End of enumeration elements list.
FLOATVDDCPLO : Float VDDCP Low Power
bits : 2 - 2 (1 bit)
access : read-write
FLOATVDDCPHI : Float VDDCP High Power
bits : 3 - 3 (1 bit)
access : read-write
BYPASSDIV2LO : Bypass Div2 Low Power
bits : 4 - 4 (1 bit)
access : read-write
BYPASSDIV2HI : Bypass Div2 High Power
bits : 5 - 5 (1 bit)
access : read-write
BUMP0P5XLO : Bump 0.5X Low Power
bits : 6 - 6 (1 bit)
access : read-write
BUMP0P5XHI : Bump 0.5X High Power
bits : 7 - 7 (1 bit)
access : read-write
BIAS2XLO : Bias 2x Low Power
bits : 8 - 8 (1 bit)
access : read-write
BIAS2XHI : Bias 2x High Power
bits : 9 - 9 (1 bit)
access : read-write
VOLTAGECTRLLO : Charge Pump Voltage Control Low Power
bits : 10 - 11 (2 bit)
access : read-write
VOLTAGECTRLHI : Charge Pump Voltage Control High Power
bits : 13 - 14 (2 bit)
access : read-write
BIASCTRLLO : Bias Control Low Power
bits : 16 - 18 (3 bit)
access : read-write
BIASCTRLHI : Bias Control High Power
bits : 20 - 22 (3 bit)
access : read-write
PUMPCAPLO : Pump Cap Low Power
bits : 24 - 26 (3 bit)
access : read-write
PUMPCAPHI : Pump Cap High Power
bits : 28 - 30 (3 bit)
access : read-write
Control
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
FORCEHP : Force High Power
bits : 0 - 0 (1 bit)
access : read-write
FORCELP : Force Low Power
bits : 1 - 1 (1 bit)
access : read-write
FORCERUN : Force run
bits : 4 - 4 (1 bit)
access : read-write
FORCESTOP : Force stop
bits : 5 - 5 (1 bit)
access : read-write
Status
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RUN : running
bits : 0 - 0 (1 bit)
access : read-only
HICAP : high cap
bits : 1 - 1 (1 bit)
access : read-only
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