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IDAC0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

STATUS

IF

IFS

IFC

IEN

APORTREQ

APORTCONFLICT

CURPROG

DUTYCONFIG


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN CURSINK MINOUTTRANS APORTOUTEN APORTOUTSEL PWRSEL EM2DELAY APORTMASTERDIS APORTOUTENPRS MAINOUTEN MAINOUTENPRS PRSSEL

EN : Current DAC Enable
bits : 0 - 0 (1 bit)
access : read-write

CURSINK : Current Sink Enable
bits : 1 - 1 (1 bit)
access : read-write

MINOUTTRANS : Minimum Output Transition Enable
bits : 2 - 2 (1 bit)
access : read-write

APORTOUTEN : APORT Output Enable
bits : 3 - 3 (1 bit)
access : read-write

APORTOUTSEL : APORT Output Select
bits : 4 - 11 (8 bit)
access : read-write

Enumeration:

0x00000020 : APORT1XCH0

APORT1X Channel 0

0x00000021 : APORT1YCH1

APORT1Y Channel 1

0x00000022 : APORT1XCH2

APORT1X Channel 2

0x00000023 : APORT1YCH3

APORT1Y Channel 3

0x00000024 : APORT1XCH4

APORT1X Channel 4

0x00000025 : APORT1YCH5

APORT1Y Channel 5

0x00000026 : APORT1XCH6

APORT1X Channel 6

0x00000027 : APORT1YCH7

APORT1Y Channel 7

0x00000028 : APORT1XCH8

APORT1X Channel 8

0x00000029 : APORT1YCH9

APORT1Y Channel 9

0x0000002A : APORT1XCH10

APORT1X Channel 10

0x0000002B : APORT1YCH11

APORT1Y Channel 11

0x0000002C : APORT1XCH12

APORT1X Channel 12

0x0000002D : APORT1YCH13

APORT1Y Channel 13

0x0000002E : APORT1XCH14

APORT1X Channel 14

0x0000002F : APORT1YCH15

APORT1Y Channel 15

0x00000030 : APORT1XCH16

APORT1X Channel 16

0x00000031 : APORT1YCH17

APORT1Y Channel 17

0x00000032 : APORT1XCH18

APORT1X Channel 18

0x00000033 : APORT1YCH19

APORT1Y Channel 19

0x00000034 : APORT1XCH20

APORT1X Channel 20

0x00000035 : APORT1YCH21

APORT1Y Channel 21

0x00000036 : APORT1XCH22

APORT1X Channel 22

0x00000037 : APORT1YCH23

APORT1Y Channel 23

0x00000038 : APORT1XCH24

APORT1X Channel 24

0x00000039 : APORT1YCH25

APORT1Y Channel 25

0x0000003A : APORT1XCH26

APORT1X Channel 26

0x0000003B : APORT1YCH27

APORT1Y Channel 27

0x0000003C : APORT1XCH28

APORT1X Channel 28

0x0000003D : APORT1YCH29

APORT1Y Channel 29

0x0000003E : APORT1XCH30

APORT1X Channel 30

0x0000003F : APORT1YCH31

APORT1Y Channel 31

End of enumeration elements list.

PWRSEL : Power Select
bits : 12 - 12 (1 bit)
access : read-write

EM2DELAY : EM2 Delay
bits : 13 - 13 (1 bit)
access : read-write

APORTMASTERDIS : APORT Bus Master Disable
bits : 14 - 14 (1 bit)
access : read-write

APORTOUTENPRS : PRS Controlled APORT Output Enable
bits : 16 - 16 (1 bit)
access : read-write

MAINOUTEN : Output Enable
bits : 18 - 18 (1 bit)
access : read-write

MAINOUTENPRS : PRS Controlled Main Pad Output Enable
bits : 19 - 19 (1 bit)
access : read-write

PRSSEL : IDAC Output Enable PRS Channel Select
bits : 20 - 23 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected.

0x00000001 : PRSCH1

PRS Channel 1 selected.

0x00000002 : PRSCH2

PRS Channel 2 selected.

0x00000003 : PRSCH3

PRS Channel 3 selected.

0x00000004 : PRSCH4

PRS Channel 4 selected.

0x00000005 : PRSCH5

PRS Channel 5 selected.

0x00000006 : PRSCH6

PRS Channel 6 selected.

0x00000007 : PRSCH7

PRS Channel 7 selected.

0x00000008 : PRSCH8

PRS Channel 8 selected.

0x00000009 : PRSCH9

PRS Channel 9 selected.

0x0000000A : PRSCH10

PRS Channel 10 selected.

0x0000000B : PRSCH11

PRS Channel 11 selected.

End of enumeration elements list.


STATUS

Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURSTABLE APORTCONFLICT

CURSTABLE : IDAC Output Current Stable
bits : 0 - 0 (1 bit)
access : read-only

APORTCONFLICT : APORT Conflict Output
bits : 1 - 1 (1 bit)
access : read-only


IF

Interrupt Flag Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IF IF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURSTABLE APORTCONFLICT

CURSTABLE : Edge Triggered Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only

APORTCONFLICT : APORT Conflict Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-only


IFS

Interrupt Flag Set Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFS IFS write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURSTABLE APORTCONFLICT

CURSTABLE : Set CURSTABLE Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

APORTCONFLICT : Set APORTCONFLICT Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only


IFC

Interrupt Flag Clear Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFC IFC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURSTABLE APORTCONFLICT

CURSTABLE : Clear CURSTABLE Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only

APORTCONFLICT : Clear APORTCONFLICT Interrupt Flag
bits : 1 - 1 (1 bit)
access : write-only


IEN

Interrupt Enable Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURSTABLE APORTCONFLICT

CURSTABLE : CURSTABLE Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

APORTCONFLICT : APORTCONFLICT Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write


APORTREQ

APORT Request Status Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

APORTREQ APORTREQ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 APORT1XREQ APORT1YREQ

APORT1XREQ : 1 If the APORT Bus Connected to APORT1X is Requested
bits : 2 - 2 (1 bit)
access : read-only

APORT1YREQ : 1 If the Bus Connected to APORT1Y is Requested
bits : 3 - 3 (1 bit)
access : read-only


APORTCONFLICT

APORT Request Status Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

APORTCONFLICT APORTCONFLICT read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 APORT1XCONFLICT APORT1YCONFLICT

APORT1XCONFLICT : 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral
bits : 2 - 2 (1 bit)
access : read-only

APORT1YCONFLICT : 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral
bits : 3 - 3 (1 bit)
access : read-only


CURPROG

Current Programming Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CURPROG CURPROG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RANGESEL STEPSEL TUNING

RANGESEL : Current Range Select
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : RANGE0

Current range set to 0 - 1.6 uA.

0x00000001 : RANGE1

Current range set to 1.6 - 4.7 uA.

0x00000002 : RANGE2

Current range set to 0.5 - 16 uA.

0x00000003 : RANGE3

Current range set to 2 - 64 uA.

End of enumeration elements list.

STEPSEL : Current Step Size Select
bits : 8 - 12 (5 bit)
access : read-write

TUNING : Tune the Current to Given Accuracy
bits : 16 - 23 (8 bit)
access : read-write


DUTYCONFIG

Duty Cycle Configuration Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DUTYCONFIG DUTYCONFIG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EM2DUTYCYCLEDIS

EM2DUTYCYCLEDIS : Duty Cycle Enable
bits : 1 - 1 (1 bit)
access : read-write



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