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SMU

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IFS

IFC

IEN

PPUCTRL

PPUPATD0

PPUPATD1

PPUFS

IF


IFS

Interrupt Flag Set Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFS IFS write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV

PPUPRIV : Set PPUPRIV Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only


IFC

Interrupt Flag Clear Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFC IFC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV

PPUPRIV : Clear PPUPRIV Interrupt Flag
bits : 0 - 0 (1 bit)
access : write-only


IEN

Interrupt Enable Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV

PPUPRIV : PPUPRIV Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write


PPUCTRL

PPU Control Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUCTRL PPUCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE

ENABLE :
bits : 0 - 0 (1 bit)
access : read-write


PPUPATD0

PPU Privilege Access Type Descriptor 0
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUPATD0 PPUPATD0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMP0 ACMP1 ADC0 CMU CRYOTIMER CRYPTO0 VDAC0 PRS EMU FPUEH GPCRC GPIO I2C0 IDAC0 MSC LDMA LESENSE LETIMER0 LEUART0 PCNT0 PRORTC RMU RTCC SMU

ACMP0 : Analog Comparator 0 access control bit
bits : 0 - 0 (1 bit)
access : read-write

ACMP1 : Analog Comparator 1 access control bit
bits : 1 - 1 (1 bit)
access : read-write

ADC0 : Analog to Digital Converter 0 access control bit
bits : 2 - 2 (1 bit)
access : read-write

CMU : Clock Management Unit access control bit
bits : 5 - 5 (1 bit)
access : read-write

CRYOTIMER : CRYOTIMER access control bit
bits : 7 - 7 (1 bit)
access : read-write

CRYPTO0 : Advanced Encryption Standard Accelerator 0 access control bit
bits : 8 - 8 (1 bit)
access : read-write

VDAC0 : Digital to Analog Converter 0 access control bit
bits : 9 - 9 (1 bit)
access : read-write

PRS : Peripheral Reflex System access control bit
bits : 10 - 10 (1 bit)
access : read-write

EMU : Energy Management Unit access control bit
bits : 11 - 11 (1 bit)
access : read-write

FPUEH : FPU Exception Handler access control bit
bits : 12 - 12 (1 bit)
access : read-write

GPCRC : General Purpose CRC access control bit
bits : 14 - 14 (1 bit)
access : read-write

GPIO : General purpose Input/Output access control bit
bits : 15 - 15 (1 bit)
access : read-write

I2C0 : I2C 0 access control bit
bits : 16 - 16 (1 bit)
access : read-write

IDAC0 : Current Digital to Analog Converter 0 access control bit
bits : 17 - 17 (1 bit)
access : read-write

MSC : Memory System Controller access control bit
bits : 18 - 18 (1 bit)
access : read-write

LDMA : Linked Direct Memory Access Controller access control bit
bits : 19 - 19 (1 bit)
access : read-write

LESENSE : Low Energy Sensor Interface access control bit
bits : 20 - 20 (1 bit)
access : read-write

LETIMER0 : Low Energy Timer 0 access control bit
bits : 21 - 21 (1 bit)
access : read-write

LEUART0 : Low Energy UART 0 access control bit
bits : 22 - 22 (1 bit)
access : read-write

PCNT0 : Pulse Counter 0 access control bit
bits : 24 - 24 (1 bit)
access : read-write

PRORTC : Protocol Real-Time Counter access control bit
bits : 25 - 25 (1 bit)
access : read-write

RMU : Reset Management Unit access control bit
bits : 29 - 29 (1 bit)
access : read-write

RTCC : Real-Time Counter and Calendar access control bit
bits : 30 - 30 (1 bit)
access : read-write

SMU : Security Management Unit access control bit
bits : 31 - 31 (1 bit)
access : read-write


PPUPATD1

PPU Privilege Access Type Descriptor 1
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PPUPATD1 PPUPATD1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TIMER0 TIMER1 TRNG0 USART0 USART1 WDOG0 WDOG1 WTIMER0

TIMER0 : Timer 0 access control bit
bits : 1 - 1 (1 bit)
access : read-write

TIMER1 : Timer 1 access control bit
bits : 2 - 2 (1 bit)
access : read-write

TRNG0 : True Random Number Generator 0 access control bit
bits : 3 - 3 (1 bit)
access : read-write

USART0 : Universal Synchronous/Asynchronous Receiver/Transmitter 0 access control bit
bits : 4 - 4 (1 bit)
access : read-write

USART1 : Universal Synchronous/Asynchronous Receiver/Transmitter 1 access control bit
bits : 5 - 5 (1 bit)
access : read-write

WDOG0 : Watchdog 0 access control bit
bits : 6 - 6 (1 bit)
access : read-write

WDOG1 : Watchdog 1 access control bit
bits : 7 - 7 (1 bit)
access : read-write

WTIMER0 : Wide Timer 0 access control bit
bits : 8 - 8 (1 bit)
access : read-write


PPUFS

PPU Fault Status
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PPUFS PPUFS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PERIPHID

PERIPHID :
bits : 0 - 6 (7 bit)
access : read-only

Enumeration:

0x00000000 : ACMP0

Analog Comparator 0

0x00000001 : ACMP1

Analog Comparator 1

0x00000002 : ADC0

Analog to Digital Converter 0

0x00000005 : CMU

Clock Management Unit

0x00000007 : CRYOTIMER

CRYOTIMER

0x00000008 : CRYPTO0

Advanced Encryption Standard Accelerator 0

0x00000009 : VDAC0

Digital to Analog Converter 0

0x0000000A : PRS

Peripheral Reflex System

0x0000000B : EMU

Energy Management Unit

0x0000000C : FPUEH

FPU Exception Handler

0x0000000E : GPCRC

General Purpose CRC

0x0000000F : GPIO

General purpose Input/Output

0x00000010 : I2C0

I2C 0

0x00000011 : IDAC0

Current Digital to Analog Converter 0

0x00000012 : MSC

Memory System Controller

0x00000013 : LDMA

Linked Direct Memory Access Controller

0x00000014 : LESENSE

Low Energy Sensor Interface

0x00000015 : LETIMER0

Low Energy Timer 0

0x00000016 : LEUART0

Low Energy UART 0

0x00000018 : PCNT0

Pulse Counter 0

0x0000001D : RMU

Reset Management Unit

0x0000001E : RTCC

Real-Time Counter and Calendar

0x0000001F : SMU

Security Management Unit

0x00000021 : TIMER0

Timer 0

0x00000022 : TIMER1

Timer 1

0x00000023 : TRNG0

True Random Number Generator 0

0x00000024 : USART0

Universal Synchronous/Asynchronous Receiver/Transmitter 0

0x00000025 : USART1

Universal Synchronous/Asynchronous Receiver/Transmitter 1

0x00000026 : WDOG0

Watchdog 0

0x00000027 : WDOG1

Watchdog 1

0x00000028 : WTIMER0

Wide Timer 0

0x00000019 : PRORTC

Protocol Real-Time Counter

End of enumeration elements list.


IF

Interrupt Flag Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IF IF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PPUPRIV

PPUPRIV : PPU Privilege Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-only



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