Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected
No Description
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPVERSION : IP Version
bits : 0 - 31 (32 bit)
access : read-only
No Description
address_offset : 0x14 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
LOCK : WDOG Configuration Lock Status
bits : 31 - 31 (1 bit)
access : read-only
Enumeration:
0 : UNLOCKED
All WDOG lockable registers are unlocked.
1 : LOCKED
All WDOG lockable registers are locked.
End of enumeration elements list.
No Description
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOUT : WDOG Timeout Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write
WARN : WDOG Warning Timeout Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write
WIN : WDOG Window Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write
PEM0 : PRS Src0 Event Missing Interrupt Flag
bits : 3 - 3 (1 bit)
access : read-write
PEM1 : PRS Src1 Event Missing Interrupt Flag
bits : 4 - 4 (1 bit)
access : read-write
No Description
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TOUT : WDOG Timeout Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write
WARN : WDOG Warning Timeout Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write
WIN : WDOG Window Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write
PEM0 : PRS Src0 Event Missing Interrupt Enable
bits : 3 - 3 (1 bit)
access : read-write
PEM1 : PRS Src1 Event Missing Interrupt Enable
bits : 4 - 4 (1 bit)
access : read-write
No Description
address_offset : 0x20 Bytes (0x0)
size : -1 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
LOCKKEY : WDOG Configuration Lock
bits : 0 - 15 (16 bit)
access : write-only
Enumeration:
0 : LOCK
Lock WDOG lockable registers
44008 : UNLOCK
Unlock WDOG lockable registers
End of enumeration elements list.
No Description
address_offset : 0x24 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0
CMD : Sync Busy for Cmd Register
bits : 0 - 0 (1 bit)
access : read-only
No Description
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EN : Module Enable
bits : 0 - 0 (1 bit)
access : read-write
No Description
address_offset : 0x8 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLRSRC : WDOG Clear Source
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : SW
A write to the clear bit will clear the WDOG counter
1 : PRSSRC0
A rising edge on the PRS Source 0 will clear the WDOG counter
End of enumeration elements list.
EM2RUN : EM2 Run
bits : 1 - 1 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
WDOG timer is frozen in EM2.
1 : ENABLE
WDOG timer is running in EM2.
End of enumeration elements list.
EM3RUN : EM3 Run
bits : 2 - 2 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
WDOG timer is frozen in EM3.
1 : ENABLE
WDOG timer is running in EM3.
End of enumeration elements list.
EM4BLOCK : EM4 Block
bits : 3 - 3 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
EM4 can be entered by software. See EMU for detailed description.
1 : ENABLE
EM4 cannot be entered by software.
End of enumeration elements list.
DEBUGRUN : Debug Mode Run
bits : 4 - 4 (1 bit)
access : read-write
Enumeration:
0 : DISABLE
WDOG timer is frozen in debug mode
1 : ENABLE
WDOG timer is running in debug mode
End of enumeration elements list.
WDOGRSTDIS : WDOG Reset Disable
bits : 8 - 8 (1 bit)
access : read-write
Enumeration:
0 : EN
A timeout will cause a WDOG reset
1 : DIS
A timeout will not cause a WDOG reset
End of enumeration elements list.
PRS0MISSRSTEN : PRS Src0 Missing Event WDOG Reset
bits : 9 - 9 (1 bit)
access : read-write
PRS1MISSRSTEN : PRS Src1 Missing Event WDOG Reset
bits : 10 - 10 (1 bit)
access : read-write
PERSEL : WDOG Timeout Period Select
bits : 16 - 19 (4 bit)
access : read-write
Enumeration:
0 : SEL0
Timeout period of 9 wdog cycles
1 : SEL1
Timeout period of 17 wdog cycles
2 : SEL2
Timeout period of 33 wdog cycles
3 : SEL3
Timeout period of 65 wdog cycles
4 : SEL4
Timeout period of 129 wdog cycles
5 : SEL5
Timeout period of 257 wdog cycles
6 : SEL6
Timeout period of 513 wdog cycles
7 : SEL7
Timeout period of 1k wdog cycles
8 : SEL8
Timeout period of 2k wdog cycles
9 : SEL9
Timeout period of 4k wdog cycles
10 : SEL10
Timeout period of 8k wdog cycles
11 : SEL11
Timeout period of 16k wdog cycles
12 : SEL12
Timeout period of 32k wdog cycles
13 : SEL13
Timeout period of 64k wdog cycles
14 : SEL14
Timeout period of 128k wdog cycles
15 : SEL15
Timeout period of 256k wdog cycles
End of enumeration elements list.
WARNSEL : WDOG Warning Period Select
bits : 24 - 25 (2 bit)
access : read-write
Enumeration:
0 : DIS
Disable
1 : SEL1
Warning timeout is 25% of the Timeout.
2 : SEL2
Warning timeout is 50% of the Timeout.
3 : SEL3
Warning timeout is 75% of the Timeout.
End of enumeration elements list.
WINSEL : WDOG Illegal Window Select
bits : 28 - 30 (3 bit)
access : read-write
Enumeration:
0 : DIS
Disabled.
1 : SEL1
Window timeout is 12.5% of the Timeout.
2 : SEL2
Window timeout is 25% of the Timeout.
3 : SEL3
Window timeout is 37.5% of the Timeout.
4 : SEL4
Window timeout is 50% of the Timeout.
5 : SEL5
Window timeout is 62.5% of the Timeout.
6 : SEL6
Window timeout is 75.5% of the Timeout.
7 : SEL7
Window timeout is 87.5% of the Timeout.
End of enumeration elements list.
No Description
address_offset : 0xC Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0
CLEAR : WDOG Timer Clear
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : UNCHANGED
WDOG timer is unchanged.
1 : CLEARED
WDOG timer is cleared to 0.
End of enumeration elements list.
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