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ICACHE0_NS

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

IPVERSION

PCAHITS

STATUS

CMD

LPMODE

IF

IEN

CTRL

PCHITS

PCMISSES


IPVERSION

The read only IPVERSION field gives the version for this module. There may be minor software changes required for modules with different values of IPVERSION.
address_offset : 0x0 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IPVERSION IPVERSION read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IPVERSION

IPVERSION : IP version ID
bits : 0 - 31 (32 bit)
access : read-only


PCAHITS

No Description
address_offset : 0x10 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PCAHITS PCAHITS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCAHITS

PCAHITS : Performance Counter Advanced Hits
bits : 0 - 31 (32 bit)
access : read-only


STATUS

No Description
address_offset : 0x14 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCRUNNING

PCRUNNING : PC Running
bits : 0 - 0 (1 bit)
access : read-only


CMD

No Description
address_offset : 0x18 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 FLUSH STARTPC STOPPC

FLUSH : Flush
bits : 0 - 0 (1 bit)
access : write-only

STARTPC : Start Performance Counters
bits : 1 - 1 (1 bit)
access : write-only

STOPPC : Stop Performance Counters
bits : 2 - 2 (1 bit)
access : write-only


LPMODE

No Description
address_offset : 0x1C Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPMODE LPMODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LPLEVEL NESTFACTOR

LPLEVEL : Low Power Level
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : BASIC

Base instruction cache functionality

1 : ADVANCED

Advanced buffering mode, where the cache uses the fetch pattern to predict highly accessed data and store it in low-energy memory

3 : MINACTIVITY

Minimum activity mode, which allows the cache to minimize activity in logic that it predicts has a low probability being used. This mode can introduce wait-states into the instruction fetch stream when the cache exits one of its low-activity states. The number of wait-states introduced is small, but users running with 0-wait-state memory and wishing to reduce the variability that the cache might introduce with additional wait-states may wish to lower the cache low-power level. Note, this mode includes the advanced buffering mode functionality.

End of enumeration elements list.

NESTFACTOR : Low Power Nest Factor
bits : 4 - 7 (4 bit)
access : read-write


IF

No Description
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IF IF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HITOF MISSOF AHITOF RAMERROR

HITOF : Hit Overflow Interrupt Flag
bits : 0 - 0 (1 bit)
access : read-write

MISSOF : Miss Overflow Interrupt Flag
bits : 1 - 1 (1 bit)
access : read-write

AHITOF : Advanced Hit Overflow Interrupt Flag
bits : 2 - 2 (1 bit)
access : read-write

RAMERROR : RAM error Interrupt Flag
bits : 8 - 8 (1 bit)
access : read-write


IEN

No Description
address_offset : 0x24 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HITOF MISSOF AHITOF RAMERRORIEN RAMERROR

HITOF : Hit Overflow Interrupt Enable
bits : 0 - 0 (1 bit)
access : read-write

MISSOF : Miss Overflow Interrupt Enable
bits : 1 - 1 (1 bit)
access : read-write

AHITOF : Advanced Hit Overflow Interrupt Enable
bits : 2 - 2 (1 bit)
access : read-write

RAMERRORIEN : RAM error Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write

RAMERROR : RAM error Interrupt Enable
bits : 8 - 8 (1 bit)
access : read-write


CTRL

No Description
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CACHEDIS USEMPU AUTOFLUSHDIS

CACHEDIS : Cache Disable
bits : 0 - 0 (1 bit)
access : read-write

USEMPU : Use MPU
bits : 1 - 1 (1 bit)
access : read-write

AUTOFLUSHDIS : Automatic Flushing Disable
bits : 2 - 2 (1 bit)
access : read-write


PCHITS

No Description
address_offset : 0x8 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PCHITS PCHITS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCHITS

PCHITS : Performance Counter Hits
bits : 0 - 31 (32 bit)
access : read-only


PCMISSES

No Description
address_offset : 0xC Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PCMISSES PCMISSES read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PCMISSES

PCMISSES : Performance Counter Misses
bits : 0 - 31 (32 bit)
access : read-only



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