IDAC0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

CURPROG

CAL

DUTYCONFIG


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EN CURSINK MINOUTTRANS OUTEN OUTMODE OUTENPRS PRSSEL

EN : Current DAC Enable
bits : 0 - 0
access : read-write

CURSINK : Current Sink Enable
bits : 1 - 1
access : read-write

MINOUTTRANS : Minimum Output Transition Enable
bits : 2 - 2
access : read-write

OUTEN : Output Enable
bits : 3 - 3
access : read-write

OUTMODE : Output Modes
bits : 4 - 4
access : read-write

OUTENPRS : PRS Controlled Output Enable
bits : 18 - 18
access : read-write

PRSSEL : IDAC Output PRS channnel Select
bits : 20 - 22
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected.

0x00000001 : PRSCH1

PRS Channel 1 selected.

0x00000002 : PRSCH2

PRS Channel 2 selected.

0x00000003 : PRSCH3

PRS Channel 3 selected.

0x00000004 : PRSCH4

PRS Channel 4 selected.

0x00000005 : PRSCH5

PRS Channel 5 selected.

End of enumeration elements list.


CURPROG

Current Programming Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RANGESEL STEPSEL

RANGESEL : Current Range Select
bits : 0 - 1
access : read-write

Enumeration:

0x00000000 : RANGE0

Current range set to 0 - 1.6 uA.

0x00000001 : RANGE1

Current range set to 1.6 - 4.7 uA.

0x00000002 : RANGE2

Current range set to 0.5 - 16 uA.

0x00000003 : RANGE3

Current range set to 2 - 64 uA.

End of enumeration elements list.

STEPSEL : Current Step Size Select
bits : 8 - 12
access : read-write


CAL

Calibration Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TUNING

TUNING : Tune the current to given accuracy
bits : 0 - 6
access : read-write


DUTYCONFIG

Duty Cycle Configauration Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DUTYCYCLEEN EM2DUTYCYCLEDIS

DUTYCYCLEEN : Duty Cycle Enable.
bits : 0 - 0
access : read-write

EM2DUTYCYCLEDIS : EM2/EM3 Duty Cycle Disable.
bits : 1 - 1
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.