ADC0

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

SCANCTRL

IEN

IF

IFS

IFC

SINGLEDATA

SCANDATA

SINGLEDATAP

SCANDATAP

CAL

BIASPROG

CMD

STATUS

SINGLECTRL


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WARMUPMODE TAILGATE LPFMODE PRESC TIMEBASE OVSRSEL CHCONIDLE

WARMUPMODE : Warm-up Mode
bits : 0 - 1
access : read-write

Enumeration:

0x00000000 : NORMAL

ADC is shut down after each conversion

0x00000001 : FASTBG

Bandgap references do not need warm up, but have reduced accuracy.

0x00000002 : KEEPSCANREFWARM

Reference selected for scan mode is kept warm.

0x00000003 : KEEPADCWARM

ADC is kept warmed up and scan reference is kept warm

End of enumeration elements list.

TAILGATE : Conversion Tailgating
bits : 3 - 3
access : read-write

LPFMODE : Low Pass Filter Mode
bits : 4 - 5
access : read-write

Enumeration:

0x00000000 : BYPASS

No filter or decoupling capacitor

0x00000001 : DECAP

On chip decoupling capacitor selected

0x00000002 : RCFILT

On chip RC filter selected

End of enumeration elements list.

PRESC : Prescaler Setting
bits : 8 - 14
access : read-write

Enumeration:

0x00000000 : NODIVISION

None

End of enumeration elements list.

TIMEBASE : Time Base
bits : 16 - 22
access : read-write

OVSRSEL : Oversample Rate Select
bits : 24 - 27
access : read-write

Enumeration:

0x00000000 : X2

2 samples for each conversion result

0x00000001 : X4

4 samples for each conversion result

0x00000002 : X8

8 samples for each conversion result

0x00000003 : X16

16 samples for each conversion result

0x00000004 : X32

32 samples for each conversion result

0x00000005 : X64

64 samples for each conversion result

0x00000006 : X128

128 samples for each conversion result

0x00000007 : X256

256 samples for each conversion result

0x00000008 : X512

512 samples for each conversion result

0x00000009 : X1024

1024 samples for each conversion result

0x0000000A : X2048

2048 samples for each conversion result

0x0000000B : X4096

4096 samples for each conversion result

End of enumeration elements list.

CHCONIDLE : Input channel connected when ADC is IDLE
bits : 28 - 28
access : read-write


SCANCTRL

Scan Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REP DIFF ADJ RES INPUTMASK REF AT PRSEN PRSSEL

REP : Scan Sequence Repetitive Mode
bits : 0 - 0
access : read-write

DIFF : Scan Sequence Differential Mode
bits : 1 - 1
access : read-write

ADJ : Scan Sequence Result Adjustment
bits : 2 - 2
access : read-write

RES : Scan Sequence Resolution Select
bits : 4 - 5
access : read-write

Enumeration:

0x00000000 : 12BIT

12-bit resolution

0x00000001 : 8BIT

8-bit resolution

0x00000002 : 6BIT

6-bit resolution

0x00000003 : OVS

Oversampling enabled. Oversampling rate is set in OVSRSEL

End of enumeration elements list.

INPUTMASK : Scan Sequence Input Mask
bits : 8 - 15
access : read-write

REF : Scan Sequence Reference Selection
bits : 16 - 18
access : read-write

Enumeration:

0x00000000 : 1V25

Internal 1.25 V reference

0x00000001 : 2V5

Internal 2.5 V reference

0x00000002 : VDD

VDD

0x00000003 : 5VDIFF

Internal differential 5 V reference

0x00000004 : EXTSINGLE

Single ended external reference from ADCn_CH6

0x00000005 : 2XEXTDIFF

Differential external reference, 2x(ADCn_CH6 - ADCn_CH7)

0x00000006 : 2XVDD

Unbuffered 2xVDD

End of enumeration elements list.

AT : Scan Sample Acquisition Time
bits : 20 - 23
access : read-write

Enumeration:

0x00000000 : 1CYCLE

1 ADC_CLK cycle acquisition time for scan samples

0x00000001 : 2CYCLES

2 ADC_CLK cycles acquisition time for scan samples

0x00000002 : 4CYCLES

4 ADC_CLK cycles acquisition time for scan samples

0x00000003 : 8CYCLES

8 ADC_CLK cycles acquisition time for scan samples

0x00000004 : 16CYCLES

16 ADC_CLK cycles acquisition time for scan samples

0x00000005 : 32CYCLES

32 ADC_CLK cycles acquisition time for scan samples

0x00000006 : 64CYCLES

64 ADC_CLK cycles acquisition time for scan samples

0x00000007 : 128CYCLES

128 ADC_CLK cycles acquisition time for scan samples

0x00000008 : 256CYCLES

256 ADC_CLK cycles acquisition time for scan samples

End of enumeration elements list.

PRSEN : Scan Sequence PRS Trigger Enable
bits : 24 - 24
access : read-write

PRSSEL : Scan Sequence PRS Trigger Select
bits : 28 - 30
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS ch 0 triggers scan sequence

0x00000001 : PRSCH1

PRS ch 1 triggers scan sequence

0x00000002 : PRSCH2

PRS ch 2 triggers scan sequence

0x00000003 : PRSCH3

PRS ch 3 triggers scan sequence

0x00000004 : PRSCH4

PRS ch 4 triggers scan sequence

0x00000005 : PRSCH5

PRS ch 5 triggers scan sequence

End of enumeration elements list.


IEN

Interrupt Enable Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLE SCAN SINGLEOF SCANOF

SINGLE : Single Conversion Complete Interrupt Enable
bits : 0 - 0
access : read-write

SCAN : Scan Conversion Complete Interrupt Enable
bits : 1 - 1
access : read-write

SINGLEOF : Single Result Overflow Interrupt Enable
bits : 8 - 8
access : read-write

SCANOF : Scan Result Overflow Interrupt Enable
bits : 9 - 9
access : read-write


IF

Interrupt Flag Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLE SCAN SINGLEOF SCANOF

SINGLE : Single Conversion Complete Interrupt Flag
bits : 0 - 0
access : read-only

SCAN : Scan Conversion Complete Interrupt Flag
bits : 1 - 1
access : read-only

SINGLEOF : Single Result Overflow Interrupt Flag
bits : 8 - 8
access : read-only

SCANOF : Scan Result Overflow Interrupt Flag
bits : 9 - 9
access : read-only


IFS

Interrupt Flag Set Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLE SCAN SINGLEOF SCANOF

SINGLE : Single Conversion Complete Interrupt Flag Set
bits : 0 - 0
access : write-only

SCAN : Scan Conversion Complete Interrupt Flag Set
bits : 1 - 1
access : write-only

SINGLEOF : Single Result Overflow Interrupt Flag Set
bits : 8 - 8
access : write-only

SCANOF : Scan Result Overflow Interrupt Flag Set
bits : 9 - 9
access : write-only


IFC

Interrupt Flag Clear Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLE SCAN SINGLEOF SCANOF

SINGLE : Single Conversion Complete Interrupt Flag Clear
bits : 0 - 0
access : write-only

SCAN : Scan Conversion Complete Interrupt Flag Clear
bits : 1 - 1
access : write-only

SINGLEOF : Single Result Overflow Interrupt Flag Clear
bits : 8 - 8
access : write-only

SCANOF : Scan Result Overflow Interrupt Flag Clear
bits : 9 - 9
access : write-only


SINGLEDATA

Single Conversion Result Data
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Single Conversion Result Data
bits : 0 - 31
access : read-only


SCANDATA

Scan Conversion Result Data
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan Conversion Result Data
bits : 0 - 31
access : read-only


SINGLEDATAP

Single Conversion Result Data Peek Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAP

DATAP : Single Conversion Result Data Peek
bits : 0 - 31
access : read-only


SCANDATAP

Scan Sequence Result Data Peek Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATAP

DATAP : Scan Conversion Result Data Peek
bits : 0 - 31
access : read-only


CAL

Calibration Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLEOFFSET SINGLEGAIN SCANOFFSET SCANGAIN

SINGLEOFFSET : Single Mode Offset Calibration Value
bits : 0 - 6
access : read-write

SINGLEGAIN : Single Mode Gain Calibration Value
bits : 8 - 14
access : read-write

SCANOFFSET : Scan Mode Offset Calibration Value
bits : 16 - 22
access : read-write

SCANGAIN : Scan Mode Gain Calibration Value
bits : 24 - 30
access : read-write


BIASPROG

Bias Programming Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BIASPROG HALFBIAS COMPBIAS

BIASPROG : Bias Programming Value
bits : 0 - 3
access : read-write

HALFBIAS : Half Bias Current
bits : 6 - 6
access : read-write

COMPBIAS : Comparator Bias Value
bits : 8 - 11
access : read-write


CMD

Command Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLESTART SINGLESTOP SCANSTART SCANSTOP

SINGLESTART : Single Conversion Start
bits : 0 - 0
access : write-only

SINGLESTOP : Single Conversion Stop
bits : 1 - 1
access : write-only

SCANSTART : Scan Sequence Start
bits : 2 - 2
access : write-only

SCANSTOP : Scan Sequence Stop
bits : 3 - 3
access : write-only


STATUS

Status Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SINGLEACT SCANACT SINGLEREFWARM SCANREFWARM WARM SINGLEDV SCANDV SCANDATASRC

SINGLEACT : Single Conversion Active
bits : 0 - 0
access : read-only

SCANACT : Scan Conversion Active
bits : 1 - 1
access : read-only

SINGLEREFWARM : Single Reference Warmed Up
bits : 8 - 8
access : read-only

SCANREFWARM : Scan Reference Warmed Up
bits : 9 - 9
access : read-only

WARM : ADC Warmed Up
bits : 12 - 12
access : read-only

SINGLEDV : Single Sample Data Valid
bits : 16 - 16
access : read-only

SCANDV : Scan Data Valid
bits : 17 - 17
access : read-only

SCANDATASRC : Scan Data Source
bits : 24 - 26
access : read-only

Enumeration:

0x00000000 : CH0

Single ended mode: SCANDATA result originates from ADCn_CH0. Differential mode: SCANDATA result originates from ADCn_CH0-ADCn_CH1

0x00000001 : CH1

Single ended mode: SCANDATA result originates from ADCn_CH1. Differential mode: SCANDATA result originates from ADCn_CH2_ADCn_CH3

0x00000002 : CH2

Single ended mode: SCANDATA result originates from ADCn_CH2. Differential mode: SCANDATA result originates from ADCn_CH4-ADCn_CH5

0x00000003 : CH3

Single ended mode: SCANDATA result originates from ADCn_CH3. Differential mode: SCANDATA result originates from ADCn_CH6-ADCn_CH7

0x00000004 : CH4

SCANDATA result originates from ADCn_CH4

0x00000005 : CH5

SCANDATA result originates from ADCn_CH5

0x00000006 : CH6

SCANDATA result originates from ADCn_CH6

0x00000007 : CH7

SCANDATA result originates from ADCn_CH7

End of enumeration elements list.


SINGLECTRL

Single Sample Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REP DIFF ADJ RES INPUTSEL REF AT PRSEN PRSSEL

REP : Single Sample Repetitive Mode
bits : 0 - 0
access : read-write

DIFF : Single Sample Differential Mode
bits : 1 - 1
access : read-write

ADJ : Single Sample Result Adjustment
bits : 2 - 2
access : read-write

RES : Single Sample Resolution Select
bits : 4 - 5
access : read-write

Enumeration:

0x00000000 : 12BIT

12-bit resolution

0x00000001 : 8BIT

8-bit resolution

0x00000002 : 6BIT

6-bit resolution

0x00000003 : OVS

Oversampling enabled. Oversampling rate is set in OVSRSEL

End of enumeration elements list.

INPUTSEL : Single Sample Input Selection
bits : 8 - 11
access : read-write

REF : Single Sample Reference Selection
bits : 16 - 18
access : read-write

Enumeration:

0x00000000 : 1V25

Internal 1.25 V reference

0x00000001 : 2V5

Internal 2.5 V reference

0x00000002 : VDD

Buffered VDD

0x00000003 : 5VDIFF

Internal differential 5 V reference

0x00000004 : EXTSINGLE

Single ended external reference from ADCn_CH6

0x00000005 : 2XEXTDIFF

Differential external reference, 2x(ADCn_CH6 - ADCn_CH7)

0x00000006 : 2XVDD

Unbuffered 2xVDD

End of enumeration elements list.

AT : Single Sample Acquisition Time
bits : 20 - 23
access : read-write

Enumeration:

0x00000000 : 1CYCLE

1 ADC_CLK cycle acquisition time for single sample

0x00000001 : 2CYCLES

2 ADC_CLK cycles acquisition time for single sample

0x00000002 : 4CYCLES

4 ADC_CLK cycles acquisition time for single sample

0x00000003 : 8CYCLES

8 ADC_CLK cycles acquisition time for single sample

0x00000004 : 16CYCLES

16 ADC_CLK cycles acquisition time for single sample

0x00000005 : 32CYCLES

32 ADC_CLK cycles acquisition time for single sample

0x00000006 : 64CYCLES

64 ADC_CLK cycles acquisition time for single sample

0x00000007 : 128CYCLES

128 ADC_CLK cycles acquisition time for single sample

0x00000008 : 256CYCLES

256 ADC_CLK cycles acquisition time for single sample

End of enumeration elements list.

PRSEN : Single Sample PRS Trigger Enable
bits : 24 - 24
access : read-write

PRSSEL : Single Sample PRS Trigger Select
bits : 28 - 30
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS ch 0 triggers single sample

0x00000001 : PRSCH1

PRS ch 1 triggers single sample

0x00000002 : PRSCH2

PRS ch 2 triggers single sample

0x00000003 : PRSCH3

PRS ch 3 triggers single sample

0x00000004 : PRSCH4

PRS ch 4 triggers single sample

0x00000005 : PRSCH5

PRS ch 5 triggers single sample

End of enumeration elements list.



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