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LESENSE

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CTRL

BIASCTRL

CMD

CHEN

SCANRES

STATUS

ST0_TCONFA

ST0_TCONFB

ST1_TCONFA

ST1_TCONFB

ST2_TCONFA

ST2_TCONFB

ST3_TCONFA

ST3_TCONFB

ST4_TCONFA

ST4_TCONFB

ST5_TCONFA

ST5_TCONFB

ST6_TCONFA

ST6_TCONFB

ST7_TCONFA

ST7_TCONFB

PTR

ST8_TCONFA

ST8_TCONFB

ST9_TCONFA

ST9_TCONFB

ST10_TCONFA

ST10_TCONFB

ST11_TCONFA

ST11_TCONFB

ST12_TCONFA

ST12_TCONFB

ST13_TCONFA

ST13_TCONFB

ST14_TCONFA

ST14_TCONFB

ST15_TCONFA

ST15_TCONFB

BUFDATA

BUF0_DATA

BUF1_DATA

BUF2_DATA

BUF3_DATA

BUF4_DATA

BUF5_DATA

BUF6_DATA

BUF7_DATA

BUF8_DATA

BUF9_DATA

BUF10_DATA

BUF11_DATA

BUF12_DATA

BUF13_DATA

BUF14_DATA

BUF15_DATA

CURCH

CH0_TIMING

CH0_INTERACT

CH0_EVAL

CH1_TIMING

CH1_INTERACT

CH1_EVAL

CH2_TIMING

CH2_INTERACT

CH2_EVAL

CH3_TIMING

CH3_INTERACT

CH3_EVAL

DECSTATE

CH4_TIMING

CH4_INTERACT

CH4_EVAL

CH5_TIMING

CH5_INTERACT

CH5_EVAL

CH6_TIMING

CH6_INTERACT

CH6_EVAL

CH7_TIMING

CH7_INTERACT

CH7_EVAL

SENSORSTATE

CH8_TIMING

CH8_INTERACT

CH8_EVAL

CH9_TIMING

CH9_INTERACT

CH9_EVAL

CH10_TIMING

CH10_INTERACT

CH10_EVAL

CH11_TIMING

CH11_INTERACT

CH11_EVAL

IDLECONF

CH12_TIMING

CH12_INTERACT

CH12_EVAL

CH13_TIMING

CH13_INTERACT

CH13_EVAL

CH14_TIMING

CH14_INTERACT

CH14_EVAL

CH15_TIMING

CH15_INTERACT

CH15_EVAL

ALTEXCONF

TIMCTRL

IF

IFC

IFS

IEN

SYNCBUSY

ROUTE

POWERDOWN

PERCTRL

DECCTRL


CTRL

Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCANMODE PRSSEL SCANCONF ACMP0INV ACMP1INV ALTEXMAP DUALSAMPLE BUFOW STRSCANRES BUFIDL DMAWU DEBUGRUN

SCANMODE : Configure scan mode
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : PERIODIC

A new scan is started each time the period counter overflows

0x00000001 : ONESHOT

A single scan is performed when START in CMD is set

0x00000002 : PRS

Pulse on PRS channel

End of enumeration elements list.

PRSSEL : Scan start PRS select
bits : 2 - 5 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected as input

0x00000001 : PRSCH1

PRS Channel 1 selected as input

0x00000002 : PRSCH2

PRS Channel 2 selected as input

0x00000003 : PRSCH3

PRS Channel 3 selected as input

0x00000004 : PRSCH4

PRS Channel 4 selected as input

0x00000005 : PRSCH5

PRS Channel 5 selected as input

0x00000006 : PRSCH6

PRS Channel 6 selected as input

0x00000007 : PRSCH7

PRS Channel 7 selected as input

0x00000008 : PRSCH8

PRS Channel 8 selected as input

0x00000009 : PRSCH9

PRS Channel 9 selected as input

0x0000000A : PRSCH10

PRS Channel 10 selected as input

0x0000000B : PRSCH11

PRS Channel 11 selected as input

End of enumeration elements list.

SCANCONF : Select scan configuration
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

0x00000000 : DIRMAP

The channel configuration register registers used are directly mapped to the channel number.

0x00000001 : INVMAP

The channel configuration register registers used are CHX+8_CONF for channels 0-7 and CHX-8_CONF for channels 8-15.

0x00000002 : TOGGLE

The channel configuration register registers used toggles between CHX_CONF and CHX+8_CONF when channel x triggers

0x00000003 : DECDEF

The decoder state defines the CONF registers to be used.

End of enumeration elements list.

ACMP0INV : Invert analog comparator 0 output
bits : 9 - 9 (1 bit)
access : read-write

ACMP1INV : Invert analog comparator 1 output
bits : 10 - 10 (1 bit)
access : read-write

ALTEXMAP : Alternative excitation map
bits : 11 - 11 (1 bit)
access : read-write

DUALSAMPLE : Enable dual sample mode
bits : 13 - 13 (1 bit)
access : read-write

BUFOW : Result buffer overwrite
bits : 16 - 16 (1 bit)
access : read-write

STRSCANRES : Enable storing of SCANRES
bits : 17 - 17 (1 bit)
access : read-write

BUFIDL : Result buffer interrupt and DMA trigger level
bits : 18 - 18 (1 bit)
access : read-write

DMAWU : DMA wake-up from EM2
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

No DMA wake-up from EM2

0x00000001 : BUFDATAV

DMA wake-up from EM2 when data is valid in the result buffer

0x00000002 : BUFLEVEL

DMA wake-up from EM2 when the result buffer is full/half-full depending on BUFIDL configuration

End of enumeration elements list.

DEBUGRUN : Debug Mode Run Enable
bits : 22 - 22 (1 bit)
access : read-write


BIASCTRL

Bias Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BIASCTRL BIASCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BIASMODE

BIASMODE : Select bias mode
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : DUTYCYCLE

Bias module duty cycled between low power and high accuracy mode

0x00000001 : HIGHACC

Bias module always in high accuracy mode

0x00000002 : DONTTOUCH

Bias module not affected by LESENSE

End of enumeration elements list.


CMD

Command Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

CMD CMD write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 START STOP DECODE CLEARBUF

START : Start scanning of sensors.
bits : 0 - 0 (1 bit)
access : write-only

STOP : Stop scanning of sensors
bits : 1 - 1 (1 bit)
access : write-only

DECODE : Start decoder
bits : 2 - 2 (1 bit)
access : write-only

CLEARBUF : Clear result buffer
bits : 3 - 3 (1 bit)
access : write-only


CHEN

Channel enable Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CHEN CHEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CHEN

CHEN : Enable scan channel
bits : 0 - 15 (16 bit)
access : read-write


SCANRES

Scan result register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SCANRES SCANRES read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SCANRES

SCANRES : Scan results
bits : 0 - 15 (16 bit)
access : read-only


STATUS

Status Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFDATAV BUFHALFFULL BUFFULL RUNNING SCANACTIVE DACACTIVE

BUFDATAV : Result data valid
bits : 0 - 0 (1 bit)
access : read-only

BUFHALFFULL : Result buffer half full
bits : 1 - 1 (1 bit)
access : read-only

BUFFULL : Result buffer full
bits : 2 - 2 (1 bit)
access : read-only

RUNNING : LESENSE is active
bits : 3 - 3 (1 bit)
access : read-only

SCANACTIVE : LESENSE is currently interfacing sensors.
bits : 4 - 4 (1 bit)
access : read-only

DACACTIVE : LESENSE DAC interface is active
bits : 5 - 5 (1 bit)
access : read-only


ST0_TCONFA

State transition configuration A
address_offset : 0x200 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST0_TCONFA ST0_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST0_TCONFB

State transition configuration B
address_offset : 0x204 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST0_TCONFB ST0_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST1_TCONFA

State transition configuration A
address_offset : 0x208 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST1_TCONFA ST1_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST1_TCONFB

State transition configuration B
address_offset : 0x20C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST1_TCONFB ST1_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST2_TCONFA

State transition configuration A
address_offset : 0x210 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST2_TCONFA ST2_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST2_TCONFB

State transition configuration B
address_offset : 0x214 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST2_TCONFB ST2_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST3_TCONFA

State transition configuration A
address_offset : 0x218 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST3_TCONFA ST3_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST3_TCONFB

State transition configuration B
address_offset : 0x21C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST3_TCONFB ST3_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST4_TCONFA

State transition configuration A
address_offset : 0x220 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST4_TCONFA ST4_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST4_TCONFB

State transition configuration B
address_offset : 0x224 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST4_TCONFB ST4_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST5_TCONFA

State transition configuration A
address_offset : 0x228 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST5_TCONFA ST5_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST5_TCONFB

State transition configuration B
address_offset : 0x22C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST5_TCONFB ST5_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST6_TCONFA

State transition configuration A
address_offset : 0x230 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST6_TCONFA ST6_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST6_TCONFB

State transition configuration B
address_offset : 0x234 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST6_TCONFB ST6_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST7_TCONFA

State transition configuration A
address_offset : 0x238 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST7_TCONFA ST7_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST7_TCONFB

State transition configuration B
address_offset : 0x23C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST7_TCONFB ST7_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


PTR

Result buffer pointers
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PTR PTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RD WR

RD : Result buffer read pointer.
bits : 0 - 3 (4 bit)
access : read-only

WR : Result buffer write pointer.
bits : 5 - 8 (4 bit)
access : read-only


ST8_TCONFA

State transition configuration A
address_offset : 0x240 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST8_TCONFA ST8_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST8_TCONFB

State transition configuration B
address_offset : 0x244 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST8_TCONFB ST8_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST9_TCONFA

State transition configuration A
address_offset : 0x248 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST9_TCONFA ST9_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST9_TCONFB

State transition configuration B
address_offset : 0x24C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST9_TCONFB ST9_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST10_TCONFA

State transition configuration A
address_offset : 0x250 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST10_TCONFA ST10_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST10_TCONFB

State transition configuration B
address_offset : 0x254 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST10_TCONFB ST10_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST11_TCONFA

State transition configuration A
address_offset : 0x258 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST11_TCONFA ST11_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST11_TCONFB

State transition configuration B
address_offset : 0x25C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST11_TCONFB ST11_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST12_TCONFA

State transition configuration A
address_offset : 0x260 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST12_TCONFA ST12_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST12_TCONFB

State transition configuration B
address_offset : 0x264 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST12_TCONFB ST12_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST13_TCONFA

State transition configuration A
address_offset : 0x268 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST13_TCONFA ST13_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST13_TCONFB

State transition configuration B
address_offset : 0x26C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST13_TCONFB ST13_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST14_TCONFA

State transition configuration A
address_offset : 0x270 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST14_TCONFA ST14_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST14_TCONFB

State transition configuration B
address_offset : 0x274 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST14_TCONFB ST14_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


ST15_TCONFA

State transition configuration A
address_offset : 0x278 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST15_TCONFA ST15_TCONFA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF CHAIN

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag enable
bits : 16 - 16 (1 bit)
access : read-write

CHAIN : Enable state descriptor chaining
bits : 18 - 18 (1 bit)
access : read-write


ST15_TCONFB

State transition configuration B
address_offset : 0x27C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ST15_TCONFB ST15_TCONFB read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMP MASK NEXTSTATE PRSACT SETIF

COMP : Sensor compare value
bits : 0 - 3 (4 bit)
access : read-write

MASK : Sensor mask
bits : 4 - 7 (4 bit)
access : read-write

NEXTSTATE : Next state index
bits : 8 - 11 (4 bit)
access : read-write

PRSACT : Configure transition action
bits : 12 - 14 (3 bit)
access : read-write

SETIF : Set interrupt flag
bits : 16 - 16 (1 bit)
access : read-write


BUFDATA

Result buffer data register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

BUFDATA BUFDATA read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUFDATA

BUFDATA : Result data
bits : 0 - 15 (16 bit)
access : read-only


BUF0_DATA

Scan results
address_offset : 0x280 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF0_DATA BUF0_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF1_DATA

Scan results
address_offset : 0x284 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF1_DATA BUF1_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF2_DATA

Scan results
address_offset : 0x288 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF2_DATA BUF2_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF3_DATA

Scan results
address_offset : 0x28C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF3_DATA BUF3_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF4_DATA

Scan results
address_offset : 0x290 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF4_DATA BUF4_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF5_DATA

Scan results
address_offset : 0x294 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF5_DATA BUF5_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF6_DATA

Scan results
address_offset : 0x298 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF6_DATA BUF6_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF7_DATA

Scan results
address_offset : 0x29C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF7_DATA BUF7_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF8_DATA

Scan results
address_offset : 0x2A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF8_DATA BUF8_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF9_DATA

Scan results
address_offset : 0x2A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF9_DATA BUF9_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF10_DATA

Scan results
address_offset : 0x2A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF10_DATA BUF10_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF11_DATA

Scan results
address_offset : 0x2AC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF11_DATA BUF11_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF12_DATA

Scan results
address_offset : 0x2B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF12_DATA BUF12_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF13_DATA

Scan results
address_offset : 0x2B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF13_DATA BUF13_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF14_DATA

Scan results
address_offset : 0x2B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF14_DATA BUF14_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


BUF15_DATA

Scan results
address_offset : 0x2BC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BUF15_DATA BUF15_DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Scan result buffer
bits : 0 - 15 (16 bit)
access : read-write


CURCH

Current channel index
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CURCH CURCH read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURCH

CURCH : Shows the index of the current channel
bits : 0 - 3 (4 bit)
access : read-only


CH0_TIMING

Scan configuration
address_offset : 0x2C0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_TIMING CH0_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH0_INTERACT

Scan configuration
address_offset : 0x2C4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_INTERACT CH0_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH0_EVAL

Scan configuration
address_offset : 0x2C8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH0_EVAL CH0_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH1_TIMING

Scan configuration
address_offset : 0x2D0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_TIMING CH1_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH1_INTERACT

Scan configuration
address_offset : 0x2D4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_INTERACT CH1_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH1_EVAL

Scan configuration
address_offset : 0x2D8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH1_EVAL CH1_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH2_TIMING

Scan configuration
address_offset : 0x2E0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_TIMING CH2_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH2_INTERACT

Scan configuration
address_offset : 0x2E4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_INTERACT CH2_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH2_EVAL

Scan configuration
address_offset : 0x2E8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH2_EVAL CH2_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH3_TIMING

Scan configuration
address_offset : 0x2F0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_TIMING CH3_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH3_INTERACT

Scan configuration
address_offset : 0x2F4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_INTERACT CH3_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH3_EVAL

Scan configuration
address_offset : 0x2F8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH3_EVAL CH3_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


DECSTATE

Current decoder state
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DECSTATE DECSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DECSTATE

DECSTATE : Shows the current decoder state
bits : 0 - 3 (4 bit)
access : read-write


CH4_TIMING

Scan configuration
address_offset : 0x300 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_TIMING CH4_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH4_INTERACT

Scan configuration
address_offset : 0x304 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_INTERACT CH4_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH4_EVAL

Scan configuration
address_offset : 0x308 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH4_EVAL CH4_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH5_TIMING

Scan configuration
address_offset : 0x310 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_TIMING CH5_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH5_INTERACT

Scan configuration
address_offset : 0x314 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_INTERACT CH5_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH5_EVAL

Scan configuration
address_offset : 0x318 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH5_EVAL CH5_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH6_TIMING

Scan configuration
address_offset : 0x320 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_TIMING CH6_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH6_INTERACT

Scan configuration
address_offset : 0x324 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_INTERACT CH6_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH6_EVAL

Scan configuration
address_offset : 0x328 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH6_EVAL CH6_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH7_TIMING

Scan configuration
address_offset : 0x330 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_TIMING CH7_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH7_INTERACT

Scan configuration
address_offset : 0x334 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_INTERACT CH7_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH7_EVAL

Scan configuration
address_offset : 0x338 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH7_EVAL CH7_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


SENSORSTATE

Decoder input register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SENSORSTATE SENSORSTATE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SENSORSTATE

SENSORSTATE : Shows the status of sensors chosen as input to the decoder
bits : 0 - 3 (4 bit)
access : read-write


CH8_TIMING

Scan configuration
address_offset : 0x340 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_TIMING CH8_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH8_INTERACT

Scan configuration
address_offset : 0x344 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_INTERACT CH8_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH8_EVAL

Scan configuration
address_offset : 0x348 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH8_EVAL CH8_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH9_TIMING

Scan configuration
address_offset : 0x350 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_TIMING CH9_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH9_INTERACT

Scan configuration
address_offset : 0x354 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_INTERACT CH9_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH9_EVAL

Scan configuration
address_offset : 0x358 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH9_EVAL CH9_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH10_TIMING

Scan configuration
address_offset : 0x360 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_TIMING CH10_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH10_INTERACT

Scan configuration
address_offset : 0x364 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_INTERACT CH10_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH10_EVAL

Scan configuration
address_offset : 0x368 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH10_EVAL CH10_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH11_TIMING

Scan configuration
address_offset : 0x370 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_TIMING CH11_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH11_INTERACT

Scan configuration
address_offset : 0x374 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_INTERACT CH11_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH11_EVAL

Scan configuration
address_offset : 0x378 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH11_EVAL CH11_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


IDLECONF

GPIO Idle phase configuration
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IDLECONF IDLECONF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15

CH0 : Channel 0 idle phase configuration
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH0 output is disabled in idle phase

0x00000001 : HIGH

CH0 output is high in idle phase

0x00000002 : LOW

CH0 output is low in idle phase

0x00000003 : DACCH0

CH0 output is connected to DAC CH0 output in idle phase

End of enumeration elements list.

CH1 : Channel 1 idle phase configuration
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH1 output is disabled in idle phase

0x00000001 : HIGH

CH1 output is high in idle phase

0x00000002 : LOW

CH1 output is low in idle phase

0x00000003 : DACCH0

CH1 output is connected to DAC CH0 output in idle phase

End of enumeration elements list.

CH2 : Channel 2 idle phase configuration
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH2 output is disabled in idle phase

0x00000001 : HIGH

CH2 output is high in idle phase

0x00000002 : LOW

CH2 output is low in idle phase

0x00000003 : DACCH0

CH2 output is connected to DAC CH0 output in idle phase

End of enumeration elements list.

CH3 : Channel 3 idle phase configuration
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH3 output is disabled in idle phase

0x00000001 : HIGH

CH3 output is high in idle phase

0x00000002 : LOW

CH3 output is low in idle phase

0x00000003 : DACCH0

CH3 output is connected to DAC CH0 output in idle phase

End of enumeration elements list.

CH4 : Channel 4 idle phase configuration
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH4 output is disabled in idle phase

0x00000001 : HIGH

CH4 output is high in idle phase

0x00000002 : LOW

CH4 output is low in idle phase

End of enumeration elements list.

CH5 : Channel 5 idle phase configuration
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH5 output is disabled in idle phase

0x00000001 : HIGH

CH5 output is high in idle phase

0x00000002 : LOW

CH5 output is low in idle phase

End of enumeration elements list.

CH6 : Channel 6 idle phase configuration
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH6 output is disabled in idle phase

0x00000001 : HIGH

CH6 output is high in idle phase

0x00000002 : LOW

CH6 output is low in idle phase

End of enumeration elements list.

CH7 : Channel 7 idle phase configuration
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH7 output is disabled in idle phase

0x00000001 : HIGH

CH7 output is high in idle phase

0x00000002 : LOW

CH7 output is low in idle phase

End of enumeration elements list.

CH8 : Channel 8 idle phase configuration
bits : 16 - 17 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH8 output is disabled in idle phase

0x00000001 : HIGH

CH8 output is high in idle phase

0x00000002 : LOW

CH8 output is low in idle phase

End of enumeration elements list.

CH9 : Channel 9 idle phase configuration
bits : 18 - 19 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH9 output is disabled in idle phase

0x00000001 : HIGH

CH9 output is high in idle phase

0x00000002 : LOW

CH9 output is low in idle phase

End of enumeration elements list.

CH10 : Channel 10 idle phase configuration
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH10 output is disabled in idle phase

0x00000001 : HIGH

CH10 output is high in idle phase

0x00000002 : LOW

CH10 output is low in idle phase

End of enumeration elements list.

CH11 : Channel 11 idle phase configuration
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH11 output is disabled in idle phase

0x00000001 : HIGH

CH11 output is high in idle phase

0x00000002 : LOW

CH11 output is low in idle phase

End of enumeration elements list.

CH12 : Channel 12 idle phase configuration
bits : 24 - 25 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH12 output is disabled in idle phase

0x00000001 : HIGH

CH12 output is high in idle phase

0x00000002 : LOW

CH12 output is low in idle phase

0x00000003 : DACCH1

CH12 output is connected to DAC CH1 output in idle phase

End of enumeration elements list.

CH13 : Channel 13 idle phase configuration
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH13 output is disabled in idle phase

0x00000001 : HIGH

CH13 output is high in idle phase

0x00000002 : LOW

CH13 output is low in idle phase

0x00000003 : DACCH1

CH13 output is connected to DAC CH1 output in idle phase

End of enumeration elements list.

CH14 : Channel 14 idle phase configuration
bits : 28 - 29 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH14 output is disabled in idle phase

0x00000001 : HIGH

CH14 output is high in idle phase

0x00000002 : LOW

CH14 output is low in idle phase

0x00000003 : DACCH1

CH14 output is connected to DAC CH1 output in idle phase

End of enumeration elements list.

CH15 : Channel 15 idle phase configuration
bits : 30 - 31 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

CH15 output is disabled in idle phase

0x00000001 : HIGH

CH15 output is high in idle phase

0x00000002 : LOW

CH15 output is low in idle phase

0x00000003 : DACCH1

CH15 output is connected to DAC CH1 output in idle phase

End of enumeration elements list.


CH12_TIMING

Scan configuration
address_offset : 0x380 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_TIMING CH12_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH12_INTERACT

Scan configuration
address_offset : 0x384 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_INTERACT CH12_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH12_EVAL

Scan configuration
address_offset : 0x388 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH12_EVAL CH12_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH13_TIMING

Scan configuration
address_offset : 0x390 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_TIMING CH13_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH13_INTERACT

Scan configuration
address_offset : 0x394 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_INTERACT CH13_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH13_EVAL

Scan configuration
address_offset : 0x398 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH13_EVAL CH13_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH14_TIMING

Scan configuration
address_offset : 0x3A0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_TIMING CH14_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH14_INTERACT

Scan configuration
address_offset : 0x3A4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_INTERACT CH14_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH14_EVAL

Scan configuration
address_offset : 0x3A8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH14_EVAL CH14_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


CH15_TIMING

Scan configuration
address_offset : 0x3B0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_TIMING CH15_TIMING read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 EXTIME SAMPLEDLY MEASUREDLY

EXTIME : Set excitation time
bits : 0 - 5 (6 bit)
access : read-write

SAMPLEDLY : Set sample delay
bits : 6 - 12 (7 bit)
access : read-write

MEASUREDLY : Set measure delay
bits : 13 - 19 (7 bit)
access : read-write


CH15_INTERACT

Scan configuration
address_offset : 0x3B4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_INTERACT CH15_INTERACT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACMPTHRES SAMPLE SETIF EXMODE EXCLK SAMPLECLK ALTEX

ACMPTHRES : Set ACMP threshold
bits : 0 - 11 (12 bit)
access : read-write

SAMPLE : Select sample mode
bits : 12 - 12 (1 bit)
access : read-write

SETIF : Enable interrupt generation
bits : 13 - 14 (2 bit)
access : read-write

Enumeration:

0x00000000 : NONE

No interrupt is generated

0x00000001 : LEVEL

Set interrupt flag if the sensor triggers.

0x00000002 : POSEDGE

Set interrupt flag on positive edge on the sensor state

0x00000003 : NEGEDGE

Set interrupt flag on negative edge on the sensor state

End of enumeration elements list.

EXMODE : Set GPIO mode
bits : 15 - 16 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

Disabled

0x00000001 : HIGH

Push Pull, GPIO is driven high

0x00000002 : LOW

Push Pull, GPIO is driven low

0x00000003 : DACOUT

DAC output

End of enumeration elements list.

EXCLK : Select clock used for excitation timing
bits : 17 - 17 (1 bit)
access : read-write

SAMPLECLK : Select clock used for timing of sample delay
bits : 18 - 18 (1 bit)
access : read-write

ALTEX : Use alternative excite pin
bits : 19 - 19 (1 bit)
access : read-write


CH15_EVAL

Scan configuration
address_offset : 0x3B8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CH15_EVAL CH15_EVAL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 COMPTHRES COMP DECODE STRSAMPLE SCANRESINV

COMPTHRES : Decision threshold for counter
bits : 0 - 15 (16 bit)
access : read-write

COMP : Select mode for counter comparison
bits : 16 - 16 (1 bit)
access : read-write

DECODE : Send result to decoder
bits : 17 - 17 (1 bit)
access : read-write

STRSAMPLE : Select if counter result should be stored
bits : 18 - 18 (1 bit)
access : read-write

SCANRESINV : Enable inversion of result
bits : 19 - 19 (1 bit)
access : read-write


ALTEXCONF

Alternative excite pin configuration
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALTEXCONF ALTEXCONF read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IDLECONF0 IDLECONF1 IDLECONF2 IDLECONF3 IDLECONF4 IDLECONF5 IDLECONF6 IDLECONF7 AEX0 AEX1 AEX2 AEX3 AEX4 AEX5 AEX6 AEX7

IDLECONF0 : ALTEX0 idle phase configuration
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX0 output is disabled in idle phase

0x00000001 : HIGH

ALTEX0 output is high in idle phase

0x00000002 : LOW

ALTEX0 output is low in idle phase

End of enumeration elements list.

IDLECONF1 : ALTEX1 idle phase configuration
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX1 output is disabled in idle phase

0x00000001 : HIGH

ALTEX1 output is high in idle phase

0x00000002 : LOW

ALTEX1 output is low in idle phase

End of enumeration elements list.

IDLECONF2 : ALTEX2 idle phase configuration
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX2 output is disabled in idle phase

0x00000001 : HIGH

ALTEX2 output is high in idle phase

0x00000002 : LOW

ALTEX2 output is low in idle phase

End of enumeration elements list.

IDLECONF3 : ALTEX3 idle phase configuration
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX3 output is disabled in idle phase

0x00000001 : HIGH

ALTEX3 output is high in idle phase

0x00000002 : LOW

ALTEX3 output is low in idle phase

End of enumeration elements list.

IDLECONF4 : ALTEX4 idle phase configuration
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX4 output is disabled in idle phase

0x00000001 : HIGH

ALTEX4 output is high in idle phase

0x00000002 : LOW

ALTEX4 output is low in idle phase

End of enumeration elements list.

IDLECONF5 : ALTEX5 idle phase configuration
bits : 10 - 11 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX5 output is disabled in idle phase

0x00000001 : HIGH

ALTEX5 output is high in idle phase

0x00000002 : LOW

ALTEX5 output is low in idle phase

End of enumeration elements list.

IDLECONF6 : ALTEX6 idle phase configuration
bits : 12 - 13 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX6 output is disabled in idle phase

0x00000001 : HIGH

ALTEX6 output is high in idle phase

0x00000002 : LOW

ALTEX6 output is low in idle phase

End of enumeration elements list.

IDLECONF7 : ALTEX7 idle phase configuration
bits : 14 - 15 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

ALTEX7 output is disabled in idle phase

0x00000001 : HIGH

ALTEX7 output is high in idle phase

0x00000002 : LOW

ALTEX7 output is low in idle phase

End of enumeration elements list.

AEX0 : ALTEX0 always excite enable
bits : 16 - 16 (1 bit)
access : read-write

AEX1 : ALTEX1 always excite enable
bits : 17 - 17 (1 bit)
access : read-write

AEX2 : ALTEX2 always excite enable
bits : 18 - 18 (1 bit)
access : read-write

AEX3 : ALTEX3 always excite enable
bits : 19 - 19 (1 bit)
access : read-write

AEX4 : ALTEX4 always excite enable
bits : 20 - 20 (1 bit)
access : read-write

AEX5 : ALTEX5 always excite enable
bits : 21 - 21 (1 bit)
access : read-write

AEX6 : ALTEX6 always excite enable
bits : 22 - 22 (1 bit)
access : read-write

AEX7 : ALTEX7 always excite enable
bits : 23 - 23 (1 bit)
access : read-write


TIMCTRL

Timing Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TIMCTRL TIMCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 AUXPRESC LFPRESC PCPRESC PCTOP STARTDLY

AUXPRESC : Prescaling factor for high frequency timer
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0x00000000 : DIV1

High frequency timer is clocked with AUXHFRCO/1

0x00000001 : DIV2

High frequency timer is clocked with AUXHFRCO/2

0x00000002 : DIV4

High frequency timer is clocked with AUXHFRCO/4

0x00000003 : DIV8

High frequency timer is clocked with AUXHFRCO/8

End of enumeration elements list.

LFPRESC : Prescaling factor for low frequency timer
bits : 4 - 6 (3 bit)
access : read-write

Enumeration:

0x00000000 : DIV1

Low frequency timer is clocked with LFACLKLESENSE/1

0x00000001 : DIV2

Low frequency timer is clocked with LFACLKLESENSE/2

0x00000002 : DIV4

Low frequency timer is clocked with LFACLKLESENSE/4

0x00000003 : DIV8

Low frequency timer is clocked with LFACLKLESENSE/8

0x00000004 : DIV16

Low frequency timer is clocked with LFACLKLESENSE/16

0x00000005 : DIV32

Low frequency timer is clocked with LFACLKLESENSE/32

0x00000006 : DIV64

Low frequency timer is clocked with LFACLKLESENSE/64

0x00000007 : DIV128

Low frequency timer is clocked with LFACLKLESENSE/128

End of enumeration elements list.

PCPRESC : Period counter prescaling
bits : 8 - 10 (3 bit)
access : read-write

Enumeration:

0x00000000 : DIV1

The period counter clock frequency is LFACLKLESENSE/1

0x00000001 : DIV2

The period counter clock frequency is LFACLKLESENSE/2

0x00000002 : DIV4

The period counter clock frequency is LFACLKLESENSE/4

0x00000003 : DIV8

The period counter clock frequency is LFACLKLESENSE/8

0x00000004 : DIV16

The period counter clock frequency is LFACLKLESENSE/16

0x00000005 : DIV32

The period counter clock frequency is LFACLKLESENSE/32

0x00000006 : DIV64

The period counter clock frequency is LFACLKLESENSE/64

0x00000007 : DIV128

The period counter clock frequency is LFACLKLESENSE/128

End of enumeration elements list.

PCTOP : Period counter top value
bits : 12 - 19 (8 bit)
access : read-write

STARTDLY : Start delay configuration
bits : 22 - 23 (2 bit)
access : read-write


IF

Interrupt Flag Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

IF IF read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANCOMPLETE DEC DECERR BUFDATAV BUFLEVEL BUFOF CNTOF

CH0 :
bits : 0 - 0 (1 bit)
access : read-only

CH1 :
bits : 1 - 1 (1 bit)
access : read-only

CH2 :
bits : 2 - 2 (1 bit)
access : read-only

CH3 :
bits : 3 - 3 (1 bit)
access : read-only

CH4 :
bits : 4 - 4 (1 bit)
access : read-only

CH5 :
bits : 5 - 5 (1 bit)
access : read-only

CH6 :
bits : 6 - 6 (1 bit)
access : read-only

CH7 :
bits : 7 - 7 (1 bit)
access : read-only

CH8 :
bits : 8 - 8 (1 bit)
access : read-only

CH9 :
bits : 9 - 9 (1 bit)
access : read-only

CH10 :
bits : 10 - 10 (1 bit)
access : read-only

CH11 :
bits : 11 - 11 (1 bit)
access : read-only

CH12 :
bits : 12 - 12 (1 bit)
access : read-only

CH13 :
bits : 13 - 13 (1 bit)
access : read-only

CH14 :
bits : 14 - 14 (1 bit)
access : read-only

CH15 :
bits : 15 - 15 (1 bit)
access : read-only

SCANCOMPLETE :
bits : 16 - 16 (1 bit)
access : read-only

DEC :
bits : 17 - 17 (1 bit)
access : read-only

DECERR :
bits : 18 - 18 (1 bit)
access : read-only

BUFDATAV :
bits : 19 - 19 (1 bit)
access : read-only

BUFLEVEL :
bits : 20 - 20 (1 bit)
access : read-only

BUFOF :
bits : 21 - 21 (1 bit)
access : read-only

CNTOF :
bits : 22 - 22 (1 bit)
access : read-only


IFC

Interrupt Flag Clear Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFC IFC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANCOMPLETE DEC DECERR BUFDATAV BUFLEVEL BUFOF CNTOF

CH0 :
bits : 0 - 0 (1 bit)
access : write-only

CH1 :
bits : 1 - 1 (1 bit)
access : write-only

CH2 :
bits : 2 - 2 (1 bit)
access : write-only

CH3 :
bits : 3 - 3 (1 bit)
access : write-only

CH4 :
bits : 4 - 4 (1 bit)
access : write-only

CH5 :
bits : 5 - 5 (1 bit)
access : write-only

CH6 :
bits : 6 - 6 (1 bit)
access : write-only

CH7 :
bits : 7 - 7 (1 bit)
access : write-only

CH8 :
bits : 8 - 8 (1 bit)
access : write-only

CH9 :
bits : 9 - 9 (1 bit)
access : write-only

CH10 :
bits : 10 - 10 (1 bit)
access : write-only

CH11 :
bits : 11 - 11 (1 bit)
access : write-only

CH12 :
bits : 12 - 12 (1 bit)
access : write-only

CH13 :
bits : 13 - 13 (1 bit)
access : write-only

CH14 :
bits : 14 - 14 (1 bit)
access : write-only

CH15 :
bits : 15 - 15 (1 bit)
access : write-only

SCANCOMPLETE :
bits : 16 - 16 (1 bit)
access : write-only

DEC :
bits : 17 - 17 (1 bit)
access : write-only

DECERR :
bits : 18 - 18 (1 bit)
access : write-only

BUFDATAV :
bits : 19 - 19 (1 bit)
access : write-only

BUFLEVEL :
bits : 20 - 20 (1 bit)
access : write-only

BUFOF :
bits : 21 - 21 (1 bit)
access : write-only

CNTOF :
bits : 22 - 22 (1 bit)
access : write-only


IFS

Interrupt Flag Set Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IFS IFS write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANCOMPLETE DEC DECERR BUFDATAV BUFLEVEL BUFOF CNTOF

CH0 :
bits : 0 - 0 (1 bit)
access : write-only

CH1 :
bits : 1 - 1 (1 bit)
access : write-only

CH2 :
bits : 2 - 2 (1 bit)
access : write-only

CH3 :
bits : 3 - 3 (1 bit)
access : write-only

CH4 :
bits : 4 - 4 (1 bit)
access : write-only

CH5 :
bits : 5 - 5 (1 bit)
access : write-only

CH6 :
bits : 6 - 6 (1 bit)
access : write-only

CH7 :
bits : 7 - 7 (1 bit)
access : write-only

CH8 :
bits : 8 - 8 (1 bit)
access : write-only

CH9 :
bits : 9 - 9 (1 bit)
access : write-only

CH10 :
bits : 10 - 10 (1 bit)
access : write-only

CH11 :
bits : 11 - 11 (1 bit)
access : write-only

CH12 :
bits : 12 - 12 (1 bit)
access : write-only

CH13 :
bits : 13 - 13 (1 bit)
access : write-only

CH14 :
bits : 14 - 14 (1 bit)
access : write-only

CH15 :
bits : 15 - 15 (1 bit)
access : write-only

SCANCOMPLETE :
bits : 16 - 16 (1 bit)
access : write-only

DEC :
bits : 17 - 17 (1 bit)
access : write-only

DECERR :
bits : 18 - 18 (1 bit)
access : write-only

BUFDATAV :
bits : 19 - 19 (1 bit)
access : write-only

BUFLEVEL :
bits : 20 - 20 (1 bit)
access : write-only

BUFOF :
bits : 21 - 21 (1 bit)
access : write-only

CNTOF :
bits : 22 - 22 (1 bit)
access : write-only


IEN

Interrupt Enable Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEN IEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15 SCANCOMPLETE DEC DECERR BUFDATAV BUFLEVEL BUFOF CNTOF

CH0 :
bits : 0 - 0 (1 bit)
access : read-write

CH1 :
bits : 1 - 1 (1 bit)
access : read-write

CH2 :
bits : 2 - 2 (1 bit)
access : read-write

CH3 :
bits : 3 - 3 (1 bit)
access : read-write

CH4 :
bits : 4 - 4 (1 bit)
access : read-write

CH5 :
bits : 5 - 5 (1 bit)
access : read-write

CH6 :
bits : 6 - 6 (1 bit)
access : read-write

CH7 :
bits : 7 - 7 (1 bit)
access : read-write

CH8 :
bits : 8 - 8 (1 bit)
access : read-write

CH9 :
bits : 9 - 9 (1 bit)
access : read-write

CH10 :
bits : 10 - 10 (1 bit)
access : read-write

CH11 :
bits : 11 - 11 (1 bit)
access : read-write

CH12 :
bits : 12 - 12 (1 bit)
access : read-write

CH13 :
bits : 13 - 13 (1 bit)
access : read-write

CH14 :
bits : 14 - 14 (1 bit)
access : read-write

CH15 :
bits : 15 - 15 (1 bit)
access : read-write

SCANCOMPLETE :
bits : 16 - 16 (1 bit)
access : read-write

DEC :
bits : 17 - 17 (1 bit)
access : read-write

DECERR :
bits : 18 - 18 (1 bit)
access : read-write

BUFDATAV :
bits : 19 - 19 (1 bit)
access : read-write

BUFLEVEL :
bits : 20 - 20 (1 bit)
access : read-write

BUFOF :
bits : 21 - 21 (1 bit)
access : read-write

CNTOF :
bits : 22 - 22 (1 bit)
access : read-write


SYNCBUSY

Synchronization Busy Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

SYNCBUSY SYNCBUSY read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CTRL TIMCTRL PERCTRL DECCTRL BIASCTRL CMD CHEN SCANRES STATUS PTR BUFDATA CURCH DECSTATE SENSORSTATE IDLECONF ALTEXCONF ROUTE POWERDOWN TCONFA TCONFB DATA TIMING INTERACT EVAL

CTRL : LESENSE_CTRL Register Busy
bits : 0 - 0 (1 bit)
access : read-only

TIMCTRL : LESENSE_TIMCTRL Register Busy
bits : 1 - 1 (1 bit)
access : read-only

PERCTRL : LESENSE_PERCTRL Register Busy
bits : 2 - 2 (1 bit)
access : read-only

DECCTRL : LESENSE_DECCTRL Register Busy
bits : 3 - 3 (1 bit)
access : read-only

BIASCTRL : LESENSE_BIASCTRL Register Busy
bits : 4 - 4 (1 bit)
access : read-only

CMD : LESENSE_CMD Register Busy
bits : 5 - 5 (1 bit)
access : read-only

CHEN : LESENSE_CHEN Register Busy
bits : 6 - 6 (1 bit)
access : read-only

SCANRES : LESENSE_SCANRES Register Busy
bits : 7 - 7 (1 bit)
access : read-only

STATUS : LESENSE_STATUS Register Busy
bits : 8 - 8 (1 bit)
access : read-only

PTR : LESENSE_PTR Register Busy
bits : 9 - 9 (1 bit)
access : read-only

BUFDATA : LESENSE_BUFDATA Register Busy
bits : 10 - 10 (1 bit)
access : read-only

CURCH : LESENSE_CURCH Register Busy
bits : 11 - 11 (1 bit)
access : read-only

DECSTATE : LESENSE_DECSTATE Register Busy
bits : 12 - 12 (1 bit)
access : read-only

SENSORSTATE : LESENSE_SENSORSTATE Register Busy
bits : 13 - 13 (1 bit)
access : read-only

IDLECONF : LESENSE_IDLECONF Register Busy
bits : 14 - 14 (1 bit)
access : read-only

ALTEXCONF : LESENSE_ALTEXCONF Register Busy
bits : 15 - 15 (1 bit)
access : read-only

ROUTE : LESENSE_ROUTE Register Busy
bits : 16 - 16 (1 bit)
access : read-only

POWERDOWN : LESENSE_POWERDOWN Register Busy
bits : 17 - 17 (1 bit)
access : read-only

TCONFA : LESENSE_STx_TCONFA Register Busy
bits : 21 - 21 (1 bit)
access : read-only

TCONFB : LESENSE_STx_TCONFB Register Busy
bits : 22 - 22 (1 bit)
access : read-only

DATA : LESENSE_BUFx_DATA Register Busy
bits : 23 - 23 (1 bit)
access : read-only

TIMING : LESENSE_CHx_TIMING Register Busy
bits : 24 - 24 (1 bit)
access : read-only

INTERACT : LESENSE_CHx_INTERACT Register Busy
bits : 25 - 25 (1 bit)
access : read-only

EVAL : LESENSE_CHx_EVAL Register Busy
bits : 26 - 26 (1 bit)
access : read-only


ROUTE

I/O Routing Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ROUTE ROUTE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CH0PEN CH1PEN CH2PEN CH3PEN CH4PEN CH5PEN CH6PEN CH7PEN CH8PEN CH9PEN CH10PEN CH11PEN CH12PEN CH13PEN CH14PEN CH15PEN ALTEX0PEN ALTEX1PEN ALTEX2PEN ALTEX3PEN ALTEX4PEN ALTEX5PEN ALTEX6PEN ALTEX7PEN

CH0PEN : CH0 Pin Enable
bits : 0 - 0 (1 bit)
access : read-write

CH1PEN : CH0 Pin Enable
bits : 1 - 1 (1 bit)
access : read-write

CH2PEN : CH2 Pin Enable
bits : 2 - 2 (1 bit)
access : read-write

CH3PEN : CH3 Pin Enable
bits : 3 - 3 (1 bit)
access : read-write

CH4PEN : CH4 Pin Enable
bits : 4 - 4 (1 bit)
access : read-write

CH5PEN : CH5 Pin Enable
bits : 5 - 5 (1 bit)
access : read-write

CH6PEN : CH6 Pin Enable
bits : 6 - 6 (1 bit)
access : read-write

CH7PEN : CH7 Pin Enable
bits : 7 - 7 (1 bit)
access : read-write

CH8PEN : CH8 Pin Enable
bits : 8 - 8 (1 bit)
access : read-write

CH9PEN : CH9 Pin Enable
bits : 9 - 9 (1 bit)
access : read-write

CH10PEN : CH10 Pin Enable
bits : 10 - 10 (1 bit)
access : read-write

CH11PEN : CH11 Pin Enable
bits : 11 - 11 (1 bit)
access : read-write

CH12PEN : CH12 Pin Enable
bits : 12 - 12 (1 bit)
access : read-write

CH13PEN : CH13 Pin Enable
bits : 13 - 13 (1 bit)
access : read-write

CH14PEN : CH14 Pin Enable
bits : 14 - 14 (1 bit)
access : read-write

CH15PEN : CH15 Pin Enable
bits : 15 - 15 (1 bit)
access : read-write

ALTEX0PEN : ALTEX0 Pin Enable
bits : 16 - 16 (1 bit)
access : read-write

ALTEX1PEN : ALTEX1 Pin Enable
bits : 17 - 17 (1 bit)
access : read-write

ALTEX2PEN : ALTEX2 Pin Enable
bits : 18 - 18 (1 bit)
access : read-write

ALTEX3PEN : ALTEX3 Pin Enable
bits : 19 - 19 (1 bit)
access : read-write

ALTEX4PEN : ALTEX4 Pin Enable
bits : 20 - 20 (1 bit)
access : read-write

ALTEX5PEN : ALTEX5 Pin Enable
bits : 21 - 21 (1 bit)
access : read-write

ALTEX6PEN : ALTEX6 Pin Enable
bits : 22 - 22 (1 bit)
access : read-write

ALTEX7PEN : ALTEX7 Pin Enable
bits : 23 - 23 (1 bit)
access : read-write


POWERDOWN

LESENSE RAM power-down register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

POWERDOWN POWERDOWN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RAM

RAM : LESENSE RAM power-down
bits : 0 - 0 (1 bit)
access : read-write


PERCTRL

Peripheral Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PERCTRL PERCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DACCH0DATA DACCH1DATA DACCH0CONV DACCH1CONV DACCH0OUT DACCH1OUT DACPRESC DACREF ACMP0MODE ACMP1MODE WARMUPMODE

DACCH0DATA : DAC CH0 data selection.
bits : 0 - 0 (1 bit)
access : read-write

DACCH1DATA : DAC CH1 data selection.
bits : 1 - 1 (1 bit)
access : read-write

DACCH0CONV : DAC channel 0 conversion mode
bits : 2 - 3 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

LESENSE does not control DAC CH0.

0x00000001 : CONTINUOUS

DAC channel 0 is driven in continuous mode.

0x00000002 : SAMPLEHOLD

DAC channel 0 is driven in sample hold mode.

0x00000003 : SAMPLEOFF

DAC channel 0 is driven in sample off mode.

End of enumeration elements list.

DACCH1CONV : DAC channel 1 conversion mode
bits : 4 - 5 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

LESENSE does not control DAC CH1.

0x00000001 : CONTINUOUS

DAC channel 1 is driven in continuous mode.

0x00000002 : SAMPLEHOLD

DAC channel 1 is driven in sample hold mode.

0x00000003 : SAMPLEOFF

DAC channel 1 is driven in sample off mode.

End of enumeration elements list.

DACCH0OUT : DAC channel 0 output mode
bits : 6 - 7 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

DAC CH0 output to pin and ACMP/ADC disabled

0x00000001 : PIN

DAC CH0 output to pin enabled, output to ADC and ACMP disabled

0x00000002 : ADCACMP

DAC CH0 output to pin disabled, output to ADC and ACMP enabled

0x00000003 : PINADCACMP

DAC CH0 output to pin, ADC, and ACMP enabled.

End of enumeration elements list.

DACCH1OUT : DAC channel 1 output mode
bits : 8 - 9 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

DAC CH1 output to pin and ACMP/ADC disabled

0x00000001 : PIN

DAC CH1 output to pin enabled, output to ADC and ACMP disabled

0x00000002 : ADCACMP

DAC CH1 output to pin disabled, output to ADC and ACMP enabled

0x00000003 : PINADCACMP

DAC CH1 output to pin, ADC, and ACMP enabled.

End of enumeration elements list.

DACPRESC : DAC prescaler configuration.
bits : 10 - 14 (5 bit)
access : read-write

DACREF : DAC bandgap reference used
bits : 18 - 18 (1 bit)
access : read-write

ACMP0MODE : ACMP0 mode
bits : 20 - 21 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

LESENSE does not control ACMP0

0x00000001 : MUX

LESENSE controls the input mux (POSSEL) of ACMP0

0x00000002 : MUXTHRES

LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0

End of enumeration elements list.

ACMP1MODE : ACMP1 mode
bits : 22 - 23 (2 bit)
access : read-write

Enumeration:

0x00000000 : DISABLE

LESENSE does not control ACMP1

0x00000001 : MUX

LESENSE controls the input mux (POSSEL) of ACMP1

0x00000002 : MUXTHRES

LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1

End of enumeration elements list.

WARMUPMODE : ACMP and DAC duty cycle mode
bits : 26 - 27 (2 bit)
access : read-write

Enumeration:

0x00000000 : NORMAL

The analog comparators and DAC are shut down when LESENSE is idle

0x00000001 : KEEPACMPWARM

The analog comparators are kept powered up when LESENSE is idle

0x00000002 : KEEPDACWARM

The DAC is kept powered up when LESENSE is idle

0x00000003 : KEEPACMPDACWARM

The analog comparators and DAC are kept powered up when LESENSE is idle

End of enumeration elements list.


DECCTRL

Decoder control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DECCTRL DECCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DISABLE ERRCHK INTMAP HYSTPRS0 HYSTPRS1 HYSTPRS2 HYSTIRQ PRSCNT INPUT PRSSEL0 PRSSEL1 PRSSEL2 PRSSEL3

DISABLE : Disable the decoder
bits : 0 - 0 (1 bit)
access : read-write

ERRCHK : Enable check of current state
bits : 1 - 1 (1 bit)
access : read-write

INTMAP : Enable decoder to channel interrupt mapping
bits : 2 - 2 (1 bit)
access : read-write

HYSTPRS0 : Enable decoder hysteresis on PRS0 output
bits : 3 - 3 (1 bit)
access : read-write

HYSTPRS1 : Enable decoder hysteresis on PRS1 output
bits : 4 - 4 (1 bit)
access : read-write

HYSTPRS2 : Enable decoder hysteresis on PRS2 output
bits : 5 - 5 (1 bit)
access : read-write

HYSTIRQ : Enable decoder hysteresis on interrupt requests
bits : 6 - 6 (1 bit)
access : read-write

PRSCNT : Enable count mode on decoder PRS channels 0 and 1
bits : 7 - 7 (1 bit)
access : read-write

INPUT :
bits : 8 - 8 (1 bit)
access : read-write

PRSSEL0 :
bits : 10 - 13 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected as input

0x00000001 : PRSCH1

PRS Channel 1 selected as input

0x00000002 : PRSCH2

PRS Channel 2 selected as input

0x00000003 : PRSCH3

PRS Channel 3 selected as input

0x00000004 : PRSCH4

PRS Channel 4 selected as input

0x00000005 : PRSCH5

PRS Channel 5 selected as input

0x00000006 : PRSCH6

PRS Channel 6 selected as input

0x00000007 : PRSCH7

PRS Channel 7 selected as input

0x00000008 : PRSCH8

PRS Channel 8 selected as input

0x00000009 : PRSCH9

PRS Channel 9 selected as input

0x0000000A : PRSCH10

PRS Channel 10 selected as input

0x0000000B : PRSCH11

PRS Channel 11 selected as input

End of enumeration elements list.

PRSSEL1 :
bits : 14 - 17 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected as input

0x00000001 : PRSCH1

PRS Channel 1 selected as input

0x00000002 : PRSCH2

PRS Channel 2 selected as input

0x00000003 : PRSCH3

PRS Channel 3 selected as input

0x00000004 : PRSCH4

PRS Channel 4 selected as input

0x00000005 : PRSCH5

PRS Channel 5 selected as input

0x00000006 : PRSCH6

PRS Channel 6 selected as input

0x00000007 : PRSCH7

PRS Channel 7 selected as input

0x00000008 : PRSCH8

PRS Channel 8 selected as input

0x00000009 : PRSCH9

PRS Channel 9 selected as input

0x0000000A : PRSCH10

PRS Channel 10 selected as input

0x0000000B : PRSCH11

PRS Channel 11 selected as input

End of enumeration elements list.

PRSSEL2 :
bits : 18 - 21 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected as input

0x00000001 : PRSCH1

PRS Channel 1 selected as input

0x00000002 : PRSCH2

PRS Channel 2 selected as input

0x00000003 : PRSCH3

PRS Channel 3 selected as input

0x00000004 : PRSCH4

PRS Channel 4 selected as input

0x00000005 : PRSCH5

PRS Channel 5 selected as input

0x00000006 : PRSCH6

PRS Channel 6 selected as input

0x00000007 : PRSCH7

PRS Channel 7 selected as input

0x00000008 : PRSCH8

PRS Channel 8 selected as input

0x00000009 : PRSCH9

PRS Channel 9 selected as input

0x0000000A : PRSCH10

PRS Channel 10 selected as input

0x0000000B : PRSCH11

PRS Channel 11 selected as input

End of enumeration elements list.

PRSSEL3 :
bits : 22 - 25 (4 bit)
access : read-write

Enumeration:

0x00000000 : PRSCH0

PRS Channel 0 selected as input

0x00000001 : PRSCH1

PRS Channel 1 selected as input

0x00000002 : PRSCH2

PRS Channel 2 selected as input

0x00000003 : PRSCH3

PRS Channel 3 selected as input

0x00000004 : PRSCH4

PRS Channel 4 selected as input

0x00000005 : PRSCH5

PRS Channel 5 selected as input

0x00000006 : PRSCH6

PRS Channel 6 selected as input

0x00000007 : PRSCH7

PRS Channel 7 selected as input

0x00000008 : PRSCH8

PRS Channel 8 selected as input

0x00000009 : PRSCH9

PRS Channel 9 selected as input

0x0000000A : PRSCH10

PRS Channel 10 selected as input

0x0000000B : PRSCH11

PRS Channel 11 selected as input

End of enumeration elements list.



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