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DAC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

SET1

SET2

SET3

SET4

STATUS


SET1

Offset:0x000 DAC Setting 1 Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SET1 SET1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VMIDSEL PD_VREF PD_IREF PD_CLK PD_DAC

VMIDSEL : Normal mode/Fast Start-up select
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Normal mode

None

1 : Fast Start-up mode

None

End of enumeration elements list.

PD_VREF : VREF Circuit Power-down enable
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.

PD_IREF : IREF Circuit Power-down enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.

PD_CLK : CKGEN Power-down enable
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.

PD_DAC : DAC Power-down enable
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.


SET2

Offset:0x010 DAC Setting 2 Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SET2 SET2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SOFT_RSTN DAC_EN_IN MUTX RMP

SOFT_RSTN : Software reset digital circuit(one MCLK pulse trigger)
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Reset

None

1 : Not Reset

None

End of enumeration elements list.

DAC_EN_IN : DAC Enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.

MUTX : Mute ON/OFF
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Mute off

None

1 : Mute on

None

End of enumeration elements list.

RMP : Attenuation ramp rate
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : 1*LRCK

None

1 : 2*LRCK

None

2 : 4*LRCK

None

3 : 8*LRCK

None

End of enumeration elements list.


SET3

Offset:0x020 DAC Setting 3 Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SET3 SET3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VOL

VOL : DAC VOL setting
bits : 0 - 7 (8 bit)
access : read-write


SET4

Offset:0x030 DAC Setting 4 Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SET4 SET4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INI_RAM_EN DEMS PD_DRV

INI_RAM_EN : Initialize RAM enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.

DEMS : Select the DAC de-emphasis response curve
bits : 1 - 3 (3 bit)
access : read-write

Enumeration:

1 : De-emphasis for 48KHz

None

2 : De-emphasis for 44.1KHz

None

3 : De-emphasis for 32KHz

None

End of enumeration elements list.

PD_DRV : Driver Power-down enable
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

None

1 : Enable

None

End of enumeration elements list.


STATUS

Offset:0x040 DAC Status Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Ini_RAM_Ready

Ini_RAM_Ready : Initialize RAM ready
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : Not ready

None

1 : Ready

None

End of enumeration elements list.



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