Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 USARTn Receiver Buffer Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RB : The oldest received byte in USART RX FIFO
bits : 0 - 7 (8 bit)
access : read-only
Offset:0x00 USARTn Transmit Holding Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : RB
reset_Mask : 0x0
TH : The oldest byte to be transmitted in USART TX FIFO when transmitter is available
bits : 0 - 7 (8 bit)
access : write-only
Offset:0x00 USARTn Divisor Latch LSB Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : RB
reset_Mask : 0x0
DLL : DLL and DLM register determines the baud rate of USARTn
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x10 USARTn Modem Control Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DTRCTRL : Source from modem output (DTR) pin
bits : 0 - 0 (1 bit)
access : read-write
RTSCTRL : Source from modem output (RTS) pin
bits : 1 - 2 (2 bit)
access : read-write
OUT1 : Control OUT1 internal signal in loopback mode.
bits : 2 - 4 (3 bit)
access : read-write
OUT2 : Control OUT2 internal signal in loopback mode.
bits : 3 - 6 (4 bit)
access : read-write
LMS : Modem loopback mode enable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable loopback mode
1 : Enable
Enable loopback mode
End of enumeration elements list.
RTSEN : RTS enable
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable auto-RTS flow control
1 : Enable
Enable auto-RTS flow control
End of enumeration elements list.
CTSEN : CTS enable
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable auto-CTS flow control
1 : Enable
Enable auto-CTS flow control
End of enumeration elements list.
Offset:0x14 USARTn Line Status Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
RDR : Receiver data ready flag
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : Not ready
USARTn_RB FIFO is empty
1 : Ready
USARTn_RB FIFO contains valid data
End of enumeration elements list.
OE : Overrun error flag
bits : 1 - 2 (2 bit)
access : read-only
Enumeration:
0 : No overrun error
No overrun error
1 : Overrun error
Overrun error status is active
End of enumeration elements list.
PE : Parity error flag
bits : 2 - 4 (3 bit)
access : read-only
Enumeration:
0 : No parity error
No parity error
1 : Parity error
Parity error status is active
End of enumeration elements list.
FE : Framing error flag
bits : 3 - 6 (4 bit)
access : read-only
Enumeration:
0 : No framing error
No framing error
1 : Framing error
Framing error status is active
End of enumeration elements list.
BI : Break interrupt flag
bits : 4 - 8 (5 bit)
access : read-only
Enumeration:
0 : No break interrupt
No break interrupt
1 : Break interrupt
Break interrupt status is active
End of enumeration elements list.
THRE : THR empty flag
bits : 5 - 10 (6 bit)
access : read-only
Enumeration:
0 : Not empty
THR contains valid data
1 : Empty
THR (TX FIFO) is empty
End of enumeration elements list.
TEMT : Transmitter empty flag
bits : 6 - 12 (7 bit)
access : read-only
Enumeration:
0 : Not empty
THR and/or TSR contains valid data
1 : Empty
THR and TSR are both empty
End of enumeration elements list.
RXFE : Receiver FIFO error flag
bits : 7 - 14 (8 bit)
access : read-only
Enumeration:
0 : No RX FIFO error
USARTn_RB contains no USART RX errors
1 : RX FIFO error
USARTn_RB contains at least 1 USART RX error
End of enumeration elements list.
TXERR : TX error flag
bits : 8 - 16 (9 bit)
access : read-only
Enumeration:
0 : No TX error
USARTn_RB contains no USART RX errors
1 : TX FIFO error
Smart card has NACKed a transmitted character
End of enumeration elements list.
Offset:0x18 USARTn Modem Status Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
DCTS : Delta CTS
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : No change
No change detected on modem input CTS pin
1 : State changes
State changes detected on modem input CTS pin
End of enumeration elements list.
DDSR : Delta DSR
bits : 1 - 2 (2 bit)
access : read-only
Enumeration:
0 : No change
No change detected on DSR pin
1 : State changes
State changes detected on DSR pin
End of enumeration elements list.
TERI : Trailing edge RI
bits : 2 - 4 (3 bit)
access : read-only
Enumeration:
0 : No change
No change detected on RI pin
1 : State changes
Low-to-high transition detected on RI pin
End of enumeration elements list.
DDCD : Delta DCD
bits : 3 - 6 (4 bit)
access : read-only
Enumeration:
0 : No change
No change detected on DCD pin
1 : State changes
State changes detected on DCD pin
End of enumeration elements list.
CTS : Complement of CTS pin input signal
bits : 4 - 8 (5 bit)
access : read-only
DSR : Complement of DSR pin input signal
bits : 5 - 10 (6 bit)
access : read-only
RI : Complement of RI pin input signal
bits : 6 - 12 (7 bit)
access : read-only
DCD : Complement of DCD pin input signal
bits : 7 - 14 (8 bit)
access : read-only
Offset:0x1C USARTn Scratch Pad Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PAD : Pad informaton
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x20 USARTn Auto-baud Control Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
START : Auto-baud run bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Stop
Auto-baud is not running
1 : Start
Auto-baud ids running
End of enumeration elements list.
MODE : Auto-baud mode selection
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Mode 0
Auto-baud mode 0
1 : Mode 1
Auto-baud mode 1
End of enumeration elements list.
AUTORESTART : Restart mode selection
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : No restart
No restart
1 : Restart
Auto restart in case of timeout
End of enumeration elements list.
ABEOIFC : Clear ABEOIF flag
bits : 8 - 16 (9 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear ABEOIF bit
End of enumeration elements list.
ABTOIFC : Clear ABTOIF flag
bits : 9 - 18 (10 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear ABTOIF bit
End of enumeration elements list.
Offset:0x24 USARTn IrDA Control Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IRDAINV : IrDA serial input inverter
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : No inverted
IrDA serial input is not inverted
1 : Inverted
IrDA serial input is inverted
End of enumeration elements list.
FIXPULSEEN : IrDA fix pulse width mode enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Pulse width = 3 / (Oversampling * Baud rate)
1 : Enable
Pulse width is set by PULSEDIV bits
End of enumeration elements list.
PULSEDIV : Pulse width selection
bits : 3 - 8 (6 bit)
access : read-write
Enumeration:
0 : 000b
2 * TPCLK
1 : 001b
4 * TPCLK
2 : 010b
8 * TPCLK
3 : 011b
16 * TPCLK
4 : 100b
32 * TPCLK
5 : 101b
64 * TPCLK
6 : 110b
128 * TPCLK
7 : 111b
256 * TPCLK
End of enumeration elements list.
Offset:0x28 USARTn Fractional Divider Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVADDVAL : Baud rate generation prescaler divisor value
bits : 0 - 3 (4 bit)
access : read-write
MULVAL : Baud rate generation prescaler multiplier value
bits : 4 - 11 (8 bit)
access : read-write
Enumeration:
0 : 0000b
Baud rate prescaler multiplier value is 1
1 : 0001b
Baud rate prescaler multiplier value is 2
2 : 0010b
Baud rate prescaler multiplier value is 3
3 : 0011b
Baud rate prescaler multiplier value is 4
4 : 0100b
Baud rate prescaler multiplier value is 5
5 : 0101b
Baud rate prescaler multiplier value is 6
6 : 0110b
Baud rate prescaler multiplier value is 7
7 : 0111b
Baud rate prescaler multiplier value is 8
8 : 1000b
Baud rate prescaler multiplier value is 9
9 : 1001b
Baud rate prescaler multiplier value is 10
10 : 1010b
Baud rate prescaler multiplier value is 11
11 : 1011b
Baud rate prescaler multiplier value is 12
12 : 1100b
Baud rate prescaler multiplier value is 13
13 : 1101b
Baud rate prescaler multiplier value is 14
14 : 1110b
Baud rate prescaler multiplier value is 15
15 : 1111b
Baud rate prescaler multiplier value is 16
End of enumeration elements list.
OVER8 : Oversampling value
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : 16
Oversampling by 16
1 : 8
Oversampling by 8
End of enumeration elements list.
Offset:0x30 USARTn Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
USARTEN : USART enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable USART
1 : Enable
Enable USART
End of enumeration elements list.
MODE : USART mode
bits : 1 - 4 (4 bit)
access : read-write
Enumeration:
0 : UART
UART mode
1 : Modem
Modem control mode
2 : IrDA
IrDA mode
3 : Smart card
Smart card mode
4 : Synchronous
Synchronous mode
5 : RS-485
RS-485 mode
End of enumeration elements list.
RXEN : RX enable
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable RX
1 : Enable
Enable RX
End of enumeration elements list.
TXEN : TX enable
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable TX
1 : Enable
Enable TX
End of enumeration elements list.
Offset:0x34 USARTn Control Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
HDEN : Half-duplex mode enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable half-duplex mode
1 : Enable
Enable half-duplex mode
End of enumeration elements list.
Offset:0x38 USARTn Smartcard Interface Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NACKDIS : NACK response disable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable NACK response
1 : Enable
Enable NACK response
End of enumeration elements list.
PROTSEL : ISO7816-3 protocol selection
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : 0
T=0
1 : 1
T=1
End of enumeration elements list.
SCLKEN : SCLK enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable SCLK
1 : Enable
Enable SCLK
End of enumeration elements list.
TXRETRY : Maximal number of retransmissions that USART will attempt
bits : 5 - 12 (8 bit)
access : read-write
XTRAGUARD : Extra guard time
bits : 8 - 23 (16 bit)
access : read-write
TC : Count for SCLK clock cycle
bits : 16 - 39 (24 bit)
access : read-write
Offset:0x3C USARTn RS485 Control Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
NMMEN : RS-485 normal multidrop mode enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable NMM
1 : Enable
Enable NMM
End of enumeration elements list.
RXEN : RS-485 receiver enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable RS-485 receiver
1 : Enable
Enable RS-485 receiver
End of enumeration elements list.
AADEN : Auto address detect enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable AAD
1 : Enable
Enable AAD
End of enumeration elements list.
ADCEN : Auto direction control enable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable ADC
1 : Enable
Enable ADC
End of enumeration elements list.
OINV : Polarity control
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
The direction control pin will be driven to logic 0 when the transmitter has data to be sent, and be driven to logic 1 after the last bit of data has been transmitted
1 : Enable
The direction control pin will be driven to logic 1 when the transmitter has data to be sent, and be driven to logic 0 after the last bit of data has been transmitted
End of enumeration elements list.
Offset:0x04 USARTn Divisor Latch MSB Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLM : DLL and DLM register determines the baud rate of USARTn
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x04 USARTn Interrupt Enable Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
alternate_register : DLM
reset_Mask : 0x0
RDAIE : RDA interrupt enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable RDA interrupt
1 : Enable
Enable RDA interrupt
End of enumeration elements list.
THREIE : THRE interrupt enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable THRE interrupt
1 : Enable
Enable THRE interrupt
End of enumeration elements list.
RLSIE : RLS interrupt enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable RLS interrupt
1 : Enable
Enable RLS interrupt
End of enumeration elements list.
MSIE : MS interrupt enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable MS interrupt
1 : Enable
Enable MS interrupt
End of enumeration elements list.
TEMTIE : TEMT interrupt enable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable TEMT interrupt
1 : Enable
Enable TEMT interrupt
End of enumeration elements list.
ABEOIE : ABE0 interrupt enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable ABEO interrupt
1 : Enable
Enable ABEO interrupt
End of enumeration elements list.
ABTOIE : ABT0 interrupt enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Disable ABTO interrupt
1 : Enable
Enable ABTO interrupt
End of enumeration elements list.
TXERRIE : TXERR interrupt enable
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Disable TXERR interrupt
1 : Enable
Enable TXERR interrupt
End of enumeration elements list.
Offset:0x40 USARTn RS485 Address Match Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MATCH : RS-485 address value to be matched
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x44 USARTn RS485 Delay Value Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DLY : RTS delay value
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x48 USARTn Synchronous Mode Control Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CPOL : Clock polarity selection
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Low
SCLK idles at low level
1 : High
SCLK idles at high level
End of enumeration elements list.
CPHA : Clock phase for edge sampling
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Rising
Sample on the rising edge of SCLK
1 : Falling
Sample on the falling edge of SCLK
End of enumeration elements list.
Offset:0x08 USARTn Interrupt Identification Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INTSTATUS : Interrupt status
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : Pending
As least 1 interrupt is pending
1 : No interrupt
No interrupt
End of enumeration elements list.
INTID : Interrupt ID of RX FIFO
bits : 1 - 4 (4 bit)
access : read-only
Enumeration:
0 : 4
Modem status
1 : 3a
THRE interrupt
2 : 2a
RDA (Receive Data Available)
3 : 1
RLS (Receive Line Status)
6 : 2b
CTI (Character Time-out Indicator)
7 : 3b
TEMT interrupt
End of enumeration elements list.
FIFOEN : Equal to FIFOEN bits in USARTn_FIFOCTRL register
bits : 6 - 13 (8 bit)
access : read-only
ABEOIF : ABEO interrupt flag
bits : 8 - 16 (9 bit)
access : read-only
Enumeration:
0 : Not end
Auto-baud has not finished
1 : End
Auto-baud has finished and interrupt is enabled
End of enumeration elements list.
ABTOIF : ABTO interrupt flag
bits : 9 - 18 (10 bit)
access : read-only
Enumeration:
0 : Not Time-out
Auto-baud has not timed out
1 : Time-out
Auto-baud has timed out and interrupt is enabled
End of enumeration elements list.
TXERRIF : TXERR interrupt flag
bits : 10 - 20 (11 bit)
access : read-only
Enumeration:
0 : No error
TXERR has not occurred
1 : TX error
TXERR has occurred and interrupt is enabled
End of enumeration elements list.
Offset:0x08 USARTn FIFO Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
FIFOEN : FIFO enable
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Enable
Enable FIFO
End of enumeration elements list.
RXFIFORST : RX FIFO reset
bits : 1 - 2 (2 bit)
access : write-only
Enumeration:
0 : No impact
No impact
1 : Reset
Reset the pointer logic in RX FIFO
End of enumeration elements list.
TXFIFORST : TX FIFO reset
bits : 2 - 4 (3 bit)
access : write-only
Enumeration:
0 : No impact
No impact
1 : Reset
Reset the pointer logic in TX FIFO
End of enumeration elements list.
RXTL : RX trigger level
bits : 6 - 13 (8 bit)
access : write-only
Enumeration:
0 : Trigger level 0
1 character
1 : Trigger level 1
4 character
2 : Trigger level 2
8 character
3 : Trigger level 3
14 character
End of enumeration elements list.
Offset:0x0C USARTn Line Control Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WLS : Word length selection
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : 5-bit
5-bit character
1 : 6-bit
6-bit character
2 : 7-bit
7-bit character
3 : 8-bit
8-bit character
End of enumeration elements list.
SBS : Stop bit selection
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : 1 stop bit
1 stop bit
1 : 2 stop bit
2 stop bit (1.5 stop bit if WLS=0)
End of enumeration elements list.
PE : Parity enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable parity generation and checking
1 : Enable
Enable parity generation and checking
End of enumeration elements list.
PS : Parity selection
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
0 : 0
Odd parity
1 : 1
Even parity
2 : 2
Forced 1 sticky parity
3 : 3
Forced 0 sticky parity
End of enumeration elements list.
BC : Break control
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable break transmission
1 : Enable
Enable break transmission
End of enumeration elements list.
DLAB : Divisor Latch access
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable access to Divisor Latch
1 : Enable
Enable access to Divisor Latch
End of enumeration elements list.
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