\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 CT16Bn Timer Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CEN : Counter enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable counter
1 : Enable
Enable Timer Counter and Prescale Counter for counting
End of enumeration elements list.
CRST : Counter Reset
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Reset Counter
Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK
End of enumeration elements list.
Offset:0x14 CT16Bn Match Control Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MR0IE : Enable generating an interrupt when MR0 matches TC
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR0 matches TC
End of enumeration elements list.
MR0RST : Enable reset TC when MR0 matches TC
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR0 matches TC
End of enumeration elements list.
MR0STOP : Stop TC and PC and clear CEN bit when MR0 matches TC
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR0 matches TC
End of enumeration elements list.
MR1IE : Enable generating an interrupt when MR1 matches TC
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR1 matches TC
End of enumeration elements list.
MR1RST : Enable reset TC when MR1 matches TC
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR1 matches TC
End of enumeration elements list.
MR1STOP : Stop TC and PC and clear CEN bit when MR1 matches TC
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR1 matches TC
End of enumeration elements list.
MR2IE : Enable generating an interrupt when MR2 matches TC
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR2 matches TC
End of enumeration elements list.
MR2RST : Enable reset TC when MR2 matches TC
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR2 matches TC
End of enumeration elements list.
MR2STOP : Stop TC and PC and clear CEN bit when MR2 matches TC
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR2 matches TC
End of enumeration elements list.
MR3IE : Enable generating an interrupt when MR3 matches TC
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR3 matches TC
End of enumeration elements list.
MR3RST : Enable reset TC when MR3 matches TC
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR3 matches TC
End of enumeration elements list.
MR3STOP : Stop TC and PC and clear CEN bit when MR3 matches TC
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR3 matches TC
End of enumeration elements list.
MR4IE : Enable generating an interrupt when MR4 matches TC
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR4 matches TC
End of enumeration elements list.
MR4RST : Enable reset TC when MR4 matches TC
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR4 matches TC
End of enumeration elements list.
MR4STOP : Stop TC and PC and clear CEN bit when MR4 matches TC
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR4 matches TC
End of enumeration elements list.
MR5IE : Enable generating an interrupt when MR5 matches TC
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR5 matches TC
End of enumeration elements list.
MR5RST : Enable reset TC when MR5 matches TC
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR5 matches TC
End of enumeration elements list.
MR5STOP : Stop TC and PC and clear CEN bit when MR5 matches TC
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR5 matches TC
End of enumeration elements list.
MR6IE : Enable generating an interrupt when MR6 matches TC
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR6 matches TC
End of enumeration elements list.
MR6RST : Enable reset TC when MR6 matches TC
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR6 matches TC
End of enumeration elements list.
MR6STOP : Stop TC and PC and clear CEN bit when MR6 matches TC
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR6 matches TC
End of enumeration elements list.
MR7IE : Enable generating an interrupt when MR7 matches TC
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR7 matches TC
End of enumeration elements list.
MR7RST : Enable reset TC when MR7 matches TC
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR7 matches TC
End of enumeration elements list.
MR7STOP : Stop TC and PC and clear CEN bit when MR7 matches TC
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR7 matches TC
End of enumeration elements list.
MR8IE : Enable generating an interrupt when MR8 matches TC
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR8 matches TC
End of enumeration elements list.
MR8RST : Enable reset TC when MR8 matches TC
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR8 matches TC
End of enumeration elements list.
MR8STOP : Stop TC and PC and clear CEN bit when MR8 matches TC
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR8 matches TC
End of enumeration elements list.
MR9IE : Enable generating an interrupt when MR9 matches TC
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR9 matches TC
End of enumeration elements list.
MR9RST : Enable reset TC when MR9 matches TC
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR9 matches TC
End of enumeration elements list.
MR9STOP : Stop TC and PC and clear CEN bit when MR9 matches TC
bits : 29 - 58 (30 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR9 matches TC
End of enumeration elements list.
Offset:0x18 CT16Bn Match Control Register 2
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MR10IE : Enable generating an interrupt when MR10 matches TC
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR10 matches TC
End of enumeration elements list.
MR10RST : Enable reset TC when MR10 matches TC
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR10 matches TC
End of enumeration elements list.
MR10STOP : Stop TC and PC and clear CEN bit when MR10 matches TC
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR10 matches TC
End of enumeration elements list.
MR11IE : Enable generating an interrupt when MR11 matches TC
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR11 matches TC
End of enumeration elements list.
MR11RST : Enable reset TC when MR11 matches TC
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR11 matches TC
End of enumeration elements list.
MR11STOP : Stop TC and PC and clear CEN bit when MR11 matches TC
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR11 matches TC
End of enumeration elements list.
MR12IE : Enable generating an interrupt when MR12 matches TC
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR12 matches TC
End of enumeration elements list.
MR12RST : Enable reset TC when MR12 matches TC
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR12 matches TC
End of enumeration elements list.
MR12STOP : Stop TC and PC and clear CEN bit when MR12 matches TC
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR12 matches TC
End of enumeration elements list.
MR13IE : Enable generating an interrupt when MR13 matches TC
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR13 matches TC
End of enumeration elements list.
MR13RST : Enable reset TC when MR13 matches TC
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR13 matches TC
End of enumeration elements list.
MR13STOP : Stop TC and PC and clear CEN bit when MR13 matches TC
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR13 matches TC
End of enumeration elements list.
MR14IE : Enable generating an interrupt when MR14 matches TC
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR14 matches TC
End of enumeration elements list.
MR14RST : Enable reset TC when MR14 matches TC
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR14 matches TC
End of enumeration elements list.
MR14STOP : Stop TC and PC and clear CEN bit when MR14 matches TC
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR14 matches TC
End of enumeration elements list.
MR15IE : Enable generating an interrupt when MR15 matches TC
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR15 matches TC
End of enumeration elements list.
MR15RST : Enable reset TC when MR15 matches TC
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR15 matches TC
End of enumeration elements list.
MR15STOP : Stop TC and PC and clear CEN bit when MR15 matches TC
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR15 matches TC
End of enumeration elements list.
MR16IE : Enable generating an interrupt when MR16 matches TC
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR16 matches TC
End of enumeration elements list.
MR16RST : Enable reset TC when MR16 matches TC
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR16 matches TC
End of enumeration elements list.
MR16STOP : Stop TC and PC and clear CEN bit when MR16 matches TC
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR16 matches TC
End of enumeration elements list.
MR17IE : Enable generating an interrupt when MR17 matches TC
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR17 matches TC
End of enumeration elements list.
MR17RST : Enable reset TC when MR17 matches TC
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR17 matches TC
End of enumeration elements list.
MR17STOP : Stop TC and PC and clear CEN bit when MR17 matches TC
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR17 matches TC
End of enumeration elements list.
MR18IE : Enable generating an interrupt when MR18 matches TC
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR18 matches TC
End of enumeration elements list.
MR18RST : Enable reset TC when MR18 matches TC
bits : 25 - 50 (26 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR18 matches TC
End of enumeration elements list.
MR18STOP : Stop TC and PC and clear CEN bit when MR18 matches TC
bits : 26 - 52 (27 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR18 matches TC
End of enumeration elements list.
MR19IE : Enable generating an interrupt when MR19 matches TC
bits : 27 - 54 (28 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR19 matches TC
End of enumeration elements list.
MR19RST : Enable reset TC when MR19 matches TC
bits : 28 - 56 (29 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR19 matches TC
End of enumeration elements list.
MR19STOP : Stop TC and PC and clear CEN bit when MR19 matches TC
bits : 29 - 58 (30 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR19 matches TC
End of enumeration elements list.
Offset:0x1C CT16Bn Match Control Register 3
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
MR20IE : Enable generating an interrupt when MR20 matches TC
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR20 matches TC
End of enumeration elements list.
MR20RST : Enable reset TC when MR20 matches TC
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR20 matches TC
End of enumeration elements list.
MR20STOP : Stop TC and PC and clear CEN bit when MR20 matches TC
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR20 matches TC
End of enumeration elements list.
MR21IE : Enable generating an interrupt when MR21 matches TC
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR21 matches TC
End of enumeration elements list.
MR21RST : Enable reset TC when MR21 matches TC
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR21 matches TC
End of enumeration elements list.
MR21STOP : Stop TC and PC and clear CEN bit when MR21 matches TC
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR21 matches TC
End of enumeration elements list.
MR22IE : Enable generating an interrupt when MR22 matches TC
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR22 matches TC
End of enumeration elements list.
MR22RST : Enable reset TC when MR22 matches TC
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR22 matches TC
End of enumeration elements list.
MR22STOP : Stop TC and PC and clear CEN bit when MR22 matches TC
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR22 matches TC
End of enumeration elements list.
MR23IE : Enable generating an interrupt when MR23 matches TC
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR23 matches TC
End of enumeration elements list.
MR23RST : Enable reset TC when MR23 matches TC
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR23 matches TC
End of enumeration elements list.
MR23STOP : Stop TC and PC and clear CEN bit when MR23 matches TC
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR23 matches TC
End of enumeration elements list.
MR24IE : Enable generating an interrupt when MR24 matches TC
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Generating an interrupt when MR24 matches TC
End of enumeration elements list.
MR24RST : Enable reset TC when MR24 matches TC
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Reset TC when MR24 matches TC
End of enumeration elements list.
MR24STOP : Stop TC and PC and clear CEN bit when MR24 matches TC
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Stop TC and PC and clear CEN bit when MR24 matches TC
End of enumeration elements list.
Offset:0x20 CT16Bn MR0 Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x24 CT16Bn MR1 Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x28 CT16Bn MR2 Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x2C CT16Bn MR3 Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x30 CT16Bn MR4 Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x34 CT16Bn MR5 Register
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x38 CT16Bn MR6 Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x3C CT16Bn MR7 Register
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x04 CT16Bn Timer Counter Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
TC : Timer Counter
bits : 0 - 15 (16 bit)
access : read-write
Offset:0x40 CT16Bn MR8 Register
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x44 CT16Bn MR9 Register
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x48 CT16Bn MR10 Register
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x4C CT16Bn MR11 Register
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x50 CT16Bn MR12 Register
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x54 CT16Bn MR13 Register
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x58 CT16Bn MR14 Register
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x5C CT16Bn MR15 Register
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x60 CT16Bn MR16 Register
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x64 CT16Bn MR17 Register
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x68 CT16Bn MR18 Register
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x6C CT16Bn MR19 Register
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x70 CT16Bn MR20 Register
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x74 CT16Bn MR21 Register
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x78 CT16Bn MR22 Register
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x7C CT16Bn MR23 Register
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x08 CT16Bn Prescale Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRE : Prescaler
bits : 0 - 7 (8 bit)
access : read-write
Offset:0x80 CT16Bn MR24 Register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x88 CT16Bn External Match Register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EM0 : When the TC doesn't match MR0 and EMC0 is not 0, this bit will drive the state of CT16Bn_PWM0 output.
bits : 0 - 0 (1 bit)
access : read-write
EM1 : When the TC doesn't match MR1 and EMC1 is not 0, this bit will drive the state of CT16Bn_PWM1 output.
bits : 1 - 2 (2 bit)
access : read-write
EM2 : When the TC doesn't match MR2 and EMC2 is not 0, this bit will drive the state of CT16Bn_PWM2 output.
bits : 2 - 4 (3 bit)
access : read-write
EM3 : When the TC doesn't match MR3 and EMC3 is not 0, this bit will drive the state of CT16Bn_PWM3 output.
bits : 3 - 6 (4 bit)
access : read-write
EM4 : When the TC doesn't match MR4 and EMC4 is not 0, this bit will drive the state of CT16Bn_PWM4 output.
bits : 4 - 8 (5 bit)
access : read-write
EM5 : When the TC doesn't match MR5 and EMC5 is not 0, this bit will drive the state of CT16Bn_PWM5 output.
bits : 5 - 10 (6 bit)
access : read-write
EM6 : When the TC doesn't match MR6 and EMC6 is not 0, this bit will drive the state of CT16Bn_PWM6 output.
bits : 6 - 12 (7 bit)
access : read-write
EM7 : When the TC doesn't match MR7 and EMC7 is not 0, this bit will drive the state of CT16Bn_PWM7 output.
bits : 7 - 14 (8 bit)
access : read-write
EM8 : When the TC doesn't match MR8 and EMC8 is not 0, this bit will drive the state of CT16Bn_PWM8 output.
bits : 8 - 16 (9 bit)
access : read-write
EM9 : When the TC doesn't match MR9 and EMC9 is not 0, this bit will drive the state of CT16Bn_PWM9 output.
bits : 9 - 18 (10 bit)
access : read-write
EM10 : When the TC doesn't match MR10 and EMC10 is not 0, this bit will drive the state of CT16Bn_PWM10 output.
bits : 10 - 20 (11 bit)
access : read-write
EM11 : When the TC doesn't match MR11 and EMC11 is not 0, this bit will drive the state of CT16Bn_PWM11 output.
bits : 11 - 22 (12 bit)
access : read-write
EM12 : When the TC doesn't match MR12 and EMC12 is not 0, this bit will drive the state of CT16Bn_PWM12 output.
bits : 12 - 24 (13 bit)
access : read-write
EM13 : When the TC doesn't match MR13 and EMC13 is not 0, this bit will drive the state of CT16Bn_PWM13 output.
bits : 13 - 26 (14 bit)
access : read-write
EM14 : When the TC doesn't match MR14 and EMC14 is not 0, this bit will drive the state of CT16Bn_PWM14 output.
bits : 14 - 28 (15 bit)
access : read-write
EM15 : When the TC doesn't match MR15 and EMC15 is not 0, this bit will drive the state of CT16Bn_PWM15 output.
bits : 15 - 30 (16 bit)
access : read-write
EM16 : When the TC doesn't match MR16 and EMC16 is not 0, this bit will drive the state of CT16Bn_PWM16 output.
bits : 16 - 32 (17 bit)
access : read-write
EM17 : When the TC doesn't match MR17 and EMC17 is not 0, this bit will drive the state of CT16Bn_PWM17 output.
bits : 17 - 34 (18 bit)
access : read-write
EM18 : When the TC doesn't match MR18 and EMC18 is not 0, this bit will drive the state of CT16Bn_PWM18 output.
bits : 18 - 36 (19 bit)
access : read-write
EM19 : When the TC doesn't match MR19 and EMC19 is not 0, this bit will drive the state of CT16Bn_PWM19 output.
bits : 19 - 38 (20 bit)
access : read-write
EM20 : When the TC doesn't match MR20 and EMC20 is not 0, this bit will drive the state of CT16Bn_PWM20 output.
bits : 20 - 40 (21 bit)
access : read-write
EM21 : When the TC doesn't match MR21 and EMC21 is not 0, this bit will drive the state of CT16Bn_PWM21 output.
bits : 21 - 42 (22 bit)
access : read-write
EM22 : When the TC doesn't match MR22 and EMC22 is not 0, this bit will drive the state of CT16Bn_PWM22 output.
bits : 22 - 44 (23 bit)
access : read-write
EM23 : When the TC doesn't match MR23 and EMC23 is not 0, this bit will drive the state of CT16Bn_PWM23 output.
bits : 23 - 46 (24 bit)
access : read-write
Offset:0x8C CT16Bn External Match Control register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EMC0 : CT16Bn_PWM0 functionality when the TC matches MR0
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM0 pin is LOW
2 : High
CT16Bn_PWM0 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM0 pin
End of enumeration elements list.
EMC1 : CT16Bn_PWM1 functionality when the TC matches MR1
bits : 2 - 5 (4 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM1 pin is LOW
2 : High
CT16Bn_PWM1 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM1 pin
End of enumeration elements list.
EMC2 : CT16Bn_PWM2 functionality when the TC matches MR2
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM2 pin is LOW
2 : High
CT16Bn_PWM2 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM2 pin
End of enumeration elements list.
EMC3 : CT16Bn_PWM3 functionality when the TC matches MR3
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM3 pin is LOW
2 : High
CT16Bn_PWM3 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM3 pin
End of enumeration elements list.
EMC4 : CT16Bn_PWM4 functionality when the TC matches MR4
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM4 pin is LOW
2 : High
CT16Bn_PWM4 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM4 pin
End of enumeration elements list.
EMC5 : CT16Bn_PWM5 functionality when the TC matches MR5
bits : 10 - 21 (12 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM5 pin is LOW
2 : High
CT16Bn_PWM5 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM5 pin
End of enumeration elements list.
EMC6 : CT16Bn_PWM6 functionality when the TC matches MR6
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM6 pin is LOW
2 : High
CT16Bn_PWM6 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM6 pin
End of enumeration elements list.
EMC7 : CT16Bn_PWM7 functionality when the TC matches MR7
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM7 pin is LOW
2 : High
CT16Bn_PWM7 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM7 pin
End of enumeration elements list.
EMC8 : CT16Bn_PWM8 functionality when the TC matches MR8
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM8 pin is LOW
2 : High
CT16Bn_PWM8 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM8 pin
End of enumeration elements list.
EMC9 : CT16Bn_PWM9 functionality when the TC matches MR9
bits : 18 - 37 (20 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM9 pin is LOW
2 : High
CT16Bn_PWM9 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM9 pin
End of enumeration elements list.
EMC10 : CT16Bn_PWM10 functionality when the TC matches MR10
bits : 20 - 41 (22 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM10 pin is LOW
2 : High
CT16Bn_PWM10 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM10 pin
End of enumeration elements list.
EMC11 : CT16Bn_PWM11 functionality when the TC matches MR11
bits : 22 - 45 (24 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM11 pin is LOW
2 : High
CT16Bn_PWM11 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM11 pin
End of enumeration elements list.
EMC12 : CT16Bn_PWM12 functionality when the TC matches MR12
bits : 24 - 49 (26 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM12 pin is LOW
2 : High
CT16Bn_PWM12 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM12 pin
End of enumeration elements list.
EMC13 : CT16Bn_PWM13 functionality when the TC matches MR13
bits : 26 - 53 (28 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM13 pin is LOW
2 : High
CT16Bn_PWM13 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM13 pin
End of enumeration elements list.
EMC14 : CT16Bn_PWM14 functionality when the TC matches MR14
bits : 28 - 57 (30 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM14 pin is LOW
2 : High
CT16Bn_PWM14 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM14 pin
End of enumeration elements list.
EMC15 : CT16Bn_PWM15 functionality when the TC matches MR15
bits : 30 - 61 (32 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM15 pin is LOW
2 : High
CT16Bn_PWM15 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM15 pin
End of enumeration elements list.
Offset:0x90 CT16Bn External Match Control register 2
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
EMC16 : CT16Bn_PWM16 functionality when the TC matches MR16
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM16 pin is LOW
2 : High
CT16Bn_PWM16 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM16 pin
End of enumeration elements list.
EMC17 : CT16Bn_PWM17 functionality when the TC matches MR17
bits : 2 - 5 (4 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM17 pin is LOW
2 : High
CT16Bn_PWM17 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM17 pin
End of enumeration elements list.
EMC18 : CT16Bn_PWM18 functionality when the TC matches MR18
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM18 pin is LOW
2 : High
CT16Bn_PWM18 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM18 pin
End of enumeration elements list.
EMC19 : CT16Bn_PWM19 functionality when the TC matches MR19
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM19 pin is LOW
2 : High
CT16Bn_PWM19 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM19 pin
End of enumeration elements list.
EMC20 : CT16Bn_PWM20 functionality when the TC matches MR20
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM20 pin is LOW
2 : High
CT16Bn_PWM20 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM20 pin
End of enumeration elements list.
EMC21 : CT16Bn_PWM21 functionality when the TC matches MR21
bits : 10 - 21 (12 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM21 pin is LOW
2 : High
CT16Bn_PWM21 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM21 pin
End of enumeration elements list.
EMC22 : CT16Bn_PWM22 functionality when the TC matches MR22
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM22 pin is LOW
2 : High
CT16Bn_PWM22 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM22 pin
End of enumeration elements list.
EMC23 : CT16Bn_PWM23 functionality when the TC matches MR23
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : Do Nothing
Do nothing
1 : Low
CT16Bn_PWM23 pin is LOW
2 : High
CT16Bn_PWM23 pin is HIGH
3 : Toggle
Toggle CT16Bn_PWM23 pin
End of enumeration elements list.
Offset:0x94 CT16Bn PWM Control Register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM0MODE : PWM0 output mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM0 is 0 when TC is less than MR0. During down-counting, PWM0 is 1 when TC is larger/equal than MR0
1 : PWM mode 2
During up-counting, PWM0 is 1 when TC is less than MR0. During down-counting, PWM0 is 0 when TC is larger/equal than MR0
2 : Force 0
PWM0 is forced to 0
3 : Force 1
PWM0 is forced to 1
End of enumeration elements list.
PWM1MODE : PWM1 output mode
bits : 2 - 5 (4 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM1 is 0 when TC is less than MR1. During down-counting, PWM1 is 1 when TC is larger/equal than MR1
1 : PWM mode 2
During up-counting, PWM1 is 1 when TC is less than MR1. During down-counting, PWM1 is 0 when TC is larger/equal than MR1
2 : Force 0
PWM1 is forced to 0
3 : Force 1
PWM1 is forced to 1
End of enumeration elements list.
PWM2MODE : PWM2 output mode
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM2 is 0 when TC is less than MR2. During down-counting, PWM2 is 1 when TC is larger/equal than MR2
1 : PWM mode 2
During up-counting, PWM2 is 1 when TC is less than MR2. During down-counting, PWM2 is 0 when TC is larger/equal than MR2
2 : Force 0
PWM2 is forced to 0
3 : Force 1
PWM2 is forced to 1
End of enumeration elements list.
PWM3MODE : PWM3 output mode
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM3 is 0 when TC is less than MR3. During down-counting, PWM3 is 1 when TC is larger/equal than MR3
1 : PWM mode 2
During up-counting, PWM3 is 1 when TC is less than MR3. During down-counting, PWM3 is 0 when TC is larger/equal than MR3
2 : Force 0
PWM3 is forced to 0
3 : Force 1
PWM3 is forced to 1
End of enumeration elements list.
PWM4MODE : PWM4 output mode
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM4 is 0 when TC is less than MR4. During down-counting, PWM4 is 1 when TC is larger/equal than MR4
1 : PWM mode 2
During up-counting, PWM4 is 1 when TC is less than MR4. During down-counting, PWM4 is 0 when TC is larger/equal than MR4
2 : Force 0
PWM4 is forced to 0
3 : Force 1
PWM4 is forced to 1
End of enumeration elements list.
PWM5MODE : PWM5 output mode
bits : 10 - 21 (12 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM5 is 0 when TC is less than MR5. During down-counting, PWM5 is 1 when TC is larger/equal than MR5
1 : PWM mode 2
During up-counting, PWM5 is 1 when TC is less than MR5. During down-counting, PWM5 is 0 when TC is larger/equal than MR5
2 : Force 0
PWM5 is forced to 0
3 : Force 1
PWM5 is forced to 1
End of enumeration elements list.
PWM6MODE : PWM6 output mode
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM6 is 0 when TC is less than MR6. During down-counting, PWM6 is 1 when TC is larger/equal than MR6
1 : PWM mode 2
During up-counting, PWM6 is 1 when TC is less than MR6. During down-counting, PWM6 is 0 when TC is larger/equal than MR6
2 : Force 0
PWM6 is forced to 0
3 : Force 1
PWM6 is forced to 1
End of enumeration elements list.
PWM7MODE : PWM7 output mode
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM7 is 0 when TC is less than MR7. During down-counting, PWM7 is 1 when TC is larger/equal than MR7
1 : PWM mode 2
During up-counting, PWM7 is 1 when TC is less than MR7. During down-counting, PWM7 is 0 when TC is larger/equal than MR7
2 : Force 0
PWM7 is forced to 0
3 : Force 1
PWM7 is forced to 1
End of enumeration elements list.
PWM8MODE : PWM8 output mode
bits : 16 - 33 (18 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM8 is 0 when TC is less than MR8. During down-counting, PWM8 is 1 when TC is larger/equal than MR8
1 : PWM mode 2
During up-counting, PWM8 is 1 when TC is less than MR8. During down-counting, PWM8 is 0 when TC is larger/equal than MR8
2 : Force 0
PWM8 is forced to 0
3 : Force 1
PWM8 is forced to 1
End of enumeration elements list.
PWM9MODE : PWM9 output mode
bits : 18 - 37 (20 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM9 is 0 when TC is less than MR9. During down-counting, PWM9 is 1 when TC is larger/equal than MR9
1 : PWM mode 2
During up-counting, PWM9 is 1 when TC is less than MR9. During down-counting, PWM9 is 0 when TC is larger/equal than MR9
2 : Force 0
PWM9 is forced to 0
3 : Force 1
PWM9 is forced to 1
End of enumeration elements list.
PWM10MODE : PWM10 output mode
bits : 20 - 41 (22 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM10 is 0 when TC is less than MR10. During down-counting, PWM10 is 1 when TC is larger/equal than MR10
1 : PWM mode 2
During up-counting, PWM10 is 1 when TC is less than MR10. During down-counting, PWM10 is 0 when TC is larger/equal than MR10
2 : Force 0
PWM10 is forced to 0
3 : Force 1
PWM10 is forced to 1
End of enumeration elements list.
PWM11MODE : PWM11 output mode
bits : 22 - 45 (24 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM11 is 0 when TC is less than MR11. During down-counting, PWM11 is 1 when TC is larger/equal than MR11
1 : PWM mode 2
During up-counting, PWM11 is 1 when TC is less than MR11. During down-counting, PWM11 is 0 when TC is larger/equal than MR11
2 : Force 0
PWM11 is forced to 0
3 : Force 1
PWM11 is forced to 1
End of enumeration elements list.
PWM12MODE : PWM12 output mode
bits : 24 - 49 (26 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM12 is 0 when TC is less than MR12. During down-counting, PWM12 is 1 when TC is larger/equal than MR12
1 : PWM mode 2
During up-counting, PWM12 is 1 when TC is less than MR12. During down-counting, PWM12 is 0 when TC is larger/equal than MR12
2 : Force 0
PWM12 is forced to 0
3 : Force 1
PWM12 is forced to 1
End of enumeration elements list.
PWM13MODE : PWM13 output mode
bits : 26 - 53 (28 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM13 is 0 when TC is less than MR13. During down-counting, PWM13 is 1 when TC is larger/equal than MR13
1 : PWM mode 2
During up-counting, PWM13 is 1 when TC is less than MR13. During down-counting, PWM13 is 0 when TC is larger/equal than MR13
2 : Force 0
PWM13 is forced to 0
3 : Force 1
PWM13 is forced to 1
End of enumeration elements list.
PWM14MODE : PWM14 output mode
bits : 28 - 57 (30 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM14 is 0 when TC is less than MR14. During down-counting, PWM14 is 1 when TC is larger/equal than MR14
1 : PWM mode 2
During up-counting, PWM14 is 1 when TC is less than MR14. During down-counting, PWM14 is 0 when TC is larger/equal than MR14
2 : Force 0
PWM14 is forced to 0
3 : Force 1
PWM14 is forced to 1
End of enumeration elements list.
PWM15MODE : PWM15 output mode
bits : 30 - 61 (32 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM15 is 0 when TC is less than MR15. During down-counting, PWM15 is 1 when TC is larger/equal than MR15
1 : PWM mode 2
During up-counting, PWM15 is 1 when TC is less than MR15. During down-counting, PWM15 is 0 when TC is larger/equal than MR15
2 : Force 0
PWM15 is forced to 0
3 : Force 1
PWM15 is forced to 1
End of enumeration elements list.
Offset:0x98 CT16Bn PWM Control Register 2
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM16MODE : PWM16 output mode
bits : 0 - 1 (2 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM16 is 0 when TC is less than MR16. During down-counting, PWM16 is 1 when TC is larger/equal than MR16
1 : PWM mode 2
During up-counting, PWM16 is 1 when TC is less than MR16. During down-counting, PWM16 is 0 when TC is larger/equal than MR16
2 : Force 0
PWM16 is forced to 0
3 : Force 1
PWM16 is forced to 1
End of enumeration elements list.
PWM17MODE : PWM17 output mode
bits : 2 - 5 (4 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM17 is 0 when TC is less than MR17. During down-counting, PWM17 is 1 when TC is larger/equal than MR17
1 : PWM mode 2
During up-counting, PWM17 is 1 when TC is less than MR17. During down-counting, PWM17 is 0 when TC is larger/equal than MR17
2 : Force 0
PWM17 is forced to 0
3 : Force 1
PWM17 is forced to 1
End of enumeration elements list.
PWM18MODE : PWM18 output mode
bits : 4 - 9 (6 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM18 is 0 when TC is less than MR18. During down-counting, PWM18 is 1 when TC is larger/equal than MR18
1 : PWM mode 2
During up-counting, PWM18 is 1 when TC is less than MR18. During down-counting, PWM18 is 0 when TC is larger/equal than MR18
2 : Force 0
PWM18 is forced to 0
3 : Force 1
PWM18 is forced to 1
End of enumeration elements list.
PWM19MODE : PWM19 output mode
bits : 6 - 13 (8 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM19 is 0 when TC is less than MR19. During down-counting, PWM19 is 1 when TC is larger/equal than MR19
1 : PWM mode 2
During up-counting, PWM19 is 1 when TC is less than MR19. During down-counting, PWM19 is 0 when TC is larger/equal than MR19
2 : Force 0
PWM19 is forced to 0
3 : Force 1
PWM19 is forced to 1
End of enumeration elements list.
PWM20MODE : PWM20 output mode
bits : 8 - 17 (10 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM20 is 0 when TC is less than MR20. During down-counting, PWM20 is 1 when TC is larger/equal than MR20
1 : PWM mode 2
During up-counting, PWM20 is 1 when TC is less than MR20. During down-counting, PWM20 is 0 when TC is larger/equal than MR20
2 : Force 0
PWM20 is forced to 0
3 : Force 1
PWM20 is forced to 1
End of enumeration elements list.
PWM21MODE : PWM21 output mode
bits : 10 - 21 (12 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM21 is 0 when TC is less than MR21. During down-counting, PWM21 is 1 when TC is larger/equal than MR21
1 : PWM mode 2
During up-counting, PWM21 is 1 when TC is less than MR21. During down-counting, PWM21 is 0 when TC is larger/equal than MR21
2 : Force 0
PWM21 is forced to 0
3 : Force 1
PWM21 is forced to 1
End of enumeration elements list.
PWM22MODE : PWM22 output mode
bits : 12 - 25 (14 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM22 is 0 when TC is less than MR22. During down-counting, PWM22 is 1 when TC is larger/equal than MR22
1 : PWM mode 2
During up-counting, PWM22 is 1 when TC is less than MR22. During down-counting, PWM22 is 0 when TC is larger/equal than MR22
2 : Force 0
PWM22 is forced to 0
3 : Force 1
PWM22 is forced to 1
End of enumeration elements list.
PWM23MODE : PWM23 output mode
bits : 14 - 29 (16 bit)
access : read-write
Enumeration:
0 : PWM mode 1
During up-counting, PWM23 is 0 when TC is less than MR23. During down-counting, PWM22 is 1 when TC is larger/equal than MR23
1 : PWM mode 2
During up-counting, PWM23 is 1 when TC is less than MR23. During down-counting, PWM22 is 0 when TC is larger/equal than MR23
2 : Force 0
PWM23 is forced to 0
3 : Force 1
PWM23 is forced to 1
End of enumeration elements list.
Offset:0x9C CT16Bn PWM Enable register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM0EN : PWM0 enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM0 is controlled by EMC0
1 : Enable
Enable PWM mode for CT16Bn_PWM0
End of enumeration elements list.
PWM1EN : PWM1 enable
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM1 is controlled by EMC1
1 : Enable
Enable PWM mode for CT16Bn_PWM1
End of enumeration elements list.
PWM2EN : PWM2 enable
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM2 is controlled by EMC2
1 : Enable
Enable PWM mode for CT16Bn_PWM2
End of enumeration elements list.
PWM3EN : PWM3 enable
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM3 is controlled by EMC3
1 : Enable
Enable PWM mode for CT16Bn_PWM3
End of enumeration elements list.
PWM4EN : PWM4 enable
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM4 is controlled by EMC4
1 : Enable
Enable PWM mode for CT16Bn_PWM4
End of enumeration elements list.
PWM5EN : PWM5 enable
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM5 is controlled by EMC5
1 : Enable
Enable PWM mode for CT16Bn_PWM5
End of enumeration elements list.
PWM6EN : PWM6 enable
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM6 is controlled by EMC6
1 : Enable
Enable PWM mode for CT16Bn_PWM6
End of enumeration elements list.
PWM7EN : PWM7 enable
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM7 is controlled by EMC7
1 : Enable
Enable PWM mode for CT16Bn_PWM7
End of enumeration elements list.
PWM8EN : PWM8 enable
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM8 is controlled by EMC8
1 : Enable
Enable PWM mode for CT16Bn_PWM8
End of enumeration elements list.
PWM9EN : PWM9 enable
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM9 is controlled by EMC9
1 : Enable
Enable PWM mode for CT16Bn_PWM9
End of enumeration elements list.
PWM10EN : PWM10 enable
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM10 is controlled by EMC10
1 : Enable
Enable PWM mode for CT16Bn_PWM10
End of enumeration elements list.
PWM11EN : PWM11 enable
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM11 is controlled by EMC11
1 : Enable
Enable PWM mode for CT16Bn_PWM11
End of enumeration elements list.
PWM12EN : PWM12 enable
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM12 is controlled by EMC12
1 : Enable
Enable PWM mode for CT16Bn_PWM12
End of enumeration elements list.
PWM13EN : PWM13 enable
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM13 is controlled by EMC13
1 : Enable
Enable PWM mode for CT16Bn_PWM13
End of enumeration elements list.
PWM14EN : PWM14 enable
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM14 is controlled by EMC14
1 : Enable
Enable PWM mode for CT16Bn_PWM14
End of enumeration elements list.
PWM15EN : PWM15 enable
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM15 is controlled by EMC15
1 : Enable
Enable PWM mode for CT16Bn_PWM15
End of enumeration elements list.
PWM16EN : PWM16 enable
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM16 is controlled by EMC16
1 : Enable
Enable PWM mode for CT16Bn_PWM16
End of enumeration elements list.
PWM17EN : PWM17 enable
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM17 is controlled by EMC17
1 : Enable
Enable PWM mode for CT16Bn_PWM17
End of enumeration elements list.
PWM18EN : PWM18 enable
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM18 is controlled by EMC18
1 : Enable
Enable PWM mode for CT16Bn_PWM18
End of enumeration elements list.
PWM19EN : PWM19 enable
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM19 is controlled by EMC19
1 : Enable
Enable PWM mode for CT16Bn_PWM19
End of enumeration elements list.
PWM20EN : PWM20 enable
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM20 is controlled by EMC20
1 : Enable
Enable PWM mode for CT16Bn_PWM20
End of enumeration elements list.
PWM21EN : PWM21 enable
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM21 is controlled by EMC21
1 : Enable
Enable PWM mode for CT16Bn_PWM21
End of enumeration elements list.
PWM22EN : PWM22 enable
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM22 is controlled by EMC22
1 : Enable
Enable PWM mode for CT16Bn_PWM22
End of enumeration elements list.
PWM23EN : PWM23 enable
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM23 is controlled by EMC23
1 : Enable
Enable PWM mode for CT16Bn_PWM23
End of enumeration elements list.
Offset:0xA0 CT16Bn PWM IO Enable register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PWM0IOEN : CT16Bn_PWM0/GPIO selection
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM0 pin is act as GPIO
1 : Enable
CT16Bn_PWM0 pin act as match output, and output depends on PWM0EN bit
End of enumeration elements list.
PWM1IOEN : CT16Bn_PWM1/GPIO selection
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM1 pin is act as GPIO
1 : Enable
CT16Bn_PWM1 pin act as match output, and output depends on PWM1EN bit
End of enumeration elements list.
PWM2IOEN : CT16Bn_PWM2/GPIO selection
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM2 pin is act as GPIO
1 : Enable
CT16Bn_PWM2 pin act as match output, and output depends on PWM2EN bit
End of enumeration elements list.
PWM3IOEN : CT16Bn_PWM3/GPIO selection
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM3 pin is act as GPIO
1 : Enable
CT16Bn_PWM3 pin act as match output, and output depends on PWM3EN bit
End of enumeration elements list.
PWM4IOEN : CT16Bn_PWM4/GPIO selection
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM4 pin is act as GPIO
1 : Enable
CT16Bn_PWM4 pin act as match output, and output depends on PWM4EN bit
End of enumeration elements list.
PWM5IOEN : CT16Bn_PWM5/GPIO selection
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM5 pin is act as GPIO
1 : Enable
CT16Bn_PWM5 pin act as match output, and output depends on PWM5EN bit
End of enumeration elements list.
PWM6IOEN : CT16Bn_PWM6/GPIO selection
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM6 pin is act as GPIO
1 : Enable
CT16Bn_PWM6 pin act as match output, and output depends on PWM6EN bit
End of enumeration elements list.
PWM7IOEN : CT16Bn_PWM7/GPIO selection
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM7 pin is act as GPIO
1 : Enable
CT16Bn_PWM7 pin act as match output, and output depends on PWM7EN bit
End of enumeration elements list.
PWM8IOEN : CT16Bn_PWM8/GPIO selection
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM8 pin is act as GPIO
1 : Enable
CT16Bn_PWM8 pin act as match output, and output depends on PWM8EN bit
End of enumeration elements list.
PWM9IOEN : CT16Bn_PWM9/GPIO selection
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM9 pin is act as GPIO
1 : Enable
CT16Bn_PWM9 pin act as match output, and output depends on PWM9EN bit
End of enumeration elements list.
PWM10IOEN : CT16Bn_PWM10/GPIO selection
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM10 pin is act as GPIO
1 : Enable
CT16Bn_PWM10 pin act as match output, and output depends on PWM10EN bit
End of enumeration elements list.
PWM11IOEN : CT16Bn_PWM11/GPIO selection
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM11 pin is act as GPIO
1 : Enable
CT16Bn_PWM11 pin act as match output, and output depends on PWM11EN bit
End of enumeration elements list.
PWM12IOEN : CT16Bn_PWM12/GPIO selection
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM12 pin is act as GPIO
1 : Enable
CT16Bn_PWM12 pin act as match output, and output depends on PWM12EN bit
End of enumeration elements list.
PWM13IOEN : CT16Bn_PWM13/GPIO selection
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM13 pin is act as GPIO
1 : Enable
CT16Bn_PWM13 pin act as match output, and output depends on PWM13EN bit
End of enumeration elements list.
PWM14IOEN : CT16Bn_PWM14/GPIO selection
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM14 pin is act as GPIO
1 : Enable
CT16Bn_PWM14 pin act as match output, and output depends on PWM14EN bit
End of enumeration elements list.
PWM15IOEN : CT16Bn_PWM15/GPIO selection
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM15 pin is act as GPIO
1 : Enable
CT16Bn_PWM15 pin act as match output, and output depends on PWM15EN bit
End of enumeration elements list.
PWM16IOEN : CT16Bn_PWM16/GPIO selection
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM16 pin is act as GPIO
1 : Enable
CT16Bn_PWM16 pin act as match output, and output depends on PWM16EN bit
End of enumeration elements list.
PWM17IOEN : CT16Bn_PWM17/GPIO selection
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM17 pin is act as GPIO
1 : Enable
CT16Bn_PWM17 pin act as match output, and output depends on PWM17EN bit
End of enumeration elements list.
PWM18IOEN : CT16Bn_PWM18/GPIO selection
bits : 18 - 36 (19 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM18 pin is act as GPIO
1 : Enable
CT16Bn_PWM18 pin act as match output, and output depends on PWM18EN bit
End of enumeration elements list.
PWM19IOEN : CT16Bn_PWM19/GPIO selection
bits : 19 - 38 (20 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM19 pin is act as GPIO
1 : Enable
CT16Bn_PWM19 pin act as match output, and output depends on PWM19EN bit
End of enumeration elements list.
PWM20IOEN : CT16Bn_PWM20/GPIO selection
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM20 pin is act as GPIO
1 : Enable
CT16Bn_PWM20 pin act as match output, and output depends on PWM20EN bit
End of enumeration elements list.
PWM21IOEN : CT16Bn_PWM21/GPIO selection
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM21 pin is act as GPIO
1 : Enable
CT16Bn_PWM21 pin act as match output, and output depends on PWM21EN bit
End of enumeration elements list.
PWM22IOEN : CT16Bn_PWM22/GPIO selection
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM22 pin is act as GPIO
1 : Enable
CT16Bn_PWM22 pin act as match output, and output depends on PWM22EN bit
End of enumeration elements list.
PWM23IOEN : CT16Bn_PWM23/GPIO selection
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : Disable
CT16Bn_PWM23 pin is act as GPIO
1 : Enable
CT16Bn_PWM23 pin act as match output, and output depends on PWM23EN bit
End of enumeration elements list.
Offset:0xA4 CT16Bn Raw Interrupt Status Register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MR0IF : Match channel 0 interrupt flag
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 0
1 : Met interrupt requirements
Interrupt requirements met on match channel 0
End of enumeration elements list.
MR1IF : Match channel 1 interrupt flag
bits : 1 - 2 (2 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 1
1 : Met interrupt requirements
Interrupt requirements met on match channel 1
End of enumeration elements list.
MR2IF : Match channel 2 interrupt flag
bits : 2 - 4 (3 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 2
1 : Met interrupt requirements
Interrupt requirements met on match channel 2
End of enumeration elements list.
MR3IF : Match channel 3 interrupt flag
bits : 3 - 6 (4 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 3
1 : Met interrupt requirements
Interrupt requirements met on match channel 3
End of enumeration elements list.
MR4IF : Match channel 4 interrupt flag
bits : 4 - 8 (5 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 4
1 : Met interrupt requirements
Interrupt requirements met on match channel 4
End of enumeration elements list.
MR5IF : Match channel 5 interrupt flag
bits : 5 - 10 (6 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 5
1 : Met interrupt requirements
Interrupt requirements met on match channel 5
End of enumeration elements list.
MR6IF : Match channel 6 interrupt flag
bits : 6 - 12 (7 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 6
1 : Met interrupt requirements
Interrupt requirements met on match channel 6
End of enumeration elements list.
MR7IF : Match channel 7 interrupt flag
bits : 7 - 14 (8 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 7
1 : Met interrupt requirements
Interrupt requirements met on match channel 7
End of enumeration elements list.
MR8IF : Match channel 8 interrupt flag
bits : 8 - 16 (9 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 8
1 : Met interrupt requirements
Interrupt requirements met on match channel 8
End of enumeration elements list.
MR9IF : Match channel 9 interrupt flag
bits : 9 - 18 (10 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 9
1 : Met interrupt requirements
Interrupt requirements met on match channel 9
End of enumeration elements list.
MR10IF : Match channel 10 interrupt flag
bits : 10 - 20 (11 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 10
1 : Met interrupt requirements
Interrupt requirements met on match channel 10
End of enumeration elements list.
MR11IF : Match channel 11 interrupt flag
bits : 11 - 22 (12 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 11
1 : Met interrupt requirements
Interrupt requirements met on match channel 11
End of enumeration elements list.
MR12IF : Match channel 12 interrupt flag
bits : 12 - 24 (13 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 12
1 : Met interrupt requirements
Interrupt requirements met on match channel 12
End of enumeration elements list.
MR13IF : Match channel 13 interrupt flag
bits : 13 - 26 (14 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 13
1 : Met interrupt requirements
Interrupt requirements met on match channel 13
End of enumeration elements list.
MR14IF : Match channel 14 interrupt flag
bits : 14 - 28 (15 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 14
1 : Met interrupt requirements
Interrupt requirements met on match channel 14
End of enumeration elements list.
MR15IF : Match channel 15 interrupt flag
bits : 15 - 30 (16 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 15
1 : Met interrupt requirements
Interrupt requirements met on match channel 15
End of enumeration elements list.
MR16IF : Match channel 16 interrupt flag
bits : 16 - 32 (17 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 16
1 : Met interrupt requirements
Interrupt requirements met on match channel 16
End of enumeration elements list.
MR17IF : Match channel 17 interrupt flag
bits : 17 - 34 (18 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 17
1 : Met interrupt requirements
Interrupt requirements met on match channel 17
End of enumeration elements list.
MR18IF : Match channel 18 interrupt flag
bits : 18 - 36 (19 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 18
1 : Met interrupt requirements
Interrupt requirements met on match channel 18
End of enumeration elements list.
MR19IF : Match channel 19 interrupt flag
bits : 19 - 38 (20 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 19
1 : Met interrupt requirements
Interrupt requirements met on match channel 19
End of enumeration elements list.
MR20IF : Match channel 20 interrupt flag
bits : 20 - 40 (21 bit)
access : read-only
Enumeration:
0 : No interrupt
No interrupt on match channel 20
1 : Met interrupt requirements
Interrupt requirements met on match channel 20
End of enumeration elements list.
MR21IF : Match channel 21 interrupt flag
bits : 21 - 42 (22 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 21
1 : Met interrupt requirements
Interrupt requirements met on match channel 21
End of enumeration elements list.
MR22IF : Match channel 22 interrupt flag
bits : 22 - 44 (23 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 22
1 : Met interrupt requirements
Interrupt requirements met on match channel 22
End of enumeration elements list.
MR23IF : Match channel 23 interrupt flag
bits : 23 - 46 (24 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 23
1 : Met interrupt requirements
Interrupt requirements met on match channel 23
End of enumeration elements list.
MR24IF : Match channel 24 interrupt flag
bits : 24 - 48 (25 bit)
access : read-only
Enumeration:
0 : No
No interrupt on match channel 24
1 : Met interrupt requirements
Interrupt requirements met on match channel 24
End of enumeration elements list.
Offset:0xA8 CT16Bn Interrupt Clear Register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
MR0IC : MR0IF clear bit
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR0IF
End of enumeration elements list.
MR1IC : MR1IF clear bit
bits : 1 - 2 (2 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR1IF
End of enumeration elements list.
MR2IC : MR2IF clear bit
bits : 2 - 4 (3 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR2IF
End of enumeration elements list.
MR3IC : MR3IF clear bit
bits : 3 - 6 (4 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR3IF
End of enumeration elements list.
MR4IC : MR4IF clear bit
bits : 4 - 8 (5 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR4IF
End of enumeration elements list.
MR5IC : MR5IF clear bit
bits : 5 - 10 (6 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR5IF
End of enumeration elements list.
MR6IC : MR6IF clear bit
bits : 6 - 12 (7 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR6IF
End of enumeration elements list.
MR7IC : MR7IF clear bit
bits : 7 - 14 (8 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR7IF
End of enumeration elements list.
MR8IC : MR8IF clear bit
bits : 8 - 16 (9 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR8IF
End of enumeration elements list.
MR9IC : MR9IF clear bit
bits : 9 - 18 (10 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR9IF
End of enumeration elements list.
MR10IC : MR10IF clear bit
bits : 10 - 20 (11 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR10IF
End of enumeration elements list.
MR11IC : MR11IF clear bit
bits : 11 - 22 (12 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR11IF
End of enumeration elements list.
MR12IC : MR12IF clear bit
bits : 12 - 24 (13 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR12IF
End of enumeration elements list.
MR13IC : MR13IF clear bit
bits : 13 - 26 (14 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR13IF
End of enumeration elements list.
MR14IC : MR14IF clear bit
bits : 14 - 28 (15 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR14IF
End of enumeration elements list.
MR15IC : MR15IF clear bit
bits : 15 - 30 (16 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR15IF
End of enumeration elements list.
MR16IC : MR16IF clear bit
bits : 16 - 32 (17 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR16IF
End of enumeration elements list.
MR17IC : MR17IF clear bit
bits : 17 - 34 (18 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR17IF
End of enumeration elements list.
MR18IC : MR18IF clear bit
bits : 18 - 36 (19 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR18IF
End of enumeration elements list.
MR19IC : MR19IF clear bit
bits : 19 - 38 (20 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR19IF
End of enumeration elements list.
MR20IC : MR20IF clear bit
bits : 20 - 40 (21 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR20IF
End of enumeration elements list.
MR21IC : MR21IF clear bit
bits : 21 - 42 (22 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR21IF
End of enumeration elements list.
MR22IC : MR22IF clear bit
bits : 22 - 44 (23 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR22IF
End of enumeration elements list.
MR23IC : MR23IF clear bit
bits : 23 - 46 (24 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR23IF
End of enumeration elements list.
MR24IC : MR24IF clear bit
bits : 24 - 48 (25 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear MR24IF
End of enumeration elements list.
Offset:0x0C CT16Bn Prescale Counter Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC : Prescaler Counter
bits : 0 - 7 (8 bit)
access : read-write
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