Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 AHB Clock Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIOCLKEN : Enable AHB clock for GPIO
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
LCDCLKEN : Enable AHB clock for LCD
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT16B0CLKEN : Enable AHB clock for CT16B0
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT16B1CLKEN : Enable AHB clock for CT16B1
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT16B2CLKEN : Enable AHB clock for CT16B2
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT32B0CLKEN : Enable AHB clock for CT32B0
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT32B1CLKEN : Enable AHB clock for CT32B1
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT32B2CLKEN : Enable AHB clock for CT32B2
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
ADCCLKEN : Enable AHB clock for ADC
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
SSP0CLKEN : Enable AHB clock for SSP0
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
SSP1CLKEN : Enable AHB clock for SSP1
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
USART0CLKEN : Enable AHB clock for USART0
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
USART1CLKEN : Enable AHB clock for USART1
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
I2C1CLKEN : Enable AHB clock for I2C1
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
I2C0CLKEN : Enable AHB clock for I2C0
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
I2SCLKEN : Enable AHB clock for I2S
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
RTCCLKEN : Enable AHB clock for RTC
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
WDTCLKEN : Enable AHB clock for WDT
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CLKOUTSEL : Clock output source selection
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : 000b
Disable
1 : 001b
ILRC
2 : 010b
ELS XTAL
4 : 100b
HCLK
5 : 101b
IHRC
6 : 110b
EHS XTAL
7 : 111b
PLL output
End of enumeration elements list.
Offset:0x10 Peripheral Reset Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GPIO0RST : GPIO0 Reset
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset GPIO0
End of enumeration elements list.
GPIO1RST : GPIO1 Reset
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset GPIO1
End of enumeration elements list.
GPIO2RST : GPIO2 Reset
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset GPIO2
End of enumeration elements list.
GPIO3RST : GPIO3 Reset
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset GPIO3
End of enumeration elements list.
CT16B0RST : CT16B0 Reset
bits : 5 - 10 (6 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT16B0
End of enumeration elements list.
CT16B1RST : CT16B1 Reset
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT16B1
End of enumeration elements list.
CT16B2RST : CT16B2 Reset
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT16B2
End of enumeration elements list.
CT32B0RST : CT32B0 Reset
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT32B0
End of enumeration elements list.
CT32B1RST : CT32B1 Reset
bits : 9 - 18 (10 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT32B1
End of enumeration elements list.
CT32B2RST : CT32B2 Reset
bits : 10 - 20 (11 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset CT32B2
End of enumeration elements list.
ADCRST : ADC Reset
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset ADC
End of enumeration elements list.
SSP0RST : SSP0 Reset
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset SSP0
End of enumeration elements list.
SSP1RST : SSP1 Reset
bits : 13 - 26 (14 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset SSP1
End of enumeration elements list.
LCDRST : LCD Reset
bits : 15 - 30 (16 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset LCD
End of enumeration elements list.
USART0RST : USART0 Reset
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset USART0
End of enumeration elements list.
USART1RST : USART1 Reset
bits : 17 - 34 (18 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset USART1
End of enumeration elements list.
I2C1RST : I2C1 Reset
bits : 20 - 40 (21 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset I2C1
End of enumeration elements list.
I2C0RST : I2C0 Reset
bits : 21 - 42 (22 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset I2C0
End of enumeration elements list.
I2SRST : I2S Reset
bits : 22 - 44 (23 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset I2S
End of enumeration elements list.
RTCRST : RTC Reset
bits : 23 - 46 (24 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset RTC
End of enumeration elements list.
WDTRST : WDT Reset
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : 0
No effect
1 : 1
Reset WDT
End of enumeration elements list.
Offset:0x20 Divider Dividend Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x24 Divider Dividend Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x28 Divider Quotient Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Offset:0x2C Divider Remainder Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Offset:0x30 Divider Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
DIVS : Divider start control bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Idle
Divider stops/finishes operation
1 : Start
Start to execute Dividing
End of enumeration elements list.
Offset:0x04 APB Clock Prescale Register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CT16B0PRE : CT16B0 APB clock source prescaler
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
CT16B1PRE : CT16B1 APB clock source prescaler
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
CT32B0PRE : CT32B0 APB clock source prescaler
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
CT32B1PRE : CT32B1 APB clock source prescaler
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
ADCPRE : ADC APB clock source prescaler
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
SSP0PRE : SSP0 APB clock source prescaler
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
SSP1PRE : SSP1 APB clock source prescaler
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
CT32B2PRE : CT32B2 APB clock source prescaler
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
Offset:0x08 APB Clock Prescale Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
USART0PRE : USART0 APB clock source prescaler
bits : 0 - 2 (3 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
USART1PRE : USART1 APB clock source prescaler
bits : 4 - 10 (7 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
I2C0PRE : I2C0 APB clock source prescaler
bits : 8 - 18 (11 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
I2SPRE : I2S APB clock source prescaler
bits : 12 - 26 (15 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
7 : 111b
HCLK/3
End of enumeration elements list.
WDTPRE : WDT APB clock source prescaler
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
0 : 000b
WDT_PCLK = WDT clock source / 1
1 : 001b
WDT_PCLK = WDT clock source / 2
2 : 010b
WDT_PCLK = WDT clock source / 4
3 : 011b
WDT_PCLK = WDT clock source / 8
4 : 100b
WDT_PCLK = WDT clock source / 16
5 : 101b
WDT_PCLK = WDT clock source / 32
End of enumeration elements list.
I2C1PRE : I2C1 APB clock source prescaler
bits : 24 - 50 (27 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
CT16B2PRE : CT16B2 APB clock source prescaler
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
Offset:0x0C APB Clock Prescale Register 2
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKOUTPRE : CLKOUT APB clock source prescaler
bits : 0 - 3 (4 bit)
access : read-write
Enumeration:
0 : 0000b
FCLKOUT/1
1 : 0001b
FCLKOUT/2
2 : 0010b
FCLKOUT/4
3 : 0011b
FCLKOUT/8
4 : 0100b
FCLKOUT/16
5 : 0101b
FCLKOUT/32
6 : 0110b
FCLKOUT/64
7 : 0111b
FCLKOUT/128
8 : 1000b
FCLKOUT/256
9 : 1001b
FCLKOUT/512
End of enumeration elements list.
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