Embeetle, an IDE designed from scratch for embedded software developers.address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 AHB Clock Enable Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
P0CLKEN : Enable AHB clock for P0
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
P1CLKEN : Enable AHB clock for P1
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
P2CLKEN : Enable AHB clock for P2
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT16B0CLKEN : Enable AHB clock for CT16B0
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CT16B1CLKEN : Enable AHB clock for CT16B1
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
ADCCLKEN : Enable AHB clock for ADC
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CMPCLKEN : Enable AHB clock for CMP
bits : 14 - 28 (15 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
UART0CLKEN : Enable AHB clock for UART0
bits : 16 - 32 (17 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
WDTCLKEN : Enable AHB clock for WDT
bits : 24 - 48 (25 bit)
access : read-write
Enumeration:
0 : Disable
Disable
1 : Enable
Enable
End of enumeration elements list.
CLKOUTSEL : Clock output source selection
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : 000b
Disable
1 : 001b
ILRC
4 : 100b
HCLK
5 : 101b
IHRC
End of enumeration elements list.
Offset:0x04 APB Clock Prescale Register 0
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ADCPRE : ADC APB clock source prescaler
bits : 16 - 34 (19 bit)
access : read-write
Enumeration:
0 : 000b
HCLK/1
1 : 001b
HCLK/2
2 : 010b
HCLK/4
3 : 011b
HCLK/8
4 : 100b
HCLK/16
End of enumeration elements list.
Offset:0x08 APB Clock Prescale Register 1
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
WDTPRE : WDT APB clock source prescaler
bits : 20 - 42 (23 bit)
access : read-write
Enumeration:
0 : 000b
WDT_PCLK = WDT clock source / 1
1 : 001b
WDT_PCLK = WDT clock source / 2
2 : 010b
WDT_PCLK = WDT clock source / 4
3 : 011b
WDT_PCLK = WDT clock source / 8
4 : 100b
WDT_PCLK = WDT clock source / 16
5 : 101b
WDT_PCLK = WDT clock source / 32
End of enumeration elements list.
CLKOUTPRE : CLKOUT APB clock source prescaler
bits : 28 - 58 (31 bit)
access : read-write
Enumeration:
0 : 000b
FCLKOUT/1
1 : 001b
FCLKOUT/2
2 : 010b
FCLKOUT/4
3 : 011b
FCLKOUT/8
4 : 100b
FCLKOUT/16
5 : 101b
FCLKOUT/32
6 : 110b
FCLKOUT/64
7 : 111b
FCLKOUT/128
End of enumeration elements list.
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