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FLASH

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

LPCTRL

ADDR

CHKSUM

STATUS

CTRL

DATA


LPCTRL

Offset:0x00 Flash Low Power Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

LPCTRL LPCTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 LPMODE FMCKEY

LPMODE : Flash Low Power mode selection bit
bits : 0 - 3 (4 bit)
access : read-write

Enumeration:

0 : 0000b

HCLK is less than or equal to 12MHz

3 : 0011b

HCLK is more than 12MHz, and less than or equal to 24MHz

5 : 0101b

HCLK is more than 24MHz

End of enumeration elements list.

FMCKEY : FMC verify key
bits : 16 - 47 (32 bit)
access : write-only


ADDR

Offset:0x10 Flash Address Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ADDR ADDR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ADDR

ADDR : Flash Address
bits : 0 - 31 (32 bit)
access : read-write


CHKSUM

Offset:0x14 Flash Checksum Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CHKSUM CHKSUM read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UserROM

UserROM : Checksum of User ROM
bits : 0 - 15 (16 bit)
access : read-only


STATUS

Offset:0x04 Flash Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STATUS STATUS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BUSY ERR

BUSY : Busy flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : Idle

FMC is idle

1 : Busy

Flash operation is in process

End of enumeration elements list.

ERR : Erase/Error flag
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : No error

No error

1 : Error

The address is illegal or over page boundary

End of enumeration elements list.


CTRL

Offset:0x08 Flash Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CTRL CTRL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PG PER MER START CHK

PG : Flash program mode chosen bit
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Disable

Disable Flash program mode

1 : Enable

Enable Flash program mode

End of enumeration elements list.

PER : Page erase mode chosen bit
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Disable

Disable page erase mode

1 : Enable

Enable page erase mode

End of enumeration elements list.

MER : Mass erase mode chosen bit
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Disable

Disable masse erase mode

1 : Enable

Enable mass erase mode

End of enumeration elements list.

START : Start erase/program operation
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : 0

Stop/finish operation

1 : 1

Start erase/program operation

End of enumeration elements list.

CHK : Checksum calculation chosen
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

Disable

1 : Enable

Trigger checksum calculation

End of enumeration elements list.


DATA

Offset:0x0C Flash Data Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA

DATA : Data to be programmed or be read
bits : 0 - 31 (32 bit)
access : read-write



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