\n

GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DATA

IBS

IEV

IE

RIS

IC

BSET

BCLR

MODE

CFG

IS


DATA

Offset:0x00 GPIO Port n Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15

DATA0 : Data of Pn.0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : 0

Pn.0 is 0

1 : 1

Pn.0 is 1

End of enumeration elements list.

DATA1 : Data of Pn.1
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : 0

Pn.1 is 0

1 : 1

Pn.1 is 1

End of enumeration elements list.

DATA2 : Data of Pn.2
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : 0

Pn.2 is 0

1 : 1

Pn.2 is 1

End of enumeration elements list.

DATA3 : Data of Pn.3
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : 0

Pn.3 is 0

1 : 1

Pn.3 is 1

End of enumeration elements list.

DATA4 : Data of Pn.4
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : 0

Pn.4 is 0

1 : 1

Pn.4 is 1

End of enumeration elements list.

DATA5 : Data of Pn.5
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : 0

Pn.5 is 0

1 : 1

Pn.5 is 1

End of enumeration elements list.

DATA6 : Data of Pn.6
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : 0

Pn.6 is 0

1 : 1

Pn.6 is 1

End of enumeration elements list.

DATA7 : Data of Pn.7
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : 0

Pn.7 is 0

1 : 1

Pn.7 is 1

End of enumeration elements list.

DATA8 : Data of Pn.8
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : 0

Pn.8 is 0

1 : 1

Pn.8 is 1

End of enumeration elements list.

DATA9 : Data of Pn.9
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : 0

Pn.9 is 0

1 : 1

Pn.9 is 1

End of enumeration elements list.

DATA10 : Data of Pn.10
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : 0

Pn.10 is 0

1 : 1

Pn.10 is 1

End of enumeration elements list.

DATA11 : Data of Pn.11
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : 0

Pn.11 is 0

1 : 1

Pn.11 is 1

End of enumeration elements list.

DATA12 : Data of Pn.12
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : 0

Pn.12 is 0

1 : 1

Pn.12 is 1

End of enumeration elements list.

DATA13 : Data of Pn.13
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : 0

Pn.13 is 0

1 : 1

Pn.13 is 1

End of enumeration elements list.

DATA14 : Data of Pn.14
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : 0

Pn.14 is 0

1 : 1

Pn.14 is 1

End of enumeration elements list.

DATA15 : Data of Pn.15
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : 0

Pn.15 is 0

1 : 1

Pn.15 is 1

End of enumeration elements list.


IBS

Offset:0x10 GPIO Port n Interrupt Both-edge Sense Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IBS IBS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IBS0 IBS1 IBS2 IBS3 IBS4 IBS5 IBS6 IBS7 IBS8 IBS9 IBS10 IBS11 IBS12 IBS13 IBS14 IBS15

IBS0 : Interrupt on Pn.0 is triggered ob both edges
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.0 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.0 trigger an interrupt

End of enumeration elements list.

IBS1 : Interrupt on Pn.1 is triggered ob both edges
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.1 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.1 trigger an interrupt

End of enumeration elements list.

IBS2 : Interrupt on Pn.2 is triggered ob both edges
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.2 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.2 trigger an interrupt

End of enumeration elements list.

IBS3 : Interrupt on Pn.3 is triggered ob both edges
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.3 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.3 trigger an interrupt

End of enumeration elements list.

IBS4 : Interrupt on Pn.4 is triggered ob both edges
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.4 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.4 trigger an interrupt

End of enumeration elements list.

IBS5 : Interrupt on Pn.5 is triggered ob both edges
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.5 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.5 trigger an interrupt

End of enumeration elements list.

IBS6 : Interrupt on Pn.6 is triggered ob both edges
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.6 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.6 trigger an interrupt

End of enumeration elements list.

IBS7 : Interrupt on Pn.7 is triggered ob both edges
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.7 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.7 trigger an interrupt

End of enumeration elements list.

IBS8 : Interrupt on Pn.8 is triggered ob both edges
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.8 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.8 trigger an interrupt

End of enumeration elements list.

IBS9 : Interrupt on Pn.9 is triggered ob both edges
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.9 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.9 trigger an interrupt

End of enumeration elements list.

IBS10 : Interrupt on Pn.10 is triggered ob both edges
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.10 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.10 trigger an interrupt

End of enumeration elements list.

IBS11 : Interrupt on Pn.11 is triggered ob both edges
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.11 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.11 trigger an interrupt

End of enumeration elements list.

IBS12 : Interrupt on Pn.12 is triggered ob both edges
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.12 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.12 trigger an interrupt

End of enumeration elements list.

IBS13 : Interrupt on Pn.13 is triggered ob both edges
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.13 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.13 trigger an interrupt

End of enumeration elements list.

IBS14 : Interrupt on Pn.14 is triggered ob both edges
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.14 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.14 trigger an interrupt

End of enumeration elements list.

IBS15 : Interrupt on Pn.15 is triggered ob both edges
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : IEV

Interrupt on Pn.15 is controlled by GPIOn_IEV register

1 : Both edge

Both edges on Pn.15 trigger an interrupt

End of enumeration elements list.


IEV

Offset:0x14 GPIO Port n Interrupt Event Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEV IEV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IEV0 IEV1 IEV2 IEV3 IEV4 IEV5 IEV6 IEV7 IEV8 IEV9 IEV10 IEV11 IEV12 IEV13 IEV14 IEV15

IEV0 : Interrupt trigged evnet on Pn.0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.0 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.0 triggers an interrupt

End of enumeration elements list.

IEV1 : Interrupt trigged evnet on Pn.1
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.1 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.1 triggers an interrupt

End of enumeration elements list.

IEV2 : Interrupt trigged evnet on Pn.2
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.2 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.2 triggers an interrupt

End of enumeration elements list.

IEV3 : Interrupt trigged evnet on Pn.3
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.3 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.3 triggers an interrupt

End of enumeration elements list.

IEV4 : Interrupt trigged evnet on Pn.4
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.4 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.4 triggers an interrupt

End of enumeration elements list.

IEV5 : Interrupt trigged evnet on Pn.5
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.5 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.5 triggers an interrupt

End of enumeration elements list.

IEV6 : Interrupt trigged evnet on Pn.6
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.6 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.6 triggers an interrupt

End of enumeration elements list.

IEV7 : Interrupt trigged evnet on Pn.7
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.7 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.7 triggers an interrupt

End of enumeration elements list.

IEV8 : Interrupt trigged evnet on Pn.8
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.8 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.8 triggers an interrupt

End of enumeration elements list.

IEV9 : Interrupt trigged evnet on Pn.9
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.9 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.9 triggers an interrupt

End of enumeration elements list.

IEV10 : Interrupt trigged evnet on Pn.10
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.10 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.10 triggers an interrupt

End of enumeration elements list.

IEV11 : Interrupt trigged evnet on Pn.11
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.11 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.11 triggers an interrupt

End of enumeration elements list.

IEV12 : Interrupt trigged evnet on Pn.12
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.12 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.12 triggers an interrupt

End of enumeration elements list.

IEV13 : Interrupt trigged evnet on Pn.13
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.13 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.13 triggers an interrupt

End of enumeration elements list.

IEV14 : Interrupt trigged evnet on Pn.14
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.14 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.14 triggers an interrupt

End of enumeration elements list.

IEV15 : Interrupt trigged evnet on Pn.15
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : 0

Rising edge or High level on Pn.15 triggers an interrupt

1 : 1

Falling edge or Low level on Pn.15 triggers an interrupt

End of enumeration elements list.


IE

Offset:0x18 GPIO Port n Interrupt Enable Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IE0 IE1 IE2 IE3 IE4 IE5 IE6 IE7 IE8 IE9 IE10 IE11 IE12 IE13 IE14 IE15

IE0 : Interrupt on Pn.0 enable
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.0

1 : Enable

Enable interrupt on Pn.0

End of enumeration elements list.

IE1 : Interrupt on Pn.1 enable
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.1

1 : Enable

Enable interrupt on Pn.1

End of enumeration elements list.

IE2 : Interrupt on Pn.2 enable
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.2

1 : Enable

Enable interrupt on Pn.2

End of enumeration elements list.

IE3 : Interrupt on Pn.3 enable
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.3

1 : Enable

Enable interrupt on Pn.3

End of enumeration elements list.

IE4 : Interrupt on Pn.4 enable
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.4

1 : Enable

Enable interrupt on Pn.4

End of enumeration elements list.

IE5 : Interrupt on Pn.5 enable
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.5

1 : Enable

Enable interrupt on Pn.5

End of enumeration elements list.

IE6 : Interrupt on Pn.6 enable
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.6

1 : Enable

Enable interrupt on Pn.6

End of enumeration elements list.

IE7 : Interrupt on Pn.7 enable
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.7

1 : Enable

Enable interrupt on Pn.7

End of enumeration elements list.

IE8 : Interrupt on Pn.8 enable
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.8

1 : Enable

Enable interrupt on Pn.8

End of enumeration elements list.

IE9 : Interrupt on Pn.9 enable
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.9

1 : Enable

Enable interrupt on Pn.9

End of enumeration elements list.

IE10 : Interrupt on Pn.10 enable
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.10

1 : Enable

Enable interrupt on Pn.10

End of enumeration elements list.

IE11 : Interrupt on Pn.11 enable
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.11

1 : Enable

Enable interrupt on Pn.11

End of enumeration elements list.

IE12 : Interrupt on Pn.11 enable
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.12

1 : Enable

Enable interrupt on Pn.12

End of enumeration elements list.

IE13 : Interrupt on Pn.13 enable
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.13

1 : Enable

Enable interrupt on Pn.13

End of enumeration elements list.

IE14 : Interrupt on Pn.14 enable
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.14

1 : Enable

Enable interrupt on Pn.14

End of enumeration elements list.

IE15 : Interrupt on Pn.15 enable
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : Disable

Disable interrupt on Pn.15

1 : Enable

Enable interrupt on Pn.15

End of enumeration elements list.


RIS

Offset:0x1C GPIO Port n Raw Interrupt Status Register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

RIS RIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IF0 IF1 IF2 IF3 IF4 IF5 IF6 IF7 IF8 IF9 IF10 IF11 IF12 IF13 IF14 IF15

IF0 : Pn.0 raw interrupt flag
bits : 0 - 0 (1 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.0

1 : 1

Interrupt requirements met on Pn.0

End of enumeration elements list.

IF1 : Pn.1 raw interrupt flag
bits : 1 - 2 (2 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.1

1 : 1

Interrupt requirements met on Pn.1

End of enumeration elements list.

IF2 : Pn.2 raw interrupt flag
bits : 2 - 4 (3 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.2

1 : 1

Interrupt requirements met on Pn.2

End of enumeration elements list.

IF3 : Pn.3 raw interrupt flag
bits : 3 - 6 (4 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.3

1 : 1

Interrupt requirements met on Pn.3

End of enumeration elements list.

IF4 : Pn.4 raw interrupt flag
bits : 4 - 8 (5 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.4

1 : 1

Interrupt requirements met on Pn.4

End of enumeration elements list.

IF5 : Pn.5 raw interrupt flag
bits : 5 - 10 (6 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.5

1 : 1

Interrupt requirements met on Pn.5

End of enumeration elements list.

IF6 : Pn.6 raw interrupt flag
bits : 6 - 12 (7 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.6

1 : 1

Interrupt requirements met on Pn.6

End of enumeration elements list.

IF7 : Pn.7 raw interrupt flag
bits : 7 - 14 (8 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.7

1 : 1

Interrupt requirements met on Pn.7

End of enumeration elements list.

IF8 : Pn.8 raw interrupt flag
bits : 8 - 16 (9 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.8

1 : 1

Interrupt requirements met on Pn.8

End of enumeration elements list.

IF9 : Pn.9 raw interrupt flag
bits : 9 - 18 (10 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.9

1 : 1

Interrupt requirements met on Pn.9

End of enumeration elements list.

IF10 : Pn.10 raw interrupt flag
bits : 10 - 20 (11 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.10

1 : 1

Interrupt requirements met on Pn.10

End of enumeration elements list.

IF11 : Pn.11 raw interrupt flag
bits : 11 - 22 (12 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.11

1 : 1

Interrupt requirements met on Pn.11

End of enumeration elements list.

IF12 : Pn.12 raw interrupt flag
bits : 12 - 24 (13 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.12

1 : 1

Interrupt requirements met on Pn.12

End of enumeration elements list.

IF13 : Pn.13 raw interrupt flag
bits : 13 - 26 (14 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.13

1 : 1

Interrupt requirements met on Pn.13

End of enumeration elements list.

IF14 : Pn.14 raw interrupt flag
bits : 14 - 28 (15 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.14

1 : 1

Interrupt requirements met on Pn.14

End of enumeration elements list.

IF15 : Pn.15 raw interrupt flag
bits : 15 - 30 (16 bit)
access : read-only

Enumeration:

0 : 0

No interrupt on Pn.15

1 : 1

Interrupt requirements met on Pn.15

End of enumeration elements list.


IC

Offset:0x20 GPIO Port n Interrupt Clear Register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IC IC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IC0 IC1 IC2 IC3 IC4 IC5 IC6 IC7 IC8 IC9 IC10 IC11 IC12 IC13 IC14 IC15

IC0 : Pn.0 interrupt flag clear
bits : 0 - 0 (1 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.0

End of enumeration elements list.

IC1 : Pn.1 interrupt flag clear
bits : 1 - 2 (2 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.1

End of enumeration elements list.

IC2 : Pn.2 interrupt flag clear
bits : 2 - 4 (3 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.2

End of enumeration elements list.

IC3 : Pn.3 interrupt flag clear
bits : 3 - 6 (4 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.3

End of enumeration elements list.

IC4 : Pn.4 interrupt flag clear
bits : 4 - 8 (5 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.4

End of enumeration elements list.

IC5 : Pn.5 interrupt flag clear
bits : 5 - 10 (6 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.5

End of enumeration elements list.

IC6 : Pn.6 interrupt flag clear
bits : 6 - 12 (7 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.6

End of enumeration elements list.

IC7 : Pn.7 interrupt flag clear
bits : 7 - 14 (8 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.7

End of enumeration elements list.

IC8 : Pn.8 interrupt flag clear
bits : 8 - 16 (9 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.8

End of enumeration elements list.

IC9 : Pn.9 interrupt flag clear
bits : 9 - 18 (10 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.9

End of enumeration elements list.

IC10 : Pn.10 interrupt flag clear
bits : 10 - 20 (11 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.10

End of enumeration elements list.

IC11 : Pn.11 interrupt flag clear
bits : 11 - 22 (12 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.11

End of enumeration elements list.

IC12 : Pn.12 interrupt flag clear
bits : 12 - 24 (13 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.12

End of enumeration elements list.

IC13 : Pn.13 interrupt flag clear
bits : 13 - 26 (14 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.13

End of enumeration elements list.

IC14 : Pn.14 interrupt flag clear
bits : 14 - 28 (15 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.14

End of enumeration elements list.

IC15 : Pn.15 interrupt flag clear
bits : 15 - 30 (16 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear interrupt flag on Pn.15

End of enumeration elements list.


BSET

Offset:0x24 GPIO Port n Bits Set Operation Register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BSET BSET write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BSET0 BSET1 BSET2 BSET3 BSET4 BSET5 BSET6 BSET7 BSET8 BSET9 BSET10 BSET11 BSET12 BSET13 BSET14 BSET15

BSET0 : Set Pn.0
bits : 0 - 0 (1 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.0 to 1

End of enumeration elements list.

BSET1 : Set Pn.1
bits : 1 - 2 (2 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.1 to 1

End of enumeration elements list.

BSET2 : Set Pn.2
bits : 2 - 4 (3 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.2 to 1

End of enumeration elements list.

BSET3 : Set Pn.3
bits : 3 - 6 (4 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.3 to 1

End of enumeration elements list.

BSET4 : Set Pn.4
bits : 4 - 8 (5 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.4 to 1

End of enumeration elements list.

BSET5 : Set Pn.5
bits : 5 - 10 (6 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.5 to 1

End of enumeration elements list.

BSET6 : Set Pn.6
bits : 6 - 12 (7 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.6 to 1

End of enumeration elements list.

BSET7 : Set Pn.7
bits : 7 - 14 (8 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.7 to 1

End of enumeration elements list.

BSET8 : Set Pn.8
bits : 8 - 16 (9 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.8 to 1

End of enumeration elements list.

BSET9 : Set Pn.9
bits : 9 - 18 (10 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.9 to 1

End of enumeration elements list.

BSET10 : Set Pn.10
bits : 10 - 20 (11 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.10 to 1

End of enumeration elements list.

BSET11 : Set Pn.11
bits : 11 - 22 (12 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.11 to 1

End of enumeration elements list.

BSET12 : Set Pn.12
bits : 12 - 24 (13 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.12 to 1

End of enumeration elements list.

BSET13 : Set Pn.13
bits : 13 - 26 (14 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.13 to 1

End of enumeration elements list.

BSET14 : Set Pn.14
bits : 14 - 28 (15 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.14 to 1

End of enumeration elements list.

BSET15 : Set Pn.15
bits : 15 - 30 (16 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Set

Set Pn.15 to 1

End of enumeration elements list.


BCLR

Offset:0x28 GPIO Port n Bits Clear Operation Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

BCLR BCLR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BCLR0 BCLR1 BCLR2 BCLR3 BCLR4 BCLR5 BCLR6 BCLR7 BCLR8 BCLR9 BCLR10 BCLR11 BCLR12 BCLR13 BCLR14 BCLR15

BCLR0 : Clear Pn.0
bits : 0 - 0 (1 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.0

End of enumeration elements list.

BCLR1 : Clear Pn.1
bits : 1 - 2 (2 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.1

End of enumeration elements list.

BCLR2 : Clear Pn.2
bits : 2 - 4 (3 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.2

End of enumeration elements list.

BCLR3 : Clear Pn.3
bits : 3 - 6 (4 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.3

End of enumeration elements list.

BCLR4 : Clear Pn.4
bits : 4 - 8 (5 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.4

End of enumeration elements list.

BCLR5 : Clear Pn.5
bits : 5 - 10 (6 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.5

End of enumeration elements list.

BCLR6 : Clear Pn.6
bits : 6 - 12 (7 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.6

End of enumeration elements list.

BCLR7 : Clear Pn.7
bits : 7 - 14 (8 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.7

End of enumeration elements list.

BCLR8 : Clear Pn.8
bits : 8 - 16 (9 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.8

End of enumeration elements list.

BCLR9 : Clear Pn.9
bits : 9 - 18 (10 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.9

End of enumeration elements list.

BCLR10 : Clear Pn.10
bits : 10 - 20 (11 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.10

End of enumeration elements list.

BCLR11 : Clear Pn.11
bits : 11 - 22 (12 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.11

End of enumeration elements list.

BCLR12 : Clear Pn.12
bits : 12 - 24 (13 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.12

End of enumeration elements list.

BCLR13 : Clear Pn.13
bits : 13 - 26 (14 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.13

End of enumeration elements list.

BCLR14 : Clear Pn.14
bits : 14 - 28 (15 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.14

End of enumeration elements list.

BCLR15 : Clear Pn.15
bits : 15 - 30 (16 bit)
access : write-only

Enumeration:

0 : No effect

No effect

1 : Clear

Clear Pn.15

End of enumeration elements list.


MODE

Offset:0x04 GPIO Port n Mode Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE MODE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MODE0 MODE1 MODE2 MODE3 MODE4 MODE5 MODE6 MODE7 MODE8 MODE9 MODE10 MODE11 MODE12 MODE13 MODE14 MODE15

MODE0 : Mode of Pn.0
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : I

Pn.0 is Input pin

1 : O

Pn.0 is Output pin

End of enumeration elements list.

MODE1 : Mode of Pn.1
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : I

Pn.1 is Input pin

1 : O

Pn.1 is Output pin

End of enumeration elements list.

MODE2 : Mode of Pn.2
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : I

Pn.2 is Input pin

1 : O

Pn.2 is Output pin

End of enumeration elements list.

MODE3 : Mode of Pn.3
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : I

Pn.3 is Input pin

1 : O

Pn.3 is Output pin

End of enumeration elements list.

MODE4 : Mode of Pn.4
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : I

Pn.4 is Input pin

1 : O

Pn.4 is Output pin

End of enumeration elements list.

MODE5 : Mode of Pn.5
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : I

Pn.5 is Input pin

1 : O

Pn.5 is Output pin

End of enumeration elements list.

MODE6 : Mode of Pn.6
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : I

Pn.6 is Input pin

1 : O

Pn.6 is Output pin

End of enumeration elements list.

MODE7 : Mode of Pn.7
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : I

Pn.7 is Input pin

1 : O

Pn.7 is Output pin

End of enumeration elements list.

MODE8 : Mode of Pn.8
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : I

Pn.8 is Input pin

1 : O

Pn.8 is Output pin

End of enumeration elements list.

MODE9 : Mode of Pn.9
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : I

Pn.9 is Input pin

1 : O

Pn.9 is Output pin

End of enumeration elements list.

MODE10 : Mode of Pn.10
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : I

Pn.10 is Input pin

1 : O

Pn.10 is Output pin

End of enumeration elements list.

MODE11 : Mode of Pn.11
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : I

Pn.11 is Input pin

1 : O

Pn.11 is Output pin

End of enumeration elements list.

MODE12 : Mode of Pn.12
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : I

Pn.12 is Input pin

1 : O

Pn.12 is Output pin

End of enumeration elements list.

MODE13 : Mode of Pn.13
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : I

Pn.13 is Input pin

1 : O

Pn.13 is Output pin

End of enumeration elements list.

MODE14 : Mode of Pn.14
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : I

Pn.14 is Input pin

1 : O

Pn.14 is Output pin

End of enumeration elements list.

MODE15 : Mode of Pn.15
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : I

Pn.15 is Input pin

1 : O

Pn.15 is Output pin

End of enumeration elements list.


CFG

Offset:0x08 GPIO Port n Configuration Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFG CFG read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG0 : Configuration of Pn.0
bits : 0 - 1 (2 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG1 : Configuration of Pn.1
bits : 2 - 5 (4 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG2 : Configuration of Pn.2
bits : 4 - 9 (6 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG3 : Configuration of Pn.3
bits : 6 - 13 (8 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG4 : Configuration of Pn.4
bits : 8 - 17 (10 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG5 : Configuration of Pn.5
bits : 10 - 21 (12 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG6 : Configuration of Pn.6
bits : 12 - 25 (14 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG7 : Configuration of Pn.7
bits : 14 - 29 (16 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG8 : Configuration of Pn.8
bits : 16 - 33 (18 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG9 : Configuration of Pn.9
bits : 18 - 37 (20 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG10 : Configuration of Pn.10
bits : 20 - 41 (22 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG11 : Configuration of Pn.11
bits : 22 - 45 (24 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG12 : Configuration of Pn.12
bits : 24 - 49 (26 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG13 : Configuration of Pn.13
bits : 26 - 53 (28 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG14 : Configuration of Pn.14
bits : 28 - 57 (30 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.

CFG15 : Configuration of Pn.15
bits : 30 - 61 (32 bit)
access : read-write

Enumeration:

0 : 00b

Enable pull-up resistor

2 : 10b

Inactive (schmitt trigger enabled)

3 : 11b

Inactive (schmitt trigger disabled)

End of enumeration elements list.


IS

Offset:0x0C GPIO Port n Interrupt Sense Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IS IS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IS0 IS1 IS2 IS3 IS4 IS5 IS6 IS7 IS8 IS9 IS10 IS11 IS12 IS13 IS14 IS15

IS0 : Interrupt on Pn.0 is event or edge sensitive
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.0 is edge sensitive

1 : Event

Interrupt on Pn.0 is event sensitive

End of enumeration elements list.

IS1 : Interrupt on Pn.1 is event or edge sensitive
bits : 1 - 2 (2 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.1 is edge sensitive

1 : Event

Interrupt on Pn.1 is event sensitive

End of enumeration elements list.

IS2 : Interrupt on Pn.2 is event or edge sensitive
bits : 2 - 4 (3 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.2 is edge sensitive

1 : Event

Interrupt on Pn.2 is event sensitive

End of enumeration elements list.

IS3 : Interrupt on Pn.3 is event or edge sensitive
bits : 3 - 6 (4 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.3 is edge sensitive

1 : Event

Interrupt on Pn.3 is event sensitive

End of enumeration elements list.

IS4 : Interrupt on Pn.4 is event or edge sensitive
bits : 4 - 8 (5 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.4 is edge sensitive

1 : Event

Interrupt on Pn.4 is event sensitive

End of enumeration elements list.

IS5 : Interrupt on Pn.5 is event or edge sensitive
bits : 5 - 10 (6 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.5 is edge sensitive

1 : Event

Interrupt on Pn.5 is event sensitive

End of enumeration elements list.

IS6 : Interrupt on Pn.6 is event or edge sensitive
bits : 6 - 12 (7 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.6 is edge sensitive

1 : Event

Interrupt on Pn.6 is event sensitive

End of enumeration elements list.

IS7 : Interrupt on Pn.7 is event or edge sensitive
bits : 7 - 14 (8 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.7 is edge sensitive

1 : Event

Interrupt on Pn.7 is event sensitive

End of enumeration elements list.

IS8 : Interrupt on Pn.8 is event or edge sensitive
bits : 8 - 16 (9 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.8 is edge sensitive

1 : Event

Interrupt on Pn.8 is event sensitive

End of enumeration elements list.

IS9 : Interrupt on Pn.9 is event or edge sensitive
bits : 9 - 18 (10 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.9 is edge sensitive

1 : Event

Interrupt on Pn.9 is event sensitive

End of enumeration elements list.

IS10 : Interrupt on Pn.10 is event or edge sensitive
bits : 10 - 20 (11 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.10 is edge sensitive

1 : Event

Interrupt on Pn.10 is event sensitive

End of enumeration elements list.

IS11 : Interrupt on Pn.11 is event or edge sensitive
bits : 11 - 22 (12 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.11 is edge sensitive

1 : Event

Interrupt on Pn.11 is event sensitive

End of enumeration elements list.

IS12 : Interrupt on Pn.12 is event or edge sensitive
bits : 12 - 24 (13 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.12 is edge sensitive

1 : Event

Interrupt on Pn.12 is event sensitive

End of enumeration elements list.

IS13 : Interrupt on Pn.13 is event or edge sensitive
bits : 13 - 26 (14 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.13 is edge sensitive

1 : Event

Interrupt on Pn.13 is event sensitive

End of enumeration elements list.

IS14 : Interrupt on Pn.14 is event or edge sensitive
bits : 14 - 28 (15 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.14 is edge sensitive

1 : Event

Interrupt on Pn.14 is event sensitive

End of enumeration elements list.

IS15 : Interrupt on Pn.15 is event or edge sensitive
bits : 15 - 30 (16 bit)
access : read-write

Enumeration:

0 : Edge

Interrupt on Pn.15 is edge sensitive

1 : Event

Interrupt on Pn.15 is event sensitive

End of enumeration elements list.



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