\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 RTC Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
RTCEN : RTC enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable RTC
1 : Enable
Enable RTC
End of enumeration elements list.
Offset:0x10 RTC Interrupt Clear Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
SECIC : Second interrupt flag clear
bits : 0 - 0 (1 bit)
access : write-only
Enumeration:
0 : No effect
No effect
1 : Clear
Clear second interrupt flag
End of enumeration elements list.
Offset:0x14 RTC Second Counter Reload Value Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x18 RTC Second Counter Register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
Offset:0x04 RTC Clock Source Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CLKSEL : RTC clock source
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : ILRC
RTC clock source=ILRC
1 : ELS XTAL
RTC clock source=ELS XTAL
End of enumeration elements list.
Offset:0x08 RTC Interrupt Enable Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
SECIE : Second interrupt enable
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable second interrupt
1 : Enable
Enable second interrupt
End of enumeration elements list.
Offset:0x0C RTC Raw Interrupt Status Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SECIF : Second interrupt flag
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : No
No second interrupt
1 : Met
Second interrupt is triggered when SECIE=1
End of enumeration elements list.
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