\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x00 Flash Low Power Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
LPMODE : Flash Low Power mode selection bit
bits : 0 - 5 (6 bit)
access : read-write
Enumeration:
0 : 0x0
HCLK is less than 24MHz
25 : 0x19
HCLK is more than 24MHz, and less than or equal to 48MHz
57 : 0x39
HCLK is more than 48MHz
41 : 0x29
HCLK is more than or equal to 24MHz, and less than or equal to 48MHz
End of enumeration elements list.
FMCKEY : FMC verify key
bits : 16 - 47 (32 bit)
access : write-only
Offset:0x10 Flash Address Register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Offset:0x14 Flash Checksum Register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UserROM : Checksum of User ROM
bits : 0 - 15 (16 bit)
access : read-only
BootROM : Checksum of Boot ROM
bits : 16 - 47 (32 bit)
access : read-only
Offset:0x18 Flash Checksum Register 1
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UserROM1 : Checksum of User ROM 1
bits : 0 - 15 (16 bit)
access : read-only
UserROM2 : Checksum of User ROM 2
bits : 16 - 47 (32 bit)
access : read-only
Offset:0x1C Flash Checksum Register 2
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
UserROM3 : Checksum of User ROM 3
bits : 0 - 15 (16 bit)
access : read-only
UserROM4 : Checksum of User ROM 4
bits : 16 - 47 (32 bit)
access : read-only
Offset:0x04 Flash Status Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BUSY : Busy flag
bits : 0 - 0 (1 bit)
access : read-only
Enumeration:
0 : Idle
FMC is idle
1 : Busy
Flash operation is in process
End of enumeration elements list.
ERR : Erase/Error flag
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : No error
No error
1 : Error
The address is illegal or over page boundary
End of enumeration elements list.
Offset:0x08 Flash Control Register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PG : Flash program mode chosen bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : 0
Disable Flash program mode
1 : 1
Enable Flash program mode
End of enumeration elements list.
PER : Page erase mode chosen bit
bits : 1 - 2 (2 bit)
access : read-write
Enumeration:
0 : 0
Disable page erase mode
1 : 1
Enable page erase mode
End of enumeration elements list.
MER : Mass erase mode chosen bit
bits : 2 - 4 (3 bit)
access : read-write
Enumeration:
0 : 0
Disable masse erase mode
1 : 1
Enable mass erase mode
End of enumeration elements list.
START : Start erase/program operation
bits : 6 - 12 (7 bit)
access : read-write
Enumeration:
0 : Stop/Finish
Stop/finish operation
1 : Start
Start erase/program operation
End of enumeration elements list.
CHK : Checksum calculation chosen
bits : 7 - 14 (8 bit)
access : read-write
Enumeration:
0 : Disable
Disable checksum calcuation
1 : Enable
Trigger checksum calculation
End of enumeration elements list.
Offset:0x0C Flash Data Register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.