\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
Offset:0x0 OPA Control Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
OP0EN : OP-Amp 0 enable bit
bits : 0 - 0 (1 bit)
access : read-write
Enumeration:
0 : Disable
Disable OPA0
1 : Enable
Enable OPA0
End of enumeration elements list.
OP0PS : OP-Amp 0 Positive input selection bit
bits : 3 - 6 (4 bit)
access : read-write
Enumeration:
0 : VOPAIREF
OP0P pin is GPIO mode.
1 : OP0P
OP0P is OPA0 positive input pin, and isolate GPIO function
End of enumeration elements list.
OP0NS : OP-Amp 0 Negatiove input selection bit
bits : 4 - 8 (5 bit)
access : read-write
Enumeration:
0 : VOPAIREF
OP0N pin is GPIO mode.
1 : OP0N
OP0N is OPA0 negative input pin, and isolate GPIO function
End of enumeration elements list.
OP1EN : OP-Amp 1 enable bit
bits : 8 - 16 (9 bit)
access : read-write
Enumeration:
0 : Disable
Disable OPA1
1 : Enable
Enable OPA1
End of enumeration elements list.
OP1PS : OP-Amp 1 Positive input selection bit
bits : 11 - 22 (12 bit)
access : read-write
Enumeration:
0 : VOPAIREF
OP1P pin is GPIO mode.
1 : OP0P
OP1P is OPA1 positive input pin, and isolate GPIO function
End of enumeration elements list.
OP1NS : OP-Amp 1 Negatiove input selection bit
bits : 12 - 24 (13 bit)
access : read-write
Enumeration:
0 : VOPAIREF
OP1N pin is GPIO mode.
1 : OP1N
OP1N is OPA1 negative input pin, and isolate GPIO function
End of enumeration elements list.
Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !
This website is sponsored by Embeetle, an IDE designed from scratch for embedded software developers.