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GPIO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

DATA

IS

IBE

IEV

IE

MIS

IC

MODE0

MODE1

DATS

OEN

DATC

MFTX

PE

DS


DATA

IO0 to IO14 data value.

Writing to a bit will drive the written value on the corresponding IO when it is configured in GPIO mode and the output direction. Reading a bit indicates the pin value


address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IS

Interrupt sense register (1 bit per IO).


address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IS IS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IBE

Interrupt edge register (1 bit per IO).


address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IBE IBE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IEV

Interrupt event register (1 bit per IO).


address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IEV IEV read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IE

Interrupt mask register (1 bit per IO).


address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MIS

Masked interrupt status register (1 bit per IO)
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

MIS MIS read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

IC

Interrupt clear register (1 bit per IO).


address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0

IC IC write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MODE0

Select mode for IO0 to IO7.


address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE0 MODE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7

IO0 : IO0 mode
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0x0 : GPIO_MODE

GPIO mode

0x1 : SERIAL1_MODE

serial1 mode

0x2 : STANDALONE_MODE

standalone mode

0x3 : BLUE_MODE

BLE mode

0x4 : SERIAL0_MODE

serial0 mode

0x5 : MICROPHONE_ADC_MODE

ADC mode for microphone

End of enumeration elements list.

IO1 : IO1 mode
bits : 4 - 6 (3 bit)

IO2 : IO2 mode
bits : 8 - 10 (3 bit)

IO3 : IO3 mode
bits : 12 - 14 (3 bit)

IO4 : IO4 mode
bits : 16 - 18 (3 bit)

IO5 : IO5 mode
bits : 20 - 22 (3 bit)

IO6 : IO6 mode
bits : 24 - 26 (3 bit)

IO7 : IO7 mode
bits : 28 - 30 (3 bit)


MODE1

Select mode for IO8 to IO14.


address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MODE1 MODE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IO8 IO9 IO10 IO11 IO12 IO13 IO14

IO8 : IO8 mode
bits : 0 - 2 (3 bit)
access : read-write

Enumeration:

0x0 : GPIO_MODE

GPIO mode

0x1 : SERIAL1_MODE

serial1 mode

0x2 : STANDALONE_MODE

standalone mode

0x3 : BLUE_MODE

BLE mode

0x4 : SERIAL0_MODE

serial0 mode

0x5 : MICROPHONE_ADC_MODE

ADC mode for microphone

End of enumeration elements list.

IO9 : IO9 mode
bits : 4 - 6 (3 bit)

IO10 : IO10 mode
bits : 8 - 10 (3 bit)

IO11 : IO11 mode
bits : 12 - 14 (3 bit)

IO12 : IO12 mode
bits : 16 - 18 (3 bit)

IO13 : IO13 mode
bits : 20 - 22 (3 bit)

IO14 : IO14 mode
bits : 24 - 26 (3 bit)


DATS

Set some bits of DATA when in GPIO mode without affecting the others (1 bit per IO).


address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATS DATS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

OEN

GPIO output enable register (1 bit per GPIO).


address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OEN OEN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DATC

Clear some bits of DATA when in GPIO mode without affecting the others (1 bit per IO).


address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATC DATC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MFTX

Select the IO to be used as capture input for the MFTX timers
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MFTX MFTX read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MFT1_TIMER_A MFT1_TIMER_B MFT2_TIMER_A MFT2_TIMER_B

MFT1_TIMER_A : MFT1 timer A.


bits : 0 - 7 (8 bit)
access : read-write

Enumeration:

0x0 : IO0

IO0

0x1 : IO1

IO1

0x2 : IO2

IO2

0x3 : IO3

IO3

0x4 : IO4

IO4

0x5 : IO5

IO5

0x6 : IO6

IO6

0x7 : IO7

IO7

0x8 : IO8

IO8

0x9 : IO9

IO9

0xA : IO10

IO10

0xB : IO11

IO11

0xC : IO12

IO12

0xD : IO13

IO13

0xE : IO14

IO14

0xF : IO15

IO15

0x10 : IO16

IO16

0x11 : IO17

IO17

0x12 : IO18

IO18

0x13 : IO19

IO19

0x14 : IO20

IO20

0x15 : IO21

IO21

0x16 : IO22

IO22

0x17 : IO23

IO23

0x18 : IO24

IO24

0x19 : IO25

IO25

End of enumeration elements list.

MFT1_TIMER_B : MFT1 timer B.


bits : 8 - 7 ( bit)

MFT2_TIMER_A : MFT2 timer A.


bits : 16 - 15 ( bit)

MFT2_TIMER_B : MFT2 timer B.


bits : 24 - 23 ( bit)


PE

Pull enable (1 bit per IO).


address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PE PE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

DS

IO driver strength (1 bit per IO).


address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DS DS read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0


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