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CKGEN_SOC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CONTROL

DIE_ID

CLOCK_EN

DMA_CONFIG

REASON_RST


CONTROL

Control clock and reset of SOC
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CONTROL CONTROL read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 UART_CKDIV

UART_CKDIV : UART baud rate clock setting from 1 to 16 MHz according to the formula 16 / (n + 1) MHz.
bits : 10 - 13 (4 bit)
access : read-write


DIE_ID

Identification information of the device
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

DIE_ID DIE_ID read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REV VERSION PRODUCT

REV : Cut revision
bits : 0 - 3 (4 bit)
access : read-only

VERSION : Cut version
bits : 4 - 8 (5 bit)
access : read-only

PRODUCT : Product
bits : 9 - 11 (3 bit)
access : read-only


CLOCK_EN

Enable or gates the APB clock of the peripherals
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLOCK_EN CLOCK_EN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 GPIO NVM SYSCTRL UART SPI WDOG ADC I2C1 I2C2 MFT1 MFT2 RTC DMA RNG

GPIO : GPIO clock
bits : 0 - 0 (1 bit)
access : read-write

NVM : Flash controller clock
bits : 1 - 1 (1 bit)
access : read-write

SYSCTRL : System controller clock
bits : 2 - 2 (1 bit)
access : read-write

UART : UART clock
bits : 3 - 3 (1 bit)
access : read-write

SPI : SPI clock
bits : 4 - 4 (1 bit)
access : read-write

WDOG : Watchdog clock
bits : 7 - 7 (1 bit)
access : read-write

ADC : ADC clock
bits : 8 - 8 (1 bit)
access : read-write

I2C1 : I2C1 clock
bits : 9 - 9 (1 bit)
access : read-write

I2C2 : I2C2 clock
bits : 10 - 10 (1 bit)
access : read-write

MFT1 : MFT1 clock
bits : 11 - 11 (1 bit)
access : read-write

MFT2 : MFT2 clock
bits : 12 - 12 (1 bit)
access : read-write

RTC : RTC clock
bits : 13 - 13 (1 bit)
access : read-write

DMA : DMA AHB clock
bits : 16 - 16 (1 bit)
access : read-write

RNG : RNG AHB clock
bits : 17 - 17 (1 bit)
access : read-write


DMA_CONFIG

DMA config
address_offset : 0x24 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DMA_CONFIG DMA_CONFIG read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 ADC_CH0 ADC_CH1 ADC_CH2 ADC_CH3 ADC_CH4 ADC_CH5 ADC_CH6 ADC_CH7

ADC_CH0 : Select ADC on DMA channel 0 instead of peripheral
bits : 0 - 0 (1 bit)
access : read-write

Enumeration:

1 : enable

enable

0 : disable

disable

End of enumeration elements list.

ADC_CH1 : Select ADC on DMA channel 1 instead of peripheral
bits : 1 - 0 ( bit)

ADC_CH2 : Select ADC on DMA channel 2 instead of peripheral
bits : 2 - 1 ( bit)

ADC_CH3 : Select ADC on DMA channel 3 instead of peripheral
bits : 3 - 2 ( bit)

ADC_CH4 : Select ADC on DMA channel 4 instead of peripheral
bits : 4 - 3 ( bit)

ADC_CH5 : Select ADC on DMA channel 5 instead of peripheral
bits : 5 - 4 ( bit)

ADC_CH6 : Select ADC on DMA channel 6 instead of peripheral
bits : 6 - 5 ( bit)

ADC_CH7 : Select ADC on DMA channel 7 instead of peripheral
bits : 7 - 6 ( bit)


REASON_RST

Indicates the reset reason from Cortex-M0
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

REASON_RST REASON_RST read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SYSREQ WDG LOCKUP

SYSREQ : Reset caused by Cortex-M0 debug asserting SYSRESETREQ
bits : 1 - 1 (1 bit)
access : read-only

WDG : Reset caused by assertion of watchdog reset
bits : 2 - 2 (1 bit)
access : read-only

LOCKUP : Reset caused by Cortex-M0 asserting LOCKUP signal
bits : 3 - 3 (1 bit)
access : read-only



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