TNCNT1

TNPRSC

TNCKC

TNMCTRL

TNICTRL

TNICLR

TNCRA

TNCRB

TNCNT2

TNC1CSEL : Define the clock mode for timer/counter 1:

• 000b: No clock (Timer/Counter 1 stopped).
• 001b: Prescaled system clock.
• 010b: External event on TnB (mode 1 and 3 only).
• 011b: Pulse accumulate (mode 1 and 3 only).
• 100b: Low-speed clock.

bits : 0 - 2 (3 bit)

Enumeration:

End of enumeration elements list.

TNC2CSEL : Define the clock mode for timer/counter 2:

• 000b: No clock (Timer/Counter 1 stopped).
• 001b: Prescaled system clock.
• 010b: External event on TnB (mode 1 and 3 only).
• 011b: Pulse accumulate (mode 1 and 3 only).
• 100b: Low-speed clock.

bits : 3 - 5 (3 bit)

TNMDSEL : MFTX mode select:

• 00b: Mode 1 or 1a: PWM mode and system timer or pulse train.
• 01b: Mode 2: Dual-input capture and system timer.
• 10b: Mode 3: Dual independent timer/counter.
• 11b: Mode 4: Single timer and single input capture.

bits : 0 - 1 (2 bit)

Enumeration:

End of enumeration elements list.

TNAEDG : TnA edge polarity:

• 0: Input is sensitive to falling edges.
• 1: Input is sensitive to rising edges.

bits : 2 - 2 (1 bit)

Enumeration:

End of enumeration elements list.

TNBEDG : TnB edge polarity:

• 0: Input is sensitive to falling edges.
• 1: Input is sensitive to rising edges.

bits : 3 - 3 (1 bit)

TNAEN : TnA enable:

• 0: TnA in disable.
• 1: TnA in enable.

bits : 4 - 4 (1 bit)

Enumeration:

End of enumeration elements list.

TNBEN : TnB enable:

• 0: TnB in disable.
• 1: TnB in enable.

bits : 5 - 5 (1 bit)

Enumeration:

End of enumeration elements list.

TNAOUT : TnA output data:

• 0: Pin is low.
• 1: Pin is high.

bits : 6 - 6 (1 bit)

Enumeration:

End of enumeration elements list.

TNEN : MFTX enable:

• 0: MFTX disable.
• 1: MFTX enable.

bits : 7 - 7 (1 bit)

Enumeration:

End of enumeration elements list.

TNPTEN : Tn pulse-train mode enable:

• 0: Mode 1a not selected.
• 1: Mode 1a selected (if TnMDSEL = 00).

bits : 8 - 8 (1 bit)

TNPTSE : Tn pulse-train sofware trigger enable:

• 0: No effect.
• 1: Pulse-train generation trigger (in mode 1a)

bits : 9 - 9 (1 bit)

TNPTET : Tn pulse-train event trigger:

• 0: No pulse-train event trigger occurred.
• 1: Pulse-train event trigger occurred (in mode 1a).

bits : 10 - 10 (1 bit)

TNAPND : Timer interrupt A pending:

• 0: No interrupt source pending.
• 1: Interrupt source pending.

bits : 0 - 0 (1 bit)
access : read-only

TNBPND : Timer interrupt B pending:

• 0: No interrupt source pending.
• 1: Interrupt source pending.

bits : 1 - 1 (1 bit)
access : read-only

TNCPND : Timer interrupt C pending:

• 0: No interrupt source pending.
• 1: Interrupt source pending.

bits : 2 - 2 (1 bit)
access : read-only

TNDPND : Timer interrupt D pending:

• 0: No interrupt source pending.
• 1: Interrupt source pending.

bits : 3 - 3 (1 bit)
access : read-only

TNAIEN : Timer interrupt A enable:

• 0: Interrupt disabled.
• 1: Interrupt enabled.

bits : 4 - 4 (1 bit)

TNBIEN : Timer interrupt B enable:

• 0: Interrupt disabled.
• 1: Interrupt enabled.

bits : 5 - 5 (1 bit)

TNCIEN : Timer interrupt C enable:

• 0: Interrupt disabled.
• 1: Interrupt enabled.

bits : 6 - 6 (1 bit)

TNDIEN : Timer interrupt D enable:

• 0: Interrupt disabled.
• 1: Interrupt enabled.

bits : 7 - 7 (1 bit)

TNACLR : Clear timer interrupt source A.
bits : 0 - 0 (1 bit)

TNBCLR : Clear timer interrupt source B.
bits : 1 - 1 (1 bit)

TNCCLR : Clear timer interrupt source C.
bits : 2 - 2 (1 bit)

TNDCLR : Clear timer interrupt source D.
bits : 3 - 3 (1 bit)