CWDR

CWYMR

CWYLR

CTCR

IMSC

RIS

MIS

ICR

TDR

TCR

TLR1

TLR2

TPR1

CWDMR

TPR2

TPR3

TPR4

TIN

CWDLR

CWYR

CWSEC : RTC clockwatch second value. Clockwatch seconds: 0 to 59 (max 0x3B).
bits : 0 - 5 (6 bit)

CWMIN : RTC clockwatch minute value. Clockwatch seconds: 0 to 59 (max 0x3B).
bits : 6 - 11 (6 bit)

CWHOUR : RTC clockwatch hour value. Clockwatch seconds: 0 to 23 (max 0x17).
bits : 12 - 16 (5 bit)

CWDAYW : RTC clockwatch day of week value. Clockwatch day of week:

• 001b: Sunday.
• 010b: Monday.
• 011b: Tuesday.
• 100b: Wednesday.
• 101b: Thursday.
• 110b: Friday.
• 111b: Saturday.

bits : 17 - 19 (3 bit)

CWDAYM : RTC clockwatch day of month value: 1 to 28/29/30 or 31. Range of value to program depends on the month:

• 1 to 28: February month, non-leap year.
• 1 to 29: February month, leap year.
• 1 to 30: April, June, September, November month.
• 1 to 31: January, March, May, August, October, December month.

bits : 20 - 24 (5 bit)

CWMONTH : RTC clockwatch month value:

• 0001b: January.
• ...
• 1100: December.

bits : 25 - 28 (4 bit)

CWYEARM : RTC clockwatch year match value. Clockwatch year match value is in BCD format from 0 to 3999.
bits : 0 - 13 (14 bit)

CWYEARL : RTC clockwatch year load value. Clockwatch year load value is in BCD format from 0 to 3999.
bits : 0 - 13 (14 bit)

CKDIV : Clock divider factor. This value plus one represents the integer part of the CLK32K clock divider used to produce the reference 1 Hz clock.

• 0x000: CLK1HZ clock is similar to CLK32K for RTC timer and stopped for RTC clockwatch.
• 0x0001: 2 CLK32K clock cycles per CLK1HZ clock cycle.
• ...
• 0x7FFF: 32768 CLK32K clock cycles per CLK1HZ clock cycle (default value after PORn reset).
• ...
• 0xFFFF: CLK32K clock cycles per CLK1HZ clock cycle.

Writing to this bit-field will be disregarded if CWEN = 1. A read returns the value of the CKDIV bit-field.
bits : 0 - 14 (15 bit)

CKDEL : Trim delete count. This value represents the number of CLK32K clock pulses to delete every 1023 CLK32K clock cycles to get a better reference 1 Hz clock for incrementing the RTC counter.

• 0x000: No CLK32K clock cycle is deleted every 1023 CLK1HZ clock cycles (default value after PORn reset).
• 0x001: 1 CLK32K clock cycle is deleted every 1023 CLK1HZ clock cycles.
• ...
• 0x3FF: 1023 CLK32K clock cycles are deleted every 1023 CLK1HZ clock cycles.

Writing to this bit-field will be disregarded if CWEN = 1. A read returns the value of the CKDEL bit-field.
bits : 16 - 25 (10 bit)

CWEN : Clockwatch enable bit. When set to 1, the clockwatch is enabled. Once it is enabled, any write to this register has no effect until a power-on reset. A read returns the value of the CWEN bit value.
bits : 26 - 26 (1 bit)

WIMSC : RTC clock watch interrupt enable bit:

• When set to 0, clears the interrupt mask (default after PORn reset). The interrupt is disabled.
• When set to 1, the interrupt for RTC clockwatch interrupt is enabled.

bits : 0 - 0 (1 bit)

TIMSC : RTC timer interrupt enable bit:

• When set to 0, sets the mask for RTC timer interrupt (default after PORn reset). The interrupt is disabled.
• When set to 1, clears this mask and enables the interrupt.

bits : 1 - 1 (1 bit)

WRIS : RTC clock watch raw interrupt status bit. Gives the raw interrupt state (prior to masking) of the RTC clock watch interrupt.
bits : 0 - 0 (1 bit)

TRIS : RTC timer raw interrupt status bit. Gives the raw interrupt state (prior to masking) of the RTC timer interrupt.
bits : 1 - 1 (1 bit)

WMIS : RTC clock watch interrupt status bit. Gives the masked interrupt status (after masking) of the RTC clock watch interrupt WINTR.
bits : 0 - 0 (1 bit)

TMIS : RTC timer interrupt status bit. Gives the masked interrupt status (after masking) of the RTC timer interrupt TINTR.
bits : 1 - 1 (1 bit)

WIC : RTC clock watch interrupt clear register bit. Clears the RTC clock watch interrupt WINTR.

• 0: No effect.
• 1: Clears the interrupt.

bits : 0 - 0 (1 bit)

TIC : RTC timer interrupt clear register bit. Clears the RTC timer interrupt TINTR.

• 0: No effect.
• 1: Clears the interrupt.

bits : 1 - 1 (1 bit)

OS : RTC Timer one shot count.

• 0: Periodic mode (default). When reaching zero, the RTC timer raises its interrupt and is reloaded from the LD content.
• 1: One-shot mode. When reaching zero, the RTC timer raise its interrupt and stops.

bits : 0 - 0 (1 bit)

EN : RTC Timer enable bit.

• 0: The RTC timer is stopped on the next CLK32K cycle.
• 1: The RTC timer is enabled on the next CLK32K cycle.

When the RTC timer is stopped, the content of the counter is frozen. A read returns the value of the EN bit. This bit set by hardware when the TLR register is written to while the counter is stopped. When the device is active, this bit is cleared by hardware when the counter reaches zero in one-shot mode.
bits : 1 - 1 (1 bit)

S : RTC Timer self start bit. When written to 1b, each write in a load register or a pattern will set EN to 1b, so, start the counter in the next CLK32K cycle.
bits : 2 - 2 (1 bit)

SP : RTC Timer Pattern size. Number of pattern bits crossed by the pointer. It defines the useful pattern size.
bits : 4 - 10 (7 bit)

CLK : RTC Timer clock.

• 0: The RTC timer is clocked by CLK32K.
• 1: The RTC timer is clocked by the trimmed clock.

bits : 11 - 11 (1 bit)

Enumeration:

End of enumeration elements list.

BYPASS_GATED : Enable or disable the internal clock gating:

• 0: The internal clock gating is activated.
• 1: No clock gating, clock is always enabled.

bits : 12 - 12 (1 bit)

CWSECM : RTC clockwatch second match value:

• 00 0000 to 11 1011: (0 to 59 or 0x00 to 0x3B) clockwatch seconds.
• 11 1100 to 11 1111 - (60 to 63 or 0x3C to 0x3F).

Non-valid data, match never occurs.
bits : 0 - 5 (6 bit)

CWMINM : RTC clockwatch minute match value:

• 00 0000 to 11 1011: (0 to 59 or 0x00 to 0x3B) clockwatch minutes.
• 11 1100 to 11 1111 - (60 to 63 or 0x3C to 0x3F).

Non-valid data, match never occurs.
bits : 6 - 11 (6 bit)

CWHOURM : RTC clockwatch hour match value:

• 00000b to 10111b: (0 to 23 or 0x00 to 0x17) hour match value.
• 11000b to 11111b - (24 to 31 or 0x18 to 0x1F).

Non-valid data, match never occurs.
bits : 12 - 16 (5 bit)

CWDAYWM : RTC clockwatch day of week match value:

• 000b: day of week is don't care in the comparison. (Default value after PORn).
• 001b to 111b: (1 to 7) day of week match value.

bits : 17 - 19 (3 bit)

CWDAYMM : RTC clockwatch day of month match value:

• 0000b: (month is don't care in the comparison. Default value after PORn).
• 1 to 31: day of month match value.

bits : 20 - 24 (5 bit)

CWMONTHM : RTC clockwatch month match value:

• 0000b: (day of month is don't care in the comparison. Default value after PORn).
• 0001b to 1100b: (1 to 12) month match value.
• 1101b (13, 0xD) to 1111b (0xF) non-valid data, match never occurs.

bits : 25 - 28 (4 bit)

CWSECL : RTC clockwatch second load value. Clockwatch seconds from 0 to 59 (0x3B). Other values must not be used.
bits : 0 - 5 (6 bit)

CWMINL : RTC clockwatch minute load value. Clockwatch minutes from 0 to 59 (0x3B). Other values must not be used.
bits : 6 - 11 (6 bit)

CWHOURL : RTC clockwatch hour load value. Clockwatch hours from 0 to 23 (0x17). Other values must not be used.
bits : 12 - 16 (5 bit)

CWDAYWL : RTC clockwatch day of week load value. Clockwatch day of week:

• 000b: Must not be used.
• 001b: Sunday.
• 010b: Monday.
• 011b: Tuesday.
• 100b: Wednesday.
• 101b: Thursday.
• 110b: Friday.
• 111b: Saturday.

bits : 17 - 19 (3 bit)

CWDAYML : RTC clockwatch day of month load value. 1 to 28/29/30 or 31 depending on month:

• 1 to 28: February month, non-leap year.
• 1 to 29: February month, leap year.
• 1 to 30: April, June, September, November month.
• 1 to 31: January, March, May, August, October, December month.
• Other values must not be used.

bits : 20 - 24 (5 bit)

CWMONTHL : RTC clockwatch month load value:

• 0001b: January.
• ...
• 1100: December.

Other values must not be used.
bits : 25 - 28 (4 bit)

CWYEAR : RTC clockwatch year value. Clockwatch year, in BCD format is from 0 to 3999.
bits : 0 - 13 (14 bit)