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CKGEN_BLE

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x1000 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CLK32K_PERIOD

CLK32K_FREQ

CLK32K_IT

REASON_RST

CLK32K_COUNT


CLK32K_PERIOD

Period of 32 kHz clock
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLK32K_PERIOD CLK32K_PERIOD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLOW_PERIOD

SLOW_PERIOD : Indicates slow clock period information. The result provided in this field corresponds to the length of SLOW_COUNT periods of the slow clock (32 kHz) measured in 16 MHz half-period unit. The measurement is done automatically each time the device enters in active2 mode using SLOW_COUNT = 16. A new calculation can be launched by writing zero in CLK32K_PERIOD register. In this case, the time window uses the value programmed in SLOW_COUNT field.
bits : 0 - 18 (19 bit)
access : read-only


CLK32K_FREQ

Measurement of frequency of 32 kHz clock
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CLK32K_FREQ CLK32K_FREQ read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLOW_FREQ

SLOW_FREQ : Value equal to 2^33 / SLOW_PERIOD
bits : 0 - 26 (27 bit)
access : read-only


CLK32K_IT

Interrupt event for 32 kHz clock measurement
address_offset : 0x18 Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLK32K_IT CLK32K_IT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLK32K_MEAS_IRQ

CLK32K_MEAS_IRQ : When read, provides the status of the interrupt indicating slow lock measurement is finished:

When written, clears the interrupt:
bits : 0 - 0 (1 bit)


REASON_RST

Indicates the reset reason from BLE
address_offset : 0x8 Bytes (0x0)
size : 16 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

REASON_RST REASON_RST read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BOR POR WKP_IO9 WKP_IO10 WKP_IO11 WKP_IO12 WKP_IO13 WKP_BLUE WKP2_BLUE

BOR : Reset from BOR
bits : 1 - 1 (1 bit)
access : read-only

POR : Reset from POR
bits : 2 - 2 (1 bit)
access : read-only

WKP_IO9 : Wakeup from external IO9
bits : 3 - 3 (1 bit)
access : read-only

WKP_IO10 : Wakeup from external IO10
bits : 4 - 4 (1 bit)
access : read-only

WKP_IO11 : Wakeup from external IO11
bits : 5 - 5 (1 bit)
access : read-only

WKP_IO12 : Wakeup from external IO12
bits : 6 - 6 (1 bit)
access : read-only

WKP_IO13 : Wakeup from external IO13
bits : 7 - 7 (1 bit)
access : read-only

WKP_BLUE : Wakeup coms from the timer 1 expiration in the wakeup control block of the BLE radio
bits : 8 - 8 (1 bit)
access : read-only

WKP2_BLUE : Wakeup coms from the timer 2 expiration in the wakeup control block of the BLE radio
bits : 10 - 10 (1 bit)
access : read-only


CLK32K_COUNT

Counter of 32 kHz clock
address_offset : 0xC Bytes (0x0)
size : 16 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLK32K_COUNT CLK32K_COUNT read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLOW_COUNT

SLOW_COUNT : Program the window length (in slow clock period unit) for slow clock measurement
bits : 0 - 8 (9 bit)



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