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NVIC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x11FC byte (0x0)
mem_usage : registers
protection : not protected

Registers

NVIC

SYSTICKRVR

SETENA1

SYSTICKCVR

CLRENA0

SYSTICKCALVR

CLRENA1

SETPEND0

SETPEND1

CLRPEND0

CLRPEND1

ACTIVE0

ACTIVE1

IP0

IP1

IP2

IP3

IP4

IP5

IP6

IP7

IP8

IP9

IP10

IP11

IP12

IP13

IP14

IP15

SYSTICKCSR

CPUIDBR

ICSR

VTOR

AIRCR

SCR

CCR

SHPR0

SHPR1

SHPR2

SHCSR

CFSR

HFSR

DFSR

MMFAR

BFAR

STIR

SETENA0


NVIC

NVIC
address_offset : 0x0 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

NVIC NVIC read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTLINESNUM

INTLINESNUM : INTLINESNUM
bits : 0 - 4 (5 bit)
access : read-only


SYSTICKRVR

SYSTICKRVR
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICKRVR SYSTICKRVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 RELOAD

RELOAD : RELOAD
bits : 0 - 23 (24 bit)
access : read-write


SETENA1

SETENA1
address_offset : 0x100 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETENA1 SETENA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA32 SETENA33 SETENA34 SETENA35 SETENA36 SETENA37 SETENA38 SETENA39 SETENA40 SETENA41 SETENA42 SETENA43 SETENA44 SETENA45 SETENA46 SETENA47 SETENA48 SETENA49 SETENA50 SETENA51 SETENA52 SETENA53 SETENA54 SETENA55 SETENA56 SETENA57 SETENA58 SETENA59 SETENA60 SETENA61 SETENA62 SETENA63

SETENA32 : SETENA32
bits : 0 - 0 (1 bit)
access : read-write

SETENA33 : SETENA33
bits : 1 - 1 (1 bit)
access : read-write

SETENA34 : SETENA34
bits : 2 - 2 (1 bit)
access : read-write

SETENA35 : SETENA35
bits : 3 - 3 (1 bit)
access : read-write

SETENA36 : SETENA36
bits : 4 - 4 (1 bit)
access : read-write

SETENA37 : SETENA37
bits : 5 - 5 (1 bit)
access : read-write

SETENA38 : SETENA38
bits : 6 - 6 (1 bit)
access : read-write

SETENA39 : SETENA39
bits : 7 - 7 (1 bit)
access : read-write

SETENA40 : SETENA40
bits : 8 - 8 (1 bit)
access : read-write

SETENA41 : SETENA41
bits : 9 - 9 (1 bit)
access : read-write

SETENA42 : SETENA42
bits : 10 - 10 (1 bit)
access : read-write

SETENA43 : SETENA43
bits : 11 - 11 (1 bit)
access : read-write

SETENA44 : SETENA44
bits : 12 - 12 (1 bit)
access : read-write

SETENA45 : SETENA45
bits : 13 - 13 (1 bit)
access : read-only

SETENA46 : SETENA46
bits : 14 - 14 (1 bit)
access : read-only

SETENA47 : SETENA47
bits : 15 - 15 (1 bit)
access : read-only

SETENA48 : SETENA48
bits : 16 - 16 (1 bit)
access : read-only

SETENA49 : SETENA49
bits : 17 - 17 (1 bit)
access : read-only

SETENA50 : SETENA50
bits : 18 - 18 (1 bit)
access : read-only

SETENA51 : SETENA51
bits : 19 - 19 (1 bit)
access : read-only

SETENA52 : SETENA52
bits : 20 - 20 (1 bit)
access : read-only

SETENA53 : SETENA53
bits : 21 - 21 (1 bit)
access : read-only

SETENA54 : SETENA54
bits : 22 - 22 (1 bit)
access : read-only

SETENA55 : SETENA55
bits : 23 - 23 (1 bit)
access : read-only

SETENA56 : SETENA56
bits : 24 - 24 (1 bit)
access : read-only

SETENA57 : SETENA57
bits : 25 - 25 (1 bit)
access : read-only

SETENA58 : SETENA58
bits : 26 - 26 (1 bit)
access : read-only

SETENA59 : SETENA59
bits : 27 - 27 (1 bit)
access : read-only

SETENA60 : SETENA60
bits : 28 - 28 (1 bit)
access : read-only

SETENA61 : SETENA61
bits : 29 - 29 (1 bit)
access : read-only

SETENA62 : SETENA62
bits : 30 - 30 (1 bit)
access : read-only

SETENA63 : SETENA63
bits : 31 - 31 (1 bit)
access : read-only


SYSTICKCVR

SYSTICKCVR
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICKCVR SYSTICKCVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CURRENT

CURRENT : CURRENT
bits : 0 - 23 (24 bit)
access : read-write


CLRENA0

CLRENA0
address_offset : 0x17C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRENA0 CLRENA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA0 CLRENA1 CLRENA2 CLRENA3 CLRENA4 CLRENA5 CLRENA6 CLRENA7 CLRENA8 CLRENA9 CLRENA10 CLRENA11 CLRENA12 CLRENA13 CLRENA14 CLRENA15 CLRENA16 CLRENA17 CLRENA18 CLRENA19 CLRENA20 CLRENA21 CLRENA22 CLRENA23 CLRENA24 CLRENA25 CLRENA26 CLRENA27 CLRENA28 CLRENA29 CLRENA30 CLRENA31

CLRENA0 : CLRENA0
bits : 0 - 0 (1 bit)
access : read-only

CLRENA1 : CLRENA1
bits : 1 - 1 (1 bit)
access : read-only

CLRENA2 : CLRENA2
bits : 2 - 2 (1 bit)
access : read-only

CLRENA3 : CLRENA3
bits : 3 - 3 (1 bit)
access : read-only

CLRENA4 : CLRENA4
bits : 4 - 4 (1 bit)
access : read-only

CLRENA5 : CLRENA5
bits : 5 - 5 (1 bit)
access : read-only

CLRENA6 : CLRENA6
bits : 6 - 6 (1 bit)
access : read-only

CLRENA7 : CLRENA7
bits : 7 - 7 (1 bit)
access : read-only

CLRENA8 : CLRENA8
bits : 8 - 8 (1 bit)
access : read-only

CLRENA9 : CLRENA9
bits : 9 - 9 (1 bit)
access : read-only

CLRENA10 : CLRENA10
bits : 10 - 10 (1 bit)
access : read-only

CLRENA11 : CLRENA11
bits : 11 - 11 (1 bit)
access : read-only

CLRENA12 : CLRENA12
bits : 12 - 12 (1 bit)
access : read-only

CLRENA13 : CLRENA13
bits : 13 - 13 (1 bit)
access : read-only

CLRENA14 : CLRENA14
bits : 14 - 14 (1 bit)
access : read-only

CLRENA15 : CLRENA15
bits : 15 - 15 (1 bit)
access : read-only

CLRENA16 : CLRENA16
bits : 16 - 16 (1 bit)
access : read-only

CLRENA17 : CLRENA17
bits : 17 - 17 (1 bit)
access : read-only

CLRENA18 : CLRENA18
bits : 18 - 18 (1 bit)
access : read-only

CLRENA19 : CLRENA19
bits : 19 - 19 (1 bit)
access : read-only

CLRENA20 : CLRENA20
bits : 20 - 20 (1 bit)
access : read-only

CLRENA21 : CLRENA21
bits : 21 - 21 (1 bit)
access : read-only

CLRENA22 : CLRENA22
bits : 22 - 22 (1 bit)
access : read-only

CLRENA23 : CLRENA23
bits : 23 - 23 (1 bit)
access : read-only

CLRENA24 : CLRENA24
bits : 24 - 24 (1 bit)
access : read-only

CLRENA25 : CLRENA25
bits : 25 - 25 (1 bit)
access : read-only

CLRENA26 : CLRENA26
bits : 26 - 26 (1 bit)
access : read-only

CLRENA27 : CLRENA27
bits : 27 - 27 (1 bit)
access : read-only

CLRENA28 : CLRENA28
bits : 28 - 28 (1 bit)
access : read-only

CLRENA29 : CLRENA29
bits : 29 - 29 (1 bit)
access : read-only

CLRENA30 : CLRENA30
bits : 30 - 30 (1 bit)
access : read-only

CLRENA31 : CLRENA31
bits : 31 - 31 (1 bit)
access : read-only


SYSTICKCALVR

SYSTICKCALVR
address_offset : 0x18 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICKCALVR SYSTICKCALVR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TENMS SKEW NOREF

TENMS : TENMS
bits : 0 - 23 (24 bit)
access : read-only

SKEW : SKEW
bits : 30 - 30 (1 bit)
access : read-only

NOREF : NOREF
bits : 31 - 31 (1 bit)
access : read-only


CLRENA1

CLRENA1
address_offset : 0x180 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRENA1 CLRENA1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRENA32 CLRENA33 CLRENA34 CLRENA35 CLRENA36 CLRENA37 CLRENA38 CLRENA39 CLRENA40 CLRENA41 CLRENA42 CLRENA43 CLRENA44 CLRENA45 CLRENA46 CLRENA47 CLRENA48 CLRENA49 CLRENA50 CLRENA51 CLRENA52 CLRENA53 CLRENA54 CLRENA55 CLRENA56 CLRENA57 CLRENA58 CLRENA59 CLRENA60 CLRENA61 CLRENA62 CLRENA63

CLRENA32 : CLRENA32
bits : 0 - 0 (1 bit)
access : read-only

CLRENA33 : CLRENA33
bits : 1 - 1 (1 bit)
access : read-only

CLRENA34 : CLRENA34
bits : 2 - 2 (1 bit)
access : read-only

CLRENA35 : CLRENA35
bits : 3 - 3 (1 bit)
access : read-only

CLRENA36 : CLRENA36
bits : 4 - 4 (1 bit)
access : read-only

CLRENA37 : CLRENA37
bits : 5 - 5 (1 bit)
access : read-only

CLRENA38 : CLRENA38
bits : 6 - 6 (1 bit)
access : read-only

CLRENA39 : CLRENA39
bits : 7 - 7 (1 bit)
access : read-only

CLRENA40 : CLRENA40
bits : 8 - 8 (1 bit)
access : read-only

CLRENA41 : CLRENA41
bits : 9 - 9 (1 bit)
access : read-only

CLRENA42 : CLRENA42
bits : 10 - 10 (1 bit)
access : read-only

CLRENA43 : CLRENA43
bits : 11 - 11 (1 bit)
access : read-only

CLRENA44 : CLRENA44
bits : 12 - 12 (1 bit)
access : read-only

CLRENA45 : CLRENA45
bits : 13 - 13 (1 bit)
access : read-only

CLRENA46 : CLRENA46
bits : 14 - 14 (1 bit)
access : read-only

CLRENA47 : CLRENA47
bits : 15 - 15 (1 bit)
access : read-only

CLRENA48 : CLRENA48
bits : 16 - 16 (1 bit)
access : read-only

CLRENA49 : CLRENA49
bits : 17 - 17 (1 bit)
access : read-only

CLRENA50 : CLRENA50
bits : 18 - 18 (1 bit)
access : read-only

CLRENA51 : CLRENA51
bits : 19 - 19 (1 bit)
access : read-only

CLRENA52 : CLRENA52
bits : 20 - 20 (1 bit)
access : read-only

CLRENA53 : CLRENA53
bits : 21 - 21 (1 bit)
access : read-only

CLRENA54 : CLRENA54
bits : 22 - 22 (1 bit)
access : read-only

CLRENA55 : CLRENA55
bits : 23 - 23 (1 bit)
access : read-only

CLRENA56 : CLRENA56
bits : 24 - 24 (1 bit)
access : read-only

CLRENA57 : CLRENA57
bits : 25 - 25 (1 bit)
access : read-only

CLRENA58 : CLRENA58
bits : 26 - 26 (1 bit)
access : read-only

CLRENA59 : CLRENA59
bits : 27 - 27 (1 bit)
access : read-only

CLRENA60 : CLRENA60
bits : 28 - 28 (1 bit)
access : read-only

CLRENA61 : CLRENA61
bits : 29 - 29 (1 bit)
access : read-only

CLRENA62 : CLRENA62
bits : 30 - 30 (1 bit)
access : read-only

CLRENA63 : CLRENA63
bits : 31 - 31 (1 bit)
access : read-only


SETPEND0

SETPEND0
address_offset : 0x1FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETPEND0 SETPEND0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND0 SETPEND1 SETPEND2 SETPEND3 SETPEND4 SETPEND5 SETPEND6 SETPEND7 SETPEND8 SETPEND9 SETPEND10 SETPEND11 SETPEND12 SETPEND13 SETPEND14 SETPEND15 SETPEND16 SETPEND17 SETPEND18 SETPEND19 SETPEND20 SETPEND21 SETPEND22 SETPEND23 SETPEND24 SETPEND25 SETPEND26 SETPEND27 SETPEND28 SETPEND29 SETPEND30 SETPEND31

SETPEND0 : SETPEND0
bits : 0 - 0 (1 bit)
access : read-write

SETPEND1 : SETPEND1
bits : 1 - 1 (1 bit)
access : read-write

SETPEND2 : SETPEND2
bits : 2 - 2 (1 bit)
access : read-write

SETPEND3 : SETPEND3
bits : 3 - 3 (1 bit)
access : read-write

SETPEND4 : SETPEND4
bits : 4 - 4 (1 bit)
access : read-write

SETPEND5 : SETPEND5
bits : 5 - 5 (1 bit)
access : read-write

SETPEND6 : SETPEND6
bits : 6 - 6 (1 bit)
access : read-write

SETPEND7 : SETPEND7
bits : 7 - 7 (1 bit)
access : read-write

SETPEND8 : SETPEND8
bits : 8 - 8 (1 bit)
access : read-write

SETPEND9 : SETPEND9
bits : 9 - 9 (1 bit)
access : read-write

SETPEND10 : SETPEND10
bits : 10 - 10 (1 bit)
access : read-write

SETPEND11 : SETPEND11
bits : 11 - 11 (1 bit)
access : read-write

SETPEND12 : SETPEND12
bits : 12 - 12 (1 bit)
access : read-write

SETPEND13 : SETPEND13
bits : 13 - 13 (1 bit)
access : read-write

SETPEND14 : SETPEND14
bits : 14 - 14 (1 bit)
access : read-write

SETPEND15 : SETPEND15
bits : 15 - 15 (1 bit)
access : read-write

SETPEND16 : SETPEND16
bits : 16 - 16 (1 bit)
access : read-write

SETPEND17 : SETPEND17
bits : 17 - 17 (1 bit)
access : read-write

SETPEND18 : SETPEND18
bits : 18 - 18 (1 bit)
access : read-write

SETPEND19 : SETPEND19
bits : 19 - 19 (1 bit)
access : read-write

SETPEND20 : SETPEND20
bits : 20 - 20 (1 bit)
access : read-write

SETPEND21 : SETPEND21
bits : 21 - 21 (1 bit)
access : read-write

SETPEND22 : SETPEND22
bits : 22 - 22 (1 bit)
access : read-write

SETPEND23 : SETPEND23
bits : 23 - 23 (1 bit)
access : read-write

SETPEND24 : SETPEND24
bits : 24 - 24 (1 bit)
access : read-write

SETPEND25 : SETPEND25
bits : 25 - 25 (1 bit)
access : read-write

SETPEND26 : SETPEND26
bits : 26 - 26 (1 bit)
access : read-write

SETPEND27 : SETPEND27
bits : 27 - 27 (1 bit)
access : read-write

SETPEND28 : SETPEND28
bits : 28 - 28 (1 bit)
access : read-write

SETPEND29 : SETPEND29
bits : 29 - 29 (1 bit)
access : read-write

SETPEND30 : SETPEND30
bits : 30 - 30 (1 bit)
access : read-write

SETPEND31 : SETPEND31
bits : 31 - 31 (1 bit)
access : read-write


SETPEND1

SETPEND1
address_offset : 0x200 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETPEND1 SETPEND1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETPEND32 SETPEND33 SETPEND34 SETPEND35 SETPEND36 SETPEND37 SETPEND38 SETPEND39 SETPEND40 SETPEND41 SETPEND42 SETPEND43 SETPEND44 SETPEND45 SETPEND46 SETPEND47 SETPEND48 SETPEND49 SETPEND50 SETPEND51 SETPEND52 SETPEND53 SETPEND54 SETPEND55 SETPEND56 SETPEND57 SETPEND58 SETPEND59 SETPEND60 SETPEND61 SETPEND62 SETPEND63

SETPEND32 : SETPEND32
bits : 0 - 0 (1 bit)
access : read-write

SETPEND33 : SETPEND33
bits : 1 - 1 (1 bit)
access : read-write

SETPEND34 : SETPEND34
bits : 2 - 2 (1 bit)
access : read-write

SETPEND35 : SETPEND35
bits : 3 - 3 (1 bit)
access : read-write

SETPEND36 : SETPEND36
bits : 4 - 4 (1 bit)
access : read-write

SETPEND37 : SETPEND37
bits : 5 - 5 (1 bit)
access : read-write

SETPEND38 : SETPEND38
bits : 6 - 6 (1 bit)
access : read-write

SETPEND39 : SETPEND39
bits : 7 - 7 (1 bit)
access : read-write

SETPEND40 : SETPEND40
bits : 8 - 8 (1 bit)
access : read-write

SETPEND41 : SETPEND41
bits : 9 - 9 (1 bit)
access : read-write

SETPEND42 : SETPEND42
bits : 10 - 10 (1 bit)
access : read-write

SETPEND43 : SETPEND43
bits : 11 - 11 (1 bit)
access : read-write

SETPEND44 : SETPEND44
bits : 12 - 12 (1 bit)
access : read-write

SETPEND45 : SETPEND45
bits : 13 - 13 (1 bit)
access : read-only

SETPEND46 : SETPEND46
bits : 14 - 14 (1 bit)
access : read-only

SETPEND47 : SETPEND47
bits : 15 - 15 (1 bit)
access : read-only

SETPEND48 : SETPEND48
bits : 16 - 16 (1 bit)
access : read-only

SETPEND49 : SETPEND49
bits : 17 - 17 (1 bit)
access : read-only

SETPEND50 : SETPEND50
bits : 18 - 18 (1 bit)
access : read-only

SETPEND51 : SETPEND51
bits : 19 - 19 (1 bit)
access : read-only

SETPEND52 : SETPEND52
bits : 20 - 20 (1 bit)
access : read-only

SETPEND53 : SETPEND53
bits : 21 - 21 (1 bit)
access : read-only

SETPEND54 : SETPEND54
bits : 22 - 22 (1 bit)
access : read-only

SETPEND55 : SETPEND55
bits : 23 - 23 (1 bit)
access : read-only

SETPEND56 : SETPEND56
bits : 24 - 24 (1 bit)
access : read-only

SETPEND57 : SETPEND57
bits : 25 - 25 (1 bit)
access : read-only

SETPEND58 : SETPEND58
bits : 26 - 26 (1 bit)
access : read-only

SETPEND59 : SETPEND59
bits : 27 - 27 (1 bit)
access : read-only

SETPEND60 : SETPEND60
bits : 28 - 28 (1 bit)
access : read-only

SETPEND61 : SETPEND61
bits : 29 - 29 (1 bit)
access : read-only

SETPEND62 : SETPEND62
bits : 30 - 30 (1 bit)
access : read-only

SETPEND63 : SETPEND63
bits : 31 - 31 (1 bit)
access : read-only


CLRPEND0

CLRPEND0
address_offset : 0x27C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRPEND0 CLRPEND0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND0 CLRPEND1 CLRPEND2 CLRPEND3 CLRPEND4 CLRPEND5 CLRPEND6 CLRPEND7 CLRPEND8 CLRPEND9 CLRPEND10 CLRPEND11 CLRPEND12 CLRPEND13 CLRPEND14 CLRPEND15 CLRPEND16 CLRPEND17 CLRPEND18 CLRPEND19 CLRPEND20 CLRPEND21 CLRPEND22 CLRPEND23 CLRPEND24 CLRPEND25 CLRPEND26 CLRPEND27 CLRPEND28 CLRPEND29 CLRPEND30 CLRPEND31

CLRPEND0 : CLRPEND0
bits : 0 - 0 (1 bit)
access : read-only

CLRPEND1 : CLRPEND1
bits : 1 - 1 (1 bit)
access : read-only

CLRPEND2 : CLRPEND2
bits : 2 - 2 (1 bit)
access : read-only

CLRPEND3 : CLRPEND3
bits : 3 - 3 (1 bit)
access : read-only

CLRPEND4 : CLRPEND4
bits : 4 - 4 (1 bit)
access : read-only

CLRPEND5 : CLRPEND5
bits : 5 - 5 (1 bit)
access : read-only

CLRPEND6 : CLRPEND6
bits : 6 - 6 (1 bit)
access : read-only

CLRPEND7 : CLRPEND7
bits : 7 - 7 (1 bit)
access : read-only

CLRPEND8 : CLRPEND8
bits : 8 - 8 (1 bit)
access : read-only

CLRPEND9 : CLRPEND9
bits : 9 - 9 (1 bit)
access : read-only

CLRPEND10 : CLRPEND10
bits : 10 - 10 (1 bit)
access : read-only

CLRPEND11 : CLRPEND11
bits : 11 - 11 (1 bit)
access : read-only

CLRPEND12 : CLRPEND12
bits : 12 - 12 (1 bit)
access : read-only

CLRPEND13 : CLRPEND13
bits : 13 - 13 (1 bit)
access : read-only

CLRPEND14 : CLRPEND14
bits : 14 - 14 (1 bit)
access : read-only

CLRPEND15 : CLRPEND15
bits : 15 - 15 (1 bit)
access : read-only

CLRPEND16 : CLRPEND16
bits : 16 - 16 (1 bit)
access : read-only

CLRPEND17 : CLRPEND17
bits : 17 - 17 (1 bit)
access : read-only

CLRPEND18 : CLRPEND18
bits : 18 - 18 (1 bit)
access : read-only

CLRPEND19 : CLRPEND19
bits : 19 - 19 (1 bit)
access : read-only

CLRPEND20 : CLRPEND20
bits : 20 - 20 (1 bit)
access : read-only

CLRPEND21 : CLRPEND21
bits : 21 - 21 (1 bit)
access : read-only

CLRPEND22 : CLRPEND22
bits : 22 - 22 (1 bit)
access : read-only

CLRPEND23 : CLRPEND23
bits : 23 - 23 (1 bit)
access : read-only

CLRPEND24 : CLRPEND24
bits : 24 - 24 (1 bit)
access : read-only

CLRPEND25 : CLRPEND25
bits : 25 - 25 (1 bit)
access : read-only

CLRPEND26 : CLRPEND26
bits : 26 - 26 (1 bit)
access : read-only

CLRPEND27 : CLRPEND27
bits : 27 - 27 (1 bit)
access : read-only

CLRPEND28 : CLRPEND28
bits : 28 - 28 (1 bit)
access : read-only

CLRPEND29 : CLRPEND29
bits : 29 - 29 (1 bit)
access : read-only

CLRPEND30 : CLRPEND30
bits : 30 - 30 (1 bit)
access : read-only

CLRPEND31 : CLRPEND31
bits : 31 - 31 (1 bit)
access : read-only


CLRPEND1

CLRPEND1
address_offset : 0x280 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CLRPEND1 CLRPEND1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CLRPEND32 CLRPEND33 CLRPEND34 CLRPEND35 CLRPEND36 CLRPEND37 CLRPEND38 CLRPEND39 CLRPEND40 CLRPEND41 CLRPEND42 CLRPEND43 CLRPEND44 CLRPEND45 CLRPEND46 CLRPEND47 CLRPEND48 CLRPEND49 CLRPEND50 CLRPEND51 CLRPEND52 CLRPEND53 CLRPEND54 CLRPEND55 CLRPEND56 CLRPEND57 CLRPEND58 CLRPEND59 CLRPEND60 CLRPEND61 CLRPEND62 CLRPEND63

CLRPEND32 : CLRPEND32
bits : 0 - 0 (1 bit)
access : read-only

CLRPEND33 : CLRPEND33
bits : 1 - 1 (1 bit)
access : read-only

CLRPEND34 : CLRPEND34
bits : 2 - 2 (1 bit)
access : read-only

CLRPEND35 : CLRPEND35
bits : 3 - 3 (1 bit)
access : read-only

CLRPEND36 : CLRPEND36
bits : 4 - 4 (1 bit)
access : read-only

CLRPEND37 : CLRPEND37
bits : 5 - 5 (1 bit)
access : read-only

CLRPEND38 : CLRPEND38
bits : 6 - 6 (1 bit)
access : read-only

CLRPEND39 : CLRPEND39
bits : 7 - 7 (1 bit)
access : read-only

CLRPEND40 : CLRPEND40
bits : 8 - 8 (1 bit)
access : read-only

CLRPEND41 : CLRPEND41
bits : 9 - 9 (1 bit)
access : read-only

CLRPEND42 : CLRPEND42
bits : 10 - 10 (1 bit)
access : read-only

CLRPEND43 : CLRPEND43
bits : 11 - 11 (1 bit)
access : read-only

CLRPEND44 : CLRPEND44
bits : 12 - 12 (1 bit)
access : read-only

CLRPEND45 : CLRPEND45
bits : 13 - 13 (1 bit)
access : read-only

CLRPEND46 : CLRPEND46
bits : 14 - 14 (1 bit)
access : read-only

CLRPEND47 : CLRPEND47
bits : 15 - 15 (1 bit)
access : read-only

CLRPEND48 : CLRPEND48
bits : 16 - 16 (1 bit)
access : read-only

CLRPEND49 : CLRPEND49
bits : 17 - 17 (1 bit)
access : read-only

CLRPEND50 : CLRPEND50
bits : 18 - 18 (1 bit)
access : read-only

CLRPEND51 : CLRPEND51
bits : 19 - 19 (1 bit)
access : read-only

CLRPEND52 : CLRPEND52
bits : 20 - 20 (1 bit)
access : read-only

CLRPEND53 : CLRPEND53
bits : 21 - 21 (1 bit)
access : read-only

CLRPEND54 : CLRPEND54
bits : 22 - 22 (1 bit)
access : read-only

CLRPEND55 : CLRPEND55
bits : 23 - 23 (1 bit)
access : read-only

CLRPEND56 : CLRPEND56
bits : 24 - 24 (1 bit)
access : read-only

CLRPEND57 : CLRPEND57
bits : 25 - 25 (1 bit)
access : read-only

CLRPEND58 : CLRPEND58
bits : 26 - 26 (1 bit)
access : read-only

CLRPEND59 : CLRPEND59
bits : 27 - 27 (1 bit)
access : read-only

CLRPEND60 : CLRPEND60
bits : 28 - 28 (1 bit)
access : read-only

CLRPEND61 : CLRPEND61
bits : 29 - 29 (1 bit)
access : read-only

CLRPEND62 : CLRPEND62
bits : 30 - 30 (1 bit)
access : read-only

CLRPEND63 : CLRPEND63
bits : 31 - 31 (1 bit)
access : read-only


ACTIVE0

ACTIVE0
address_offset : 0x2FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACTIVE0 ACTIVE0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE0 ACTIVE1 ACTIVE2 ACTIVE3 ACTIVE4 ACTIVE5 ACTIVE6 ACTIVE7 ACTIVE8 ACTIVE9 ACTIVE10 ACTIVE11 ACTIVE12 ACTIVE13 ACTIVE14 ACTIVE15 ACTIVE16 ACTIVE17 ACTIVE18 ACTIVE19 ACTIVE20 ACTIVE21 ACTIVE22 ACTIVE23 ACTIVE24 ACTIVE25 ACTIVE26 ACTIVE27 ACTIVE28 ACTIVE29 ACTIVE30 ACTIVE31

ACTIVE0 : ACTIVE0
bits : 0 - 0 (1 bit)
access : read-only

ACTIVE1 : ACTIVE1
bits : 1 - 1 (1 bit)
access : read-only

ACTIVE2 : ACTIVE2
bits : 2 - 2 (1 bit)
access : read-only

ACTIVE3 : ACTIVE3
bits : 3 - 3 (1 bit)
access : read-only

ACTIVE4 : ACTIVE4
bits : 4 - 4 (1 bit)
access : read-only

ACTIVE5 : ACTIVE5
bits : 5 - 5 (1 bit)
access : read-only

ACTIVE6 : ACTIVE6
bits : 6 - 6 (1 bit)
access : read-only

ACTIVE7 : ACTIVE7
bits : 7 - 7 (1 bit)
access : read-only

ACTIVE8 : ACTIVE8
bits : 8 - 8 (1 bit)
access : read-only

ACTIVE9 : ACTIVE9
bits : 9 - 9 (1 bit)
access : read-only

ACTIVE10 : ACTIVE10
bits : 10 - 10 (1 bit)
access : read-only

ACTIVE11 : ACTIVE11
bits : 11 - 11 (1 bit)
access : read-only

ACTIVE12 : ACTIVE12
bits : 12 - 12 (1 bit)
access : read-only

ACTIVE13 : ACTIVE13
bits : 13 - 13 (1 bit)
access : read-only

ACTIVE14 : ACTIVE14
bits : 14 - 14 (1 bit)
access : read-only

ACTIVE15 : ACTIVE15
bits : 15 - 15 (1 bit)
access : read-only

ACTIVE16 : ACTIVE16
bits : 16 - 16 (1 bit)
access : read-only

ACTIVE17 : ACTIVE17
bits : 17 - 17 (1 bit)
access : read-only

ACTIVE18 : ACTIVE18
bits : 18 - 18 (1 bit)
access : read-only

ACTIVE19 : ACTIVE19
bits : 19 - 19 (1 bit)
access : read-only

ACTIVE20 : ACTIVE20
bits : 20 - 20 (1 bit)
access : read-only

ACTIVE21 : ACTIVE21
bits : 21 - 21 (1 bit)
access : read-only

ACTIVE22 : ACTIVE22
bits : 22 - 22 (1 bit)
access : read-only

ACTIVE23 : ACTIVE23
bits : 23 - 23 (1 bit)
access : read-only

ACTIVE24 : ACTIVE24
bits : 24 - 24 (1 bit)
access : read-only

ACTIVE25 : ACTIVE25
bits : 25 - 25 (1 bit)
access : read-only

ACTIVE26 : ACTIVE26
bits : 26 - 26 (1 bit)
access : read-only

ACTIVE27 : ACTIVE27
bits : 27 - 27 (1 bit)
access : read-only

ACTIVE28 : ACTIVE28
bits : 28 - 28 (1 bit)
access : read-only

ACTIVE29 : ACTIVE29
bits : 29 - 29 (1 bit)
access : read-only

ACTIVE30 : ACTIVE30
bits : 30 - 30 (1 bit)
access : read-only

ACTIVE31 : ACTIVE31
bits : 31 - 31 (1 bit)
access : read-only


ACTIVE1

ACTIVE1
address_offset : 0x300 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ACTIVE1 ACTIVE1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ACTIVE32 ACTIVE33 ACTIVE34 ACTIVE35 ACTIVE36 ACTIVE37 ACTIVE38 ACTIVE39 ACTIVE40 ACTIVE41 ACTIVE42 ACTIVE43 ACTIVE44 ACTIVE45 ACTIVE46 ACTIVE47 ACTIVE48 ACTIVE49 ACTIVE50 ACTIVE51 ACTIVE52 ACTIVE53 ACTIVE54 ACTIVE55 ACTIVE56 ACTIVE57 ACTIVE58 ACTIVE59 ACTIVE60 ACTIVE61 ACTIVE62 ACTIVE63

ACTIVE32 : ACTIVE32
bits : 0 - 0 (1 bit)
access : read-only

ACTIVE33 : ACTIVE33
bits : 1 - 1 (1 bit)
access : read-only

ACTIVE34 : ACTIVE34
bits : 2 - 2 (1 bit)
access : read-only

ACTIVE35 : ACTIVE35
bits : 3 - 3 (1 bit)
access : read-only

ACTIVE36 : ACTIVE36
bits : 4 - 4 (1 bit)
access : read-only

ACTIVE37 : ACTIVE37
bits : 5 - 5 (1 bit)
access : read-only

ACTIVE38 : ACTIVE38
bits : 6 - 6 (1 bit)
access : read-only

ACTIVE39 : ACTIVE39
bits : 7 - 7 (1 bit)
access : read-only

ACTIVE40 : ACTIVE40
bits : 8 - 8 (1 bit)
access : read-only

ACTIVE41 : ACTIVE41
bits : 9 - 9 (1 bit)
access : read-only

ACTIVE42 : ACTIVE42
bits : 10 - 10 (1 bit)
access : read-only

ACTIVE43 : ACTIVE43
bits : 11 - 11 (1 bit)
access : read-only

ACTIVE44 : ACTIVE44
bits : 12 - 12 (1 bit)
access : read-only

ACTIVE45 : ACTIVE45
bits : 13 - 13 (1 bit)
access : read-only

ACTIVE46 : ACTIVE46
bits : 14 - 14 (1 bit)
access : read-only

ACTIVE47 : ACTIVE47
bits : 15 - 15 (1 bit)
access : read-only

ACTIVE48 : ACTIVE48
bits : 16 - 16 (1 bit)
access : read-only

ACTIVE49 : ACTIVE49
bits : 17 - 17 (1 bit)
access : read-only

ACTIVE50 : ACTIVE50
bits : 18 - 18 (1 bit)
access : read-only

ACTIVE51 : ACTIVE51
bits : 19 - 19 (1 bit)
access : read-only

ACTIVE52 : ACTIVE52
bits : 20 - 20 (1 bit)
access : read-only

ACTIVE53 : ACTIVE53
bits : 21 - 21 (1 bit)
access : read-only

ACTIVE54 : ACTIVE54
bits : 22 - 22 (1 bit)
access : read-only

ACTIVE55 : ACTIVE55
bits : 23 - 23 (1 bit)
access : read-only

ACTIVE56 : ACTIVE56
bits : 24 - 24 (1 bit)
access : read-only

ACTIVE57 : ACTIVE57
bits : 25 - 25 (1 bit)
access : read-only

ACTIVE58 : ACTIVE58
bits : 26 - 26 (1 bit)
access : read-only

ACTIVE59 : ACTIVE59
bits : 27 - 27 (1 bit)
access : read-only

ACTIVE60 : ACTIVE60
bits : 28 - 28 (1 bit)
access : read-only

ACTIVE61 : ACTIVE61
bits : 29 - 29 (1 bit)
access : read-only

ACTIVE62 : ACTIVE62
bits : 30 - 30 (1 bit)
access : read-only

ACTIVE63 : ACTIVE63
bits : 31 - 31 (1 bit)
access : read-only


IP0

IP0
address_offset : 0x3FC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP0 IP0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_0 PRI_1 PRI_2 PRI_3

PRI_0 : PRI_0
bits : 0 - 7 (8 bit)
access : read-only

PRI_1 : PRI_1
bits : 8 - 15 (8 bit)
access : read-only

PRI_2 : PRI_2
bits : 16 - 23 (8 bit)
access : read-only

PRI_3 : PRI_3
bits : 24 - 31 (8 bit)
access : read-only


IP1

IP1
address_offset : 0x400 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP1 IP1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_4 PRI_5 PRI_6 PRI_7

PRI_4 : PRI_4
bits : 0 - 7 (8 bit)
access : read-only

PRI_5 : PRI_5
bits : 8 - 15 (8 bit)
access : read-only

PRI_6 : PRI_6
bits : 16 - 23 (8 bit)
access : read-only

PRI_7 : PRI_7
bits : 24 - 31 (8 bit)
access : read-only


IP2

IP2
address_offset : 0x404 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP2 IP2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_8 PRI_9 PRI_10 PRI_11

PRI_8 : PRI_8
bits : 0 - 7 (8 bit)
access : read-only

PRI_9 : PRI_9
bits : 8 - 15 (8 bit)
access : read-only

PRI_10 : PRI_10
bits : 16 - 23 (8 bit)
access : read-only

PRI_11 : PRI_11
bits : 24 - 31 (8 bit)
access : read-only


IP3

IP3
address_offset : 0x408 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP3 IP3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_12 PRI_13 PRI_14 PRI_15

PRI_12 : PRI_12
bits : 0 - 7 (8 bit)
access : read-only

PRI_13 : PRI_13
bits : 8 - 15 (8 bit)
access : read-only

PRI_14 : PRI_14
bits : 16 - 23 (8 bit)
access : read-only

PRI_15 : PRI_15
bits : 24 - 31 (8 bit)
access : read-only


IP4

IP4
address_offset : 0x40C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP4 IP4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_16 PRI_17 PRI_18 PRI_19

PRI_16 : PRI_16
bits : 0 - 7 (8 bit)
access : read-only

PRI_17 : PRI_17
bits : 8 - 15 (8 bit)
access : read-only

PRI_18 : PRI_18
bits : 16 - 23 (8 bit)
access : read-only

PRI_19 : PRI_19
bits : 24 - 31 (8 bit)
access : read-only


IP5

IP5
address_offset : 0x410 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP5 IP5 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_20 PRI_21 PRI_22 PRI_23

PRI_20 : PRI_20
bits : 0 - 7 (8 bit)
access : read-only

PRI_21 : PRI_21
bits : 8 - 15 (8 bit)
access : read-only

PRI_22 : PRI_22
bits : 16 - 23 (8 bit)
access : read-only

PRI_23 : PRI_23
bits : 24 - 31 (8 bit)
access : read-only


IP6

IP6
address_offset : 0x414 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP6 IP6 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_24 PRI_25 PRI_26 PRI_27

PRI_24 : PRI_24
bits : 0 - 7 (8 bit)
access : read-only

PRI_25 : PRI_25
bits : 8 - 15 (8 bit)
access : read-only

PRI_26 : PRI_26
bits : 16 - 23 (8 bit)
access : read-only

PRI_27 : PRI_27
bits : 24 - 31 (8 bit)
access : read-only


IP7

IP7
address_offset : 0x418 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP7 IP7 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_28 PRI_29 PRI_30 PRI_31

PRI_28 : PRI_28
bits : 0 - 7 (8 bit)
access : read-only

PRI_29 : PRI_29
bits : 8 - 15 (8 bit)
access : read-only

PRI_30 : PRI_30
bits : 16 - 23 (8 bit)
access : read-only

PRI_31 : PRI_31
bits : 24 - 31 (8 bit)
access : read-only


IP8

IP8
address_offset : 0x41C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP8 IP8 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_32 PRI_33 PRI_34 PRI_35

PRI_32 : PRI_32
bits : 0 - 7 (8 bit)
access : read-only

PRI_33 : PRI_33
bits : 8 - 15 (8 bit)
access : read-only

PRI_34 : PRI_34
bits : 16 - 23 (8 bit)
access : read-only

PRI_35 : PRI_35
bits : 24 - 31 (8 bit)
access : read-only


IP9

IP9
address_offset : 0x420 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP9 IP9 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_36 PRI_37 PRI_38 PRI_39

PRI_36 : PRI_36
bits : 0 - 7 (8 bit)
access : read-only

PRI_37 : PRI_37
bits : 8 - 15 (8 bit)
access : read-only

PRI_38 : PRI_38
bits : 16 - 23 (8 bit)
access : read-only

PRI_39 : PRI_39
bits : 24 - 31 (8 bit)
access : read-only


IP10

IP10
address_offset : 0x424 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP10 IP10 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_40 PRI_41 PRI_42 PRI_43

PRI_40 : PRI_40
bits : 0 - 7 (8 bit)
access : read-only

PRI_41 : PRI_41
bits : 8 - 15 (8 bit)
access : read-only

PRI_42 : PRI_42
bits : 16 - 23 (8 bit)
access : read-only

PRI_43 : PRI_43
bits : 24 - 31 (8 bit)
access : read-only


IP11

IP11
address_offset : 0x428 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP11 IP11 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_44 PRI_45 PRI_46 PRI_47

PRI_44 : PRI_44
bits : 0 - 7 (8 bit)
access : read-only

PRI_45 : PRI_45
bits : 8 - 15 (8 bit)
access : read-only

PRI_46 : PRI_46
bits : 16 - 23 (8 bit)
access : read-only

PRI_47 : PRI_47
bits : 24 - 31 (8 bit)
access : read-only


IP12

IP12
address_offset : 0x42C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP12 IP12 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_48 PRI_49 PRI_50 PRI_51

PRI_48 : PRI_48
bits : 0 - 7 (8 bit)
access : read-only

PRI_49 : PRI_49
bits : 8 - 15 (8 bit)
access : read-only

PRI_50 : PRI_50
bits : 16 - 23 (8 bit)
access : read-only

PRI_51 : PRI_51
bits : 24 - 31 (8 bit)
access : read-only


IP13

IP13
address_offset : 0x430 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP13 IP13 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_52 PRI_53 PRI_54 PRI_55

PRI_52 : PRI_52
bits : 0 - 7 (8 bit)
access : read-only

PRI_53 : PRI_53
bits : 8 - 15 (8 bit)
access : read-only

PRI_54 : PRI_54
bits : 16 - 23 (8 bit)
access : read-only

PRI_55 : PRI_55
bits : 24 - 31 (8 bit)
access : read-only


IP14

IP14
address_offset : 0x434 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP14 IP14 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_56 PRI_57 PRI_58 PRI_59

PRI_56 : PRI_56
bits : 0 - 7 (8 bit)
access : read-only

PRI_57 : PRI_57
bits : 8 - 15 (8 bit)
access : read-only

PRI_58 : PRI_58
bits : 16 - 23 (8 bit)
access : read-only

PRI_59 : PRI_59
bits : 24 - 31 (8 bit)
access : read-only


IP15

IP15
address_offset : 0x438 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IP15 IP15 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_60 PRI_61 PRI_62 PRI_63

PRI_60 : PRI_60
bits : 0 - 7 (8 bit)
access : read-only

PRI_61 : PRI_61
bits : 8 - 15 (8 bit)
access : read-only

PRI_62 : PRI_62
bits : 16 - 23 (8 bit)
access : read-only

PRI_63 : PRI_63
bits : 24 - 31 (8 bit)
access : read-only


SYSTICKCSR

SYSTICKCSR
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SYSTICKCSR SYSTICKCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ENABLE TICKINT CLKSOURCE COUNTFLAG

ENABLE : ENABLE
bits : 0 - 0 (1 bit)
access : read-write

TICKINT : TICKINT
bits : 1 - 1 (1 bit)
access : read-write

CLKSOURCE : CLKSOURCE
bits : 2 - 2 (1 bit)
access : read-write

COUNTFLAG : COUNTFLAG
bits : 16 - 16 (1 bit)
access : read-only


CPUIDBR

CPUIDBR
address_offset : 0xCFC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CPUIDBR CPUIDBR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 REVISION PARTNO VARIANT IMPLEMENTER

REVISION : REVISION
bits : 0 - 3 (4 bit)
access : read-only

PARTNO : PARTNO
bits : 4 - 15 (12 bit)
access : read-only

VARIANT : VARIANT
bits : 20 - 23 (4 bit)
access : read-only

IMPLEMENTER : IMPLEMENTER
bits : 24 - 31 (8 bit)
access : read-only


ICSR

ICSR
address_offset : 0xD00 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ICSR ICSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VECTACTIVE RETTOBASE VECTPENDING ISRPENDING ISRPREEMPT PENDSTCLR PENDSTSET PENDSVCLR PENDSVSET NMIPENDSET

VECTACTIVE : VECTACTIVE
bits : 0 - 9 (10 bit)
access : read-only

RETTOBASE : RETTOBASE
bits : 11 - 11 (1 bit)
access : read-only

VECTPENDING : VECTPENDING
bits : 12 - 21 (10 bit)
access : read-only

ISRPENDING : ISRPENDING
bits : 22 - 22 (1 bit)
access : read-only

ISRPREEMPT : ISRPREEMPT
bits : 23 - 23 (1 bit)
access : read-only

PENDSTCLR : PENDSTCLR
bits : 25 - 25 (1 bit)
access : read-only

PENDSTSET : PENDSTSET
bits : 26 - 26 (1 bit)
access : read-only

PENDSVCLR : PENDSVCLR
bits : 27 - 27 (1 bit)
access : read-only

PENDSVSET : PENDSVSET
bits : 28 - 28 (1 bit)
access : read-write

NMIPENDSET : NMIPENDSET
bits : 31 - 31 (1 bit)
access : read-only


VTOR

VTOR
address_offset : 0xD04 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

VTOR VTOR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TBLOFF TBLBASE

TBLOFF : TBLOFF
bits : 7 - 28 (22 bit)
access : read-write

TBLBASE : TBLBASE
bits : 29 - 29 (1 bit)
access : read-write


AIRCR

AIRCR
address_offset : 0xD08 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

AIRCR AIRCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VECTRESET VECTCLRACTIVE SYSRESETREQ PRIGROUP ENDIANESS VECTKEY

VECTRESET : VECTRESET
bits : 0 - 0 (1 bit)
access : read-only

VECTCLRACTIVE : VECTCLRACTIVE
bits : 1 - 1 (1 bit)
access : read-only

SYSRESETREQ : SYSRESETREQ
bits : 2 - 2 (1 bit)
access : read-only

PRIGROUP : PRIGROUP
bits : 8 - 10 (3 bit)
access : read-only

ENDIANESS : ENDIANESS
bits : 15 - 15 (1 bit)
access : read-only

VECTKEY : VECTKEY
bits : 16 - 31 (16 bit)
access : read-only


SCR

SCR
address_offset : 0xD0C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SCR SCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SLEEPONEXIT SLEEPDEEP SEVONPEND

SLEEPONEXIT : SLEEPONEXIT
bits : 1 - 1 (1 bit)
access : read-write

SLEEPDEEP : SLEEPDEEP
bits : 2 - 2 (1 bit)
access : read-write

SEVONPEND : SEVONPEND
bits : 4 - 4 (1 bit)
access : read-write


CCR

CCR
address_offset : 0xD10 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CCR CCR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 NONEBASETHRDENA USERSETMPEND UNALIGN_TRP DIV_0_TRP BFHFNMIGN STKALIGN

NONEBASETHRDENA : NONEBASETHRDENA
bits : 0 - 0 (1 bit)
access : read-write

USERSETMPEND : USERSETMPEND
bits : 1 - 1 (1 bit)
access : read-write

UNALIGN_TRP : UNALIGN_TRP
bits : 3 - 3 (1 bit)
access : read-write

DIV_0_TRP : DIV_0_TRP
bits : 4 - 4 (1 bit)
access : read-write

BFHFNMIGN : BFHFNMIGN
bits : 8 - 8 (1 bit)
access : read-write

STKALIGN : STKALIGN
bits : 9 - 9 (1 bit)
access : read-write


SHPR0

SHPR0
address_offset : 0xD14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SHPR0 SHPR0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_4 PRI_5 PRI_6 PRI_7

PRI_4 : PRI_4
bits : 0 - 7 (8 bit)
access : read-only

PRI_5 : PRI_5
bits : 8 - 15 (8 bit)
access : read-only

PRI_6 : PRI_6
bits : 16 - 23 (8 bit)
access : read-only

PRI_7 : PRI_7
bits : 24 - 31 (8 bit)
access : read-only


SHPR1

SHPR1
address_offset : 0xD18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SHPR1 SHPR1 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_8 PRI_9 PRI_10 PRI_11

PRI_8 : PRI_8
bits : 0 - 7 (8 bit)
access : read-only

PRI_9 : PRI_9
bits : 8 - 15 (8 bit)
access : read-only

PRI_10 : PRI_10
bits : 16 - 23 (8 bit)
access : read-only

PRI_11 : PRI_11
bits : 24 - 31 (8 bit)
access : read-only


SHPR2

SHPR2
address_offset : 0xD1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SHPR2 SHPR2 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PRI_12 PRI_13 PRI_14 PRI_15

PRI_12 : PRI_12
bits : 0 - 7 (8 bit)
access : read-only

PRI_13 : PRI_13
bits : 8 - 15 (8 bit)
access : read-only

PRI_14 : PRI_14
bits : 16 - 23 (8 bit)
access : read-only

PRI_15 : PRI_15
bits : 24 - 31 (8 bit)
access : read-only


SHCSR

SHCSR
address_offset : 0xD20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SHCSR SHCSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 MEMFAULTACT BUSFAULTACT USGFAULTACT SVCALLACT MONITORACT PENDSVACT SYSTICKACT MEMFAULTPENDED BUSFAULTPENDED SVCALLPENDED MEMFAULTENA BUSFAULTENA USGFAULTENA

MEMFAULTACT : MEMFAULTACT
bits : 0 - 0 (1 bit)
access : read-write

BUSFAULTACT : BUSFAULTACT
bits : 1 - 1 (1 bit)
access : read-write

USGFAULTACT : USGFAULTACT
bits : 3 - 3 (1 bit)
access : read-write

SVCALLACT : SVCALLACT
bits : 7 - 7 (1 bit)
access : read-write

MONITORACT : MONITORACT
bits : 8 - 8 (1 bit)
access : read-write

PENDSVACT : PENDSVACT
bits : 10 - 10 (1 bit)
access : read-write

SYSTICKACT : SYSTICKACT
bits : 11 - 11 (1 bit)
access : read-write

MEMFAULTPENDED : MEMFAULTPENDED
bits : 13 - 13 (1 bit)
access : read-write

BUSFAULTPENDED : BUSFAULTPENDED
bits : 14 - 14 (1 bit)
access : read-write

SVCALLPENDED : SVCALLPENDED
bits : 15 - 15 (1 bit)
access : read-write

MEMFAULTENA : MEMFAULTENA
bits : 16 - 16 (1 bit)
access : read-write

BUSFAULTENA : BUSFAULTENA
bits : 17 - 17 (1 bit)
access : read-write

USGFAULTENA : USGFAULTENA
bits : 18 - 18 (1 bit)
access : read-write


CFSR

CFSR
address_offset : 0xD24 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CFSR CFSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 IACCVIOL DACCVIOL MUNSTKERR MSTKERR MMARVALID IBUSERR PRECISERR IMPRECISERR UNSTKERR STKERR BFARVALID UNDEFINSTR INVSTATE INVPC NOCP UNALIGNED DIVBYZERO

IACCVIOL : IACCVIOL
bits : 0 - 0 (1 bit)
access : read-only

DACCVIOL : DACCVIOL
bits : 1 - 1 (1 bit)
access : read-only

MUNSTKERR : MUNSTKERR
bits : 3 - 3 (1 bit)
access : read-only

MSTKERR : MSTKERR
bits : 4 - 4 (1 bit)
access : read-only

MMARVALID : MMARVALID
bits : 7 - 7 (1 bit)
access : read-only

IBUSERR : IBUSERR
bits : 8 - 8 (1 bit)
access : read-only

PRECISERR : PRECISERR
bits : 9 - 9 (1 bit)
access : read-only

IMPRECISERR : IMPRECISERR
bits : 10 - 10 (1 bit)
access : read-only

UNSTKERR : UNSTKERR
bits : 11 - 11 (1 bit)
access : read-only

STKERR : STKERR
bits : 12 - 12 (1 bit)
access : read-only

BFARVALID : BFARVALID
bits : 15 - 15 (1 bit)
access : read-only

UNDEFINSTR : UNDEFINSTR
bits : 16 - 16 (1 bit)
access : read-only

INVSTATE : INVSTATE
bits : 17 - 17 (1 bit)
access : read-only

INVPC : INVPC
bits : 18 - 18 (1 bit)
access : read-only

NOCP : NOCP
bits : 19 - 19 (1 bit)
access : read-only

UNALIGNED : UNALIGNED
bits : 24 - 24 (1 bit)
access : read-only

DIVBYZERO : DIVBYZERO
bits : 25 - 25 (1 bit)
access : read-only


HFSR

HFSR
address_offset : 0xD28 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

HFSR HFSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VECTTBL FORCED DEBUGEVT

VECTTBL : VECTTBL
bits : 1 - 1 (1 bit)
access : read-only

FORCED : FORCED
bits : 30 - 30 (1 bit)
access : read-only

DEBUGEVT : DEBUGEVT
bits : 31 - 31 (1 bit)
access : read-only


DFSR

DFSR
address_offset : 0xD2C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DFSR DFSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 HALTED BKPT DWTTRAP VCATCH EXTERNAL

HALTED : HALTED
bits : 0 - 0 (1 bit)
access : read-only

BKPT : BKPT
bits : 1 - 1 (1 bit)
access : read-only

DWTTRAP : DWTTRAP
bits : 2 - 2 (1 bit)
access : read-only

VCATCH : VCATCH
bits : 3 - 3 (1 bit)
access : read-only

EXTERNAL : EXTERNAL
bits : 4 - 4 (1 bit)
access : read-only


MMFAR

MMFAR
address_offset : 0xD30 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

MMFAR MMFAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BFAR

BFAR
address_offset : 0xD34 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BFAR BFAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

STIR

STIR
address_offset : 0xEFC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

STIR STIR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 INTID

INTID : INTID
bits : 0 - 8 (9 bit)
access : read-only


SETENA0

SETENA0
address_offset : 0xFC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

SETENA0 SETENA0 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SETENA0 SETENA1 SETENA2 SETENA3 SETENA4 SETENA5 SETENA6 SETENA7 SETENA8 SETENA9 SETENA10 SETENA11 SETENA12 SETENA13 SETENA14 SETENA15 SETENA16 SETENA17 SETENA18 SETENA19 SETENA20 SETENA21 SETENA22 SETENA23 SETENA24 SETENA25 SETENA26 SETENA27 SETENA28 SETENA29 SETENA30 SETENA31

SETENA0 : SETENA0
bits : 0 - 0 (1 bit)
access : read-write

SETENA1 : SETENA1
bits : 1 - 1 (1 bit)
access : read-write

SETENA2 : SETENA2
bits : 2 - 2 (1 bit)
access : read-write

SETENA3 : SETENA3
bits : 3 - 3 (1 bit)
access : read-write

SETENA4 : SETENA4
bits : 4 - 4 (1 bit)
access : read-write

SETENA5 : SETENA5
bits : 5 - 5 (1 bit)
access : read-write

SETENA6 : SETENA6
bits : 6 - 6 (1 bit)
access : read-write

SETENA7 : SETENA7
bits : 7 - 7 (1 bit)
access : read-write

SETENA8 : SETENA8
bits : 8 - 8 (1 bit)
access : read-write

SETENA9 : SETENA9
bits : 9 - 9 (1 bit)
access : read-write

SETENA10 : SETENA10
bits : 10 - 10 (1 bit)
access : read-write

SETENA11 : SETENA11
bits : 11 - 11 (1 bit)
access : read-write

SETENA12 : SETENA12
bits : 12 - 12 (1 bit)
access : read-write

SETENA13 : SETENA13
bits : 13 - 13 (1 bit)
access : read-write

SETENA14 : SETENA14
bits : 14 - 14 (1 bit)
access : read-write

SETENA15 : SETENA15
bits : 15 - 15 (1 bit)
access : read-write

SETENA16 : SETENA16
bits : 16 - 16 (1 bit)
access : read-write

SETENA17 : SETENA17
bits : 17 - 17 (1 bit)
access : read-write

SETENA18 : SETENA18
bits : 18 - 18 (1 bit)
access : read-write

SETENA19 : SETENA19
bits : 19 - 19 (1 bit)
access : read-write

SETENA20 : SETENA20
bits : 20 - 20 (1 bit)
access : read-write

SETENA21 : SETENA21
bits : 21 - 21 (1 bit)
access : read-write

SETENA22 : SETENA22
bits : 22 - 22 (1 bit)
access : read-write

SETENA23 : SETENA23
bits : 23 - 23 (1 bit)
access : read-write

SETENA24 : SETENA24
bits : 24 - 24 (1 bit)
access : read-write

SETENA25 : SETENA25
bits : 25 - 25 (1 bit)
access : read-write

SETENA26 : SETENA26
bits : 26 - 26 (1 bit)
access : read-write

SETENA27 : SETENA27
bits : 27 - 27 (1 bit)
access : read-write

SETENA28 : SETENA28
bits : 28 - 28 (1 bit)
access : read-write

SETENA29 : SETENA29
bits : 29 - 29 (1 bit)
access : read-write

SETENA30 : SETENA30
bits : 30 - 30 (1 bit)
access : read-write

SETENA31 : SETENA31
bits : 31 - 31 (1 bit)
access : read-write



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