\n

COMP

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CSR


CSR

COMP comparator control and status register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CSR CSR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 _10KPU _400KPU _10KPD _400KPD CMP1EN CMP1OUT CMP2EN SPEED CMP2OUT VREFOUTEN WNDEN INSEL OUTSEL

_10KPU : 10KPU
bits : 0 - 0 (1 bit)

_400KPU : 400KPU
bits : 1 - 1 (1 bit)

_10KPD : 10KPD
bits : 2 - 2 (1 bit)

_400KPD : 400KPD
bits : 3 - 3 (1 bit)

CMP1EN : CMP1EN
bits : 4 - 4 (1 bit)

CMP1OUT : CMP1OUT
bits : 7 - 7 (1 bit)

CMP2EN : CMP2EN
bits : 10 - 10 (1 bit)

SPEED : SPEED
bits : 12 - 12 (1 bit)

CMP2OUT : CMP2OUT
bits : 13 - 13 (1 bit)

VREFOUTEN : VREFOUTEN
bits : 16 - 16 (1 bit)

WNDEN : WNDEN
bits : 17 - 17 (1 bit)

INSEL : INSEL
bits : 18 - 20 (3 bit)

OUTSEL : OUTSEL
bits : 21 - 23 (3 bit)



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