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RTC

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected

Registers

TR

PRER

WUTR

CALIBR

ALRMAR

ALRMBR

WPR

TSTR

TSDR

DR

TAFCR

BK0R

BK1R

BK2R

BK3R

BK4R

BK5R

BK6R

BK7R

BK8R

BK9R

BK10R

BK11R

CR

BK12R

BK13R

BK14R

BK15R

BK16R

BK17R

BK18R

BK19R

ISR


TR

RTC time register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

TR TR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MNU MNT HU HT PM

SU : SU
bits : 0 - 3 (4 bit)

ST : ST
bits : 4 - 6 (3 bit)

MNU : MNU
bits : 8 - 11 (4 bit)

MNT : MNT
bits : 12 - 14 (3 bit)

HU : HU
bits : 16 - 19 (4 bit)

HT : HT
bits : 20 - 21 (2 bit)

PM : PM
bits : 22 - 22 (1 bit)


PRER

RTC prescaler register
address_offset : 0x10 Bytes (0x0)
size : -1 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

PRER PRER read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PREDIV_S PREDIV_A

PREDIV_S : PREDIV_S
bits : 0 - 12 (13 bit)

PREDIV_A : PREDIV_A
bits : 16 - 22 (7 bit)


WUTR

RTC wakeup timer register
address_offset : 0x14 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

WUTR WUTR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUARV

WUARV : WUARV
bits : 0 - 15 (16 bit)


CALIBR

RTC calibration register
address_offset : 0x18 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CALIBR CALIBR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DC DCS

DC : DC
bits : 0 - 4 (5 bit)

DCS : DCS
bits : 7 - 7 (1 bit)


ALRMAR

RTC alarm A register
address_offset : 0x1C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMAR ALRMAR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MSK0 MNU MNT MSK1 HU HT PM MSK2 DU DT WDSEL MSK3

SU : SU
bits : 0 - 3 (4 bit)

ST : ST
bits : 4 - 6 (3 bit)

MSK0 : MSK0
bits : 7 - 7 (1 bit)

MNU : MNU
bits : 8 - 11 (4 bit)

MNT : MNT
bits : 12 - 14 (3 bit)

MSK1 : MSK1
bits : 15 - 15 (1 bit)

HU : HU
bits : 16 - 19 (4 bit)

HT : HT
bits : 20 - 21 (2 bit)

PM : PM
bits : 22 - 22 (1 bit)

MSK2 : MSK2
bits : 23 - 23 (1 bit)

DU : DU
bits : 24 - 27 (4 bit)

DT : DT
bits : 28 - 29 (2 bit)

WDSEL : WDSEL
bits : 30 - 30 (1 bit)

MSK3 : MSK3
bits : 31 - 31 (1 bit)


ALRMBR

RTC alarm B register
address_offset : 0x20 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ALRMBR ALRMBR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MSK0 MNU MNT MSK1 HU HT PM MSK2 DU DT WDSEL MSK3

SU : SU
bits : 0 - 3 (4 bit)

ST : ST
bits : 4 - 6 (3 bit)

MSK0 : MSK0
bits : 7 - 7 (1 bit)

MNU : MNU
bits : 8 - 11 (4 bit)

MNT : MNT
bits : 12 - 14 (3 bit)

MSK1 : MSK1
bits : 15 - 15 (1 bit)

HU : HU
bits : 16 - 19 (4 bit)

HT : HT
bits : 20 - 21 (2 bit)

PM : PM
bits : 22 - 22 (1 bit)

MSK2 : MSK2
bits : 23 - 23 (1 bit)

DU : DU
bits : 24 - 27 (4 bit)

DT : DT
bits : 28 - 29 (2 bit)

WDSEL : WDSEL
bits : 30 - 30 (1 bit)

MSK3 : MSK3
bits : 31 - 31 (1 bit)


WPR

RTC write protection register
address_offset : 0x24 Bytes (0x0)
access : write-only
reset_value : 0x0
reset_Mask : 0x0

WPR WPR write-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 KEY

KEY : KEY
bits : 0 - 7 (8 bit)


TSTR

RTC time stamp time register
address_offset : 0x30 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TSTR TSTR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 SU ST MNU MNT HU HT PM

SU : SU
bits : 0 - 3 (4 bit)

ST : ST
bits : 4 - 6 (3 bit)

MNU : MNU
bits : 8 - 11 (4 bit)

MNT : MNT
bits : 12 - 14 (3 bit)

HU : HU
bits : 16 - 19 (4 bit)

HT : HT
bits : 20 - 21 (2 bit)

PM : PM
bits : 22 - 22 (1 bit)


TSDR

RTC time stamp date register
address_offset : 0x34 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TSDR TSDR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DU DT MU MT WDU

DU : DU
bits : 0 - 3 (4 bit)

DT : DT
bits : 4 - 5 (2 bit)

MU : MU
bits : 8 - 11 (4 bit)

MT : MT
bits : 12 - 12 (1 bit)

WDU : WDU
bits : 13 - 15 (3 bit)


DR

RTC date register
address_offset : 0x4 Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DR DR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DU DT MU MT WDU YU YT

DU : DU
bits : 0 - 3 (4 bit)

DT : DT
bits : 4 - 5 (2 bit)

MU : MU
bits : 8 - 11 (4 bit)

MT : MT
bits : 12 - 12 (1 bit)

WDU : WDU
bits : 13 - 15 (3 bit)

YU : YU
bits : 16 - 19 (4 bit)

YT : YT
bits : 20 - 23 (4 bit)


TAFCR

RTC tamper and alternate function configuration register
address_offset : 0x40 Bytes (0x0)
access : read-only
reset_value : 0x0
reset_Mask : 0x0

TAFCR TAFCR read-only 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 TAMPE TAMPEDGE TAMPIE ALARMOUTTYPE

TAMPE : TAMPE
bits : 0 - 0 (1 bit)

TAMPEDGE : TAMPEDGE
bits : 1 - 1 (1 bit)

TAMPIE : TAMPIE
bits : 2 - 2 (1 bit)

ALARMOUTTYPE : ALARMOUTTYPE
bits : 18 - 18 (1 bit)


BK0R

RTC backup register
address_offset : 0x50 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK0R BK0R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK0R

BK0R : BK0R
bits : 0 - 31 (32 bit)


BK1R

RTC backup register
address_offset : 0x54 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK1R BK1R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK1R

BK1R : BK1R
bits : 0 - 31 (32 bit)


BK2R

RTC backup register
address_offset : 0x58 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK2R BK2R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK2R

BK2R : BK2R
bits : 0 - 31 (32 bit)


BK3R

RTC backup register
address_offset : 0x5C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK3R BK3R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK3R

BK3R : BK3R
bits : 0 - 31 (32 bit)


BK4R

RTC backup register
address_offset : 0x60 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK4R BK4R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK4R

BK4R : BK3R
bits : 0 - 31 (32 bit)


BK5R

RTC backup register
address_offset : 0x64 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK5R BK5R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK5R

BK5R : BK5R
bits : 0 - 31 (32 bit)


BK6R

RTC backup register
address_offset : 0x68 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK6R BK6R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK6R

BK6R : BK6R
bits : 0 - 31 (32 bit)


BK7R

RTC backup register
address_offset : 0x6C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK7R BK7R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK7R

BK7R : BK7R
bits : 0 - 31 (32 bit)


BK8R

RTC backup register
address_offset : 0x70 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK8R BK8R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK8R

BK8R : BK8R
bits : 0 - 31 (32 bit)


BK9R

RTC backup register
address_offset : 0x74 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK9R BK9R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK9R

BK9R : BK9R
bits : 0 - 31 (32 bit)


BK10R

RTC backup register
address_offset : 0x78 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK10R BK10R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK10R

BK10R : BK10R
bits : 0 - 31 (32 bit)


BK11R

RTC backup register
address_offset : 0x7C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK11R BK11R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK11R

BK11R : BK11R
bits : 0 - 31 (32 bit)


CR

RTC control register
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 WUCKSEL TSEDGE REFCKON FMT DCE ALRAE ALRBE WUTE TSE ALRAIE ALRBIE WUTIE TSIE ADD1H SUB1H BCK POL OSEL COE

WUCKSEL : WUCKSEL
bits : 0 - 2 (3 bit)

TSEDGE : TSEDGE
bits : 3 - 3 (1 bit)

REFCKON : REFCKON
bits : 4 - 4 (1 bit)

FMT : FMT
bits : 6 - 6 (1 bit)

DCE : DCE
bits : 7 - 7 (1 bit)

ALRAE : ALRAE
bits : 8 - 8 (1 bit)

ALRBE : ALRBE
bits : 9 - 9 (1 bit)

WUTE : WUTE
bits : 10 - 10 (1 bit)

TSE : TSE
bits : 11 - 11 (1 bit)

ALRAIE : ALRAIE
bits : 12 - 12 (1 bit)

ALRBIE : ALRBIE
bits : 13 - 13 (1 bit)

WUTIE : WUTIE
bits : 14 - 14 (1 bit)

TSIE : TSIE
bits : 15 - 15 (1 bit)

ADD1H : ADD1H
bits : 16 - 16 (1 bit)

SUB1H : SUB1H
bits : 17 - 17 (1 bit)

BCK : BCK
bits : 18 - 18 (1 bit)

POL : POL
bits : 20 - 20 (1 bit)

OSEL : OSEL
bits : 21 - 22 (2 bit)

COE : COE
bits : 23 - 23 (1 bit)


BK12R

RTC backup register
address_offset : 0x80 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK12R BK12R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK12R

BK12R : BK12R
bits : 0 - 31 (32 bit)


BK13R

RTC backup register
address_offset : 0x84 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK13R BK13R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK13R

BK13R : BK13R
bits : 0 - 31 (32 bit)


BK14R

RTC backup register
address_offset : 0x88 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK14R BK14R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK14R

BK14R : BK14R
bits : 0 - 31 (32 bit)


BK15R

RTC backup register
address_offset : 0x8C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK15R BK15R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK15R

BK15R : BK15R
bits : 0 - 31 (32 bit)


BK16R

RTC backup register
address_offset : 0x90 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK16R BK16R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK16R

BK16R : BK16R
bits : 0 - 31 (32 bit)


BK17R

RTC backup register
address_offset : 0x94 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK17R BK17R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK17R

BK17R : BK17R
bits : 0 - 31 (32 bit)


BK18R

RTC backup register
address_offset : 0x98 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK18R BK18R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK18R

BK18R : BK18R
bits : 0 - 31 (32 bit)


BK19R

RTC backup register
address_offset : 0x9C Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0

BK19R BK19R read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 BK19R

BK19R : BK19R
bits : 0 - 31 (32 bit)


ISR

RTC initialization and status register
address_offset : 0xC Bytes (0x0)
size : -1 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

ISR ISR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ALRAWF ALRBWF WUTWF INITS RSF INITF INIT ALRAF ALRBF WUTF TSF TSOVF TAMPF

ALRAWF : ALRAWF
bits : 0 - 0 (1 bit)
access : read-only

ALRBWF : ALRBWF
bits : 1 - 1 (1 bit)
access : read-only

WUTWF : WUTWF
bits : 2 - 2 (1 bit)
access : read-only

INITS : INITS
bits : 4 - 4 (1 bit)
access : read-only

RSF : RSF
bits : 5 - 5 (1 bit)
access : read-only

INITF : INITF
bits : 6 - 6 (1 bit)
access : read-only

INIT : INIT
bits : 7 - 7 (1 bit)
access : read-write

ALRAF : ALRAF
bits : 8 - 8 (1 bit)
access : read-only

ALRBF : ALRBF
bits : 9 - 9 (1 bit)
access : read-only

WUTF : WUTF
bits : 10 - 10 (1 bit)
access : read-only

TSF : TSF
bits : 11 - 11 (1 bit)
access : read-only

TSOVF : TSOVF
bits : 12 - 12 (1 bit)
access : read-only

TAMPF : TAMPF
bits : 13 - 13 (1 bit)
access : read-only



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