\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
RI input capture register
address_offset : 0x0 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
IC1IOS : IC1IOS
bits : 0 - 3 (4 bit)
IC2IOS : IC2IOS
bits : 4 - 7 (4 bit)
IC3IOS : IC3IOS
bits : 8 - 11 (4 bit)
IC4IOS : IC4IOS
bits : 12 - 15 (4 bit)
TIM : TIM
bits : 16 - 17 (2 bit)
IC1 : IC1
bits : 18 - 18 (1 bit)
IC2 : IC2
bits : 19 - 19 (1 bit)
IC3 : IC3
bits : 20 - 20 (1 bit)
IC4 : IC4
bits : 21 - 21 (1 bit)
RI hysteresis control register 2
address_offset : 0x10 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PC : PC
bits : 0 - 15 (16 bit)
PD : PD
bits : 16 - 31 (16 bit)
RI hysteresis control register 3
address_offset : 0x14 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PE : PE
bits : 0 - 15 (16 bit)
RI analog switches control register 1
address_offset : 0x4 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
CH0 : CH0
bits : 0 - 0 (1 bit)
CH1 : CH1
bits : 1 - 1 (1 bit)
CH2 : CH2
bits : 2 - 2 (1 bit)
CH3 : CH3
bits : 3 - 3 (1 bit)
CH6 : CH6
bits : 6 - 6 (1 bit)
CH7 : CH7
bits : 7 - 7 (1 bit)
CH8 : CH8
bits : 8 - 8 (1 bit)
CH9 : CH9
bits : 9 - 9 (1 bit)
CH10 : CH10
bits : 10 - 10 (1 bit)
CH11 : CH11
bits : 11 - 11 (1 bit)
CH12 : CH12
bits : 12 - 12 (1 bit)
CH13 : CH13
bits : 13 - 13 (1 bit)
CH14 : CH14
bits : 14 - 14 (1 bit)
CH15 : CH15
bits : 15 - 15 (1 bit)
CH18 : CH18
bits : 18 - 18 (1 bit)
CH19 : CH19
bits : 19 - 19 (1 bit)
CH20 : CH20
bits : 20 - 20 (1 bit)
CH21 : CH21
bits : 21 - 21 (1 bit)
CH22 : CH22
bits : 22 - 22 (1 bit)
CH23 : CH23
bits : 23 - 23 (1 bit)
CH24 : CH24
bits : 24 - 24 (1 bit)
CH25 : CH25
bits : 25 - 25 (1 bit)
VCOMP : VCOMP
bits : 26 - 26 (1 bit)
ST : ST
bits : 31 - 31 (1 bit)
RI analog switches control register 2
address_offset : 0x8 Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
GR10_1 : GR10_1
bits : 0 - 0 (1 bit)
GR10_2 : GR10_2
bits : 1 - 1 (1 bit)
GR10_3 : GR10_3
bits : 2 - 2 (1 bit)
GR10_4 : GR10_4
bits : 3 - 3 (1 bit)
GR6_1 : GR6_1
bits : 4 - 4 (1 bit)
GR6_2 : GR6_2
bits : 5 - 5 (1 bit)
GR5_1 : GR5_1
bits : 6 - 6 (1 bit)
GR5_2 : GR5_2
bits : 7 - 7 (1 bit)
GR5_3 : GR5_3
bits : 8 - 8 (1 bit)
GR4_1 : GR4_1
bits : 9 - 9 (1 bit)
GR4_2 : GR4_2
bits : 10 - 10 (1 bit)
GR4_3 : GR4_3
bits : 11 - 11 (1 bit)
RI hysteresis control register 1
address_offset : 0xC Bytes (0x0)
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PA : PA
bits : 0 - 15 (16 bit)
PB : PB
bits : 16 - 31 (16 bit)
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