\n
address_offset : 0x0 Bytes (0x0)
size : 0x2000 byte (0x0)
mem_usage : registers
protection : not protected
GICV virtual machine control register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ENABLEGRP0 : ENABLEGRP0
bits : 0 - 0 (1 bit)
ENABLEGRP1 : ENABLEGRP1
bits : 1 - 1 (1 bit)
ACKCTL : acknowledge control
bits : 2 - 2 (1 bit)
FIQEN : FIQ enable for group 0 interrupts
bits : 3 - 3 (1 bit)
CBPR : BPR control
bits : 4 - 4 (1 bit)
EOIMODE : end of interrupt mode
bits : 9 - 9 (1 bit)
GICV VM end of interrupt register
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EOIINTID : EOIINTID
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM deactivate interrupt register
address_offset : 0x1000 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
IIDR : IIDR
bits : 0 - 31 (32 bit)
GICV VM running priority register
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PRIORITY : current running priority on the virtual CPU interface
bits : 3 - 7 (5 bit)
GICV VM highest priority pending interrupt register
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PENDINTID : The virtual interrupt ID of the highest priority pending virtual interrupt
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM aliased binary point register
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BINARY_POINT : BINARY_POINT
bits : 0 - 2 (3 bit)
GICV VM aliased interrupt register
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INTERRUPT_ID : The interrupt ID
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM aliased end of interrupt register
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
EOIINTID : EOIINTID
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM aliased highest priority pending interrupt register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PENDINTID : PENDINTID
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM priority mask register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PRIORITY : priority mask level for the virtual CPU interface
bits : 3 - 7 (5 bit)
GICV VM binary point register
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
BINARY_POINT : BINARY_POINT
bits : 0 - 2 (3 bit)
GICV VM interrupt acknowledge register
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
INTERRUPT_ID : The interrupt ID
bits : 0 - 9 (10 bit)
CPUID : CPUID
bits : 10 - 10 (1 bit)
GICV VM active priority register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
APR0 : APR0
bits : 0 - 31 (32 bit)
GICV VM CPU interface identification register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IIDR : IIDR
bits : 0 - 31 (32 bit)
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