\n
address_offset : 0x0 Bytes (0x0)
size : 0x400 byte (0x0)
mem_usage : registers
protection : not protected
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Interrupt enable register
address_offset : 0x100 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISE0 : Interrupt semaphore n enable bit
bits : 0 - 0 (1 bit)
ISE1 : Interrupt semaphore n enable bit
bits : 1 - 1 (1 bit)
ISE2 : Interrupt semaphore n enable bit
bits : 2 - 2 (1 bit)
ISE3 : Interrupt semaphore n enable bit
bits : 3 - 3 (1 bit)
ISE4 : Interrupt semaphore n enable bit
bits : 4 - 4 (1 bit)
ISE5 : Interrupt semaphore n enable bit
bits : 5 - 5 (1 bit)
ISE6 : Interrupt semaphore n enable bit
bits : 6 - 6 (1 bit)
ISE7 : Interrupt semaphore n enable bit
bits : 7 - 7 (1 bit)
ISE8 : Interrupt semaphore n enable bit
bits : 8 - 8 (1 bit)
ISE9 : Interrupt semaphore n enable bit
bits : 9 - 9 (1 bit)
ISE10 : Interrupt semaphore n enable bit
bits : 10 - 10 (1 bit)
ISE11 : Interrupt semaphore n enable bit
bits : 11 - 11 (1 bit)
ISE12 : Interrupt semaphore n enable bit
bits : 12 - 12 (1 bit)
ISE13 : Interrupt semaphore n enable bit
bits : 13 - 13 (1 bit)
ISE14 : Interrupt semaphore n enable bit
bits : 14 - 14 (1 bit)
ISE15 : Interrupt semaphore n enable bit
bits : 15 - 15 (1 bit)
ISE16 : Interrupt semaphore n enable bit
bits : 16 - 16 (1 bit)
ISE17 : Interrupt semaphore n enable bit
bits : 17 - 17 (1 bit)
ISE18 : Interrupt semaphore n enable bit
bits : 18 - 18 (1 bit)
ISE19 : Interrupt semaphore n enable bit
bits : 19 - 19 (1 bit)
ISE20 : Interrupt semaphore n enable bit
bits : 20 - 20 (1 bit)
ISE21 : Interrupt semaphore n enable bit
bits : 21 - 21 (1 bit)
ISE22 : Interrupt semaphore n enable bit
bits : 22 - 22 (1 bit)
ISE23 : Interrupt semaphore n enable bit
bits : 23 - 23 (1 bit)
ISE24 : Interrupt semaphore n enable bit
bits : 24 - 24 (1 bit)
ISE25 : Interrupt semaphore n enable bit
bits : 25 - 25 (1 bit)
ISE26 : Interrupt semaphore n enable bit
bits : 26 - 26 (1 bit)
ISE27 : Interrupt semaphore n enable bit
bits : 27 - 27 (1 bit)
ISE28 : Interrupt semaphore n enable bit
bits : 28 - 28 (1 bit)
ISE29 : Interrupt semaphore n enable bit
bits : 29 - 29 (1 bit)
ISE30 : Interrupt semaphore n enable bit
bits : 30 - 30 (1 bit)
ISE31 : Interrupt(N) semaphore n enable bit.
bits : 31 - 31 (1 bit)
HSEM Interrupt clear register
address_offset : 0x104 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ISC0 : Interrupt(N) semaphore n clear bit
bits : 0 - 0 (1 bit)
ISC1 : Interrupt(N) semaphore n clear bit
bits : 1 - 1 (1 bit)
ISC2 : Interrupt(N) semaphore n clear bit
bits : 2 - 2 (1 bit)
ISC3 : Interrupt(N) semaphore n clear bit
bits : 3 - 3 (1 bit)
ISC4 : Interrupt(N) semaphore n clear bit
bits : 4 - 4 (1 bit)
ISC5 : Interrupt(N) semaphore n clear bit
bits : 5 - 5 (1 bit)
ISC6 : Interrupt(N) semaphore n clear bit
bits : 6 - 6 (1 bit)
ISC7 : Interrupt(N) semaphore n clear bit
bits : 7 - 7 (1 bit)
ISC8 : Interrupt(N) semaphore n clear bit
bits : 8 - 8 (1 bit)
ISC9 : Interrupt(N) semaphore n clear bit
bits : 9 - 9 (1 bit)
ISC10 : Interrupt(N) semaphore n clear bit
bits : 10 - 10 (1 bit)
ISC11 : Interrupt(N) semaphore n clear bit
bits : 11 - 11 (1 bit)
ISC12 : Interrupt(N) semaphore n clear bit
bits : 12 - 12 (1 bit)
ISC13 : Interrupt(N) semaphore n clear bit
bits : 13 - 13 (1 bit)
ISC14 : Interrupt(N) semaphore n clear bit
bits : 14 - 14 (1 bit)
ISC15 : Interrupt(N) semaphore n clear bit
bits : 15 - 15 (1 bit)
ISC16 : Interrupt(N) semaphore n clear bit
bits : 16 - 16 (1 bit)
ISC17 : Interrupt(N) semaphore n clear bit
bits : 17 - 17 (1 bit)
ISC18 : Interrupt(N) semaphore n clear bit
bits : 18 - 18 (1 bit)
ISC19 : Interrupt(N) semaphore n clear bit
bits : 19 - 19 (1 bit)
ISC20 : Interrupt(N) semaphore n clear bit
bits : 20 - 20 (1 bit)
ISC21 : Interrupt(N) semaphore n clear bit
bits : 21 - 21 (1 bit)
ISC22 : Interrupt(N) semaphore n clear bit
bits : 22 - 22 (1 bit)
ISC23 : Interrupt(N) semaphore n clear bit
bits : 23 - 23 (1 bit)
ISC24 : Interrupt(N) semaphore n clear bit
bits : 24 - 24 (1 bit)
ISC25 : Interrupt(N) semaphore n clear bit
bits : 25 - 25 (1 bit)
ISC26 : Interrupt(N) semaphore n clear bit
bits : 26 - 26 (1 bit)
ISC27 : Interrupt(N) semaphore n clear bit
bits : 27 - 27 (1 bit)
ISC28 : Interrupt(N) semaphore n clear bit
bits : 28 - 28 (1 bit)
ISC29 : Interrupt(N) semaphore n clear bit
bits : 29 - 29 (1 bit)
ISC30 : Interrupt(N) semaphore n clear bit
bits : 30 - 30 (1 bit)
ISC31 : Interrupt(N) semaphore n clear bit
bits : 31 - 31 (1 bit)
HSEM Interrupt status register
address_offset : 0x108 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ISF0 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 0 - 0 (1 bit)
ISF1 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 1 - 1 (1 bit)
ISF2 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 2 - 2 (1 bit)
ISF3 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 3 - 3 (1 bit)
ISF4 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 4 - 4 (1 bit)
ISF5 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 5 - 5 (1 bit)
ISF6 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 6 - 6 (1 bit)
ISF7 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 7 - 7 (1 bit)
ISF8 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 8 - 8 (1 bit)
ISF9 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 9 - 9 (1 bit)
ISF10 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 10 - 10 (1 bit)
ISF11 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 11 - 11 (1 bit)
ISF12 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 12 - 12 (1 bit)
ISF13 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 13 - 13 (1 bit)
ISF14 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 14 - 14 (1 bit)
ISF15 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 15 - 15 (1 bit)
ISF16 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 16 - 16 (1 bit)
ISF17 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 17 - 17 (1 bit)
ISF18 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 18 - 18 (1 bit)
ISF19 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 19 - 19 (1 bit)
ISF20 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 20 - 20 (1 bit)
ISF21 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 21 - 21 (1 bit)
ISF22 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 22 - 22 (1 bit)
ISF23 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 23 - 23 (1 bit)
ISF24 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 24 - 24 (1 bit)
ISF25 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 25 - 25 (1 bit)
ISF26 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 26 - 26 (1 bit)
ISF27 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 27 - 27 (1 bit)
ISF28 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 28 - 28 (1 bit)
ISF29 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 29 - 29 (1 bit)
ISF30 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 30 - 30 (1 bit)
ISF31 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 31 - 31 (1 bit)
HSEM Masked interrupt status register
address_offset : 0x10C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MISF0 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 0 - 0 (1 bit)
MISF1 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 1 - 1 (1 bit)
MISF2 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 2 - 2 (1 bit)
MISF3 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 3 - 3 (1 bit)
MISF4 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 4 - 4 (1 bit)
MISF5 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 5 - 5 (1 bit)
MISF6 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 6 - 6 (1 bit)
MISF7 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 7 - 7 (1 bit)
MISF8 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 8 - 8 (1 bit)
MISF9 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 9 - 9 (1 bit)
MISF10 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 10 - 10 (1 bit)
MISF11 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 11 - 11 (1 bit)
MISF12 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 12 - 12 (1 bit)
MISF13 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 13 - 13 (1 bit)
MISF14 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 14 - 14 (1 bit)
MISF15 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 15 - 15 (1 bit)
MISF16 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 16 - 16 (1 bit)
MISF17 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 17 - 17 (1 bit)
MISF18 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 18 - 18 (1 bit)
MISF19 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 19 - 19 (1 bit)
MISF20 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 20 - 20 (1 bit)
MISF21 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 21 - 21 (1 bit)
MISF22 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 22 - 22 (1 bit)
MISF23 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 23 - 23 (1 bit)
MISF24 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 24 - 24 (1 bit)
MISF25 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 25 - 25 (1 bit)
MISF26 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 26 - 26 (1 bit)
MISF27 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 27 - 27 (1 bit)
MISF28 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 28 - 28 (1 bit)
MISF29 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 29 - 29 (1 bit)
MISF30 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 30 - 30 (1 bit)
MISF31 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 31 - 31 (1 bit)
HSEM Interrupt enable register
address_offset : 0x110 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
ISE0 : Interrupt semaphore n enable bit
bits : 0 - 0 (1 bit)
ISE1 : Interrupt semaphore n enable bit
bits : 1 - 1 (1 bit)
ISE2 : Interrupt semaphore n enable bit
bits : 2 - 2 (1 bit)
ISE3 : Interrupt semaphore n enable bit
bits : 3 - 3 (1 bit)
ISE4 : Interrupt semaphore n enable bit
bits : 4 - 4 (1 bit)
ISE5 : Interrupt semaphore n enable bit
bits : 5 - 5 (1 bit)
ISE6 : Interrupt semaphore n enable bit
bits : 6 - 6 (1 bit)
ISE7 : Interrupt semaphore n enable bit
bits : 7 - 7 (1 bit)
ISE8 : Interrupt semaphore n enable bit
bits : 8 - 8 (1 bit)
ISE9 : Interrupt semaphore n enable bit
bits : 9 - 9 (1 bit)
ISE10 : Interrupt semaphore n enable bit
bits : 10 - 10 (1 bit)
ISE11 : Interrupt semaphore n enable bit
bits : 11 - 11 (1 bit)
ISE12 : Interrupt semaphore n enable bit
bits : 12 - 12 (1 bit)
ISE13 : Interrupt semaphore n enable bit
bits : 13 - 13 (1 bit)
ISE14 : Interrupt semaphore n enable bit
bits : 14 - 14 (1 bit)
ISE15 : Interrupt semaphore n enable bit
bits : 15 - 15 (1 bit)
ISE16 : Interrupt semaphore n enable bit
bits : 16 - 16 (1 bit)
ISE17 : Interrupt semaphore n enable bit
bits : 17 - 17 (1 bit)
ISE18 : Interrupt semaphore n enable bit
bits : 18 - 18 (1 bit)
ISE19 : Interrupt semaphore n enable bit
bits : 19 - 19 (1 bit)
ISE20 : Interrupt semaphore n enable bit
bits : 20 - 20 (1 bit)
ISE21 : Interrupt semaphore n enable bit
bits : 21 - 21 (1 bit)
ISE22 : Interrupt semaphore n enable bit
bits : 22 - 22 (1 bit)
ISE23 : Interrupt semaphore n enable bit
bits : 23 - 23 (1 bit)
ISE24 : Interrupt semaphore n enable bit
bits : 24 - 24 (1 bit)
ISE25 : Interrupt semaphore n enable bit
bits : 25 - 25 (1 bit)
ISE26 : Interrupt semaphore n enable bit
bits : 26 - 26 (1 bit)
ISE27 : Interrupt semaphore n enable bit
bits : 27 - 27 (1 bit)
ISE28 : Interrupt semaphore n enable bit
bits : 28 - 28 (1 bit)
ISE29 : Interrupt semaphore n enable bit
bits : 29 - 29 (1 bit)
ISE30 : Interrupt semaphore n enable bit
bits : 30 - 30 (1 bit)
ISE31 : Interrupt(N) semaphore n enable bit.
bits : 31 - 31 (1 bit)
HSEM Interrupt clear register
address_offset : 0x114 Bytes (0x0)
size : 32 bit
access : write-only
reset_value : 0x0
reset_Mask : 0x0
ISC0 : Interrupt(N) semaphore n clear bit
bits : 0 - 0 (1 bit)
ISC1 : Interrupt(N) semaphore n clear bit
bits : 1 - 1 (1 bit)
ISC2 : Interrupt(N) semaphore n clear bit
bits : 2 - 2 (1 bit)
ISC3 : Interrupt(N) semaphore n clear bit
bits : 3 - 3 (1 bit)
ISC4 : Interrupt(N) semaphore n clear bit
bits : 4 - 4 (1 bit)
ISC5 : Interrupt(N) semaphore n clear bit
bits : 5 - 5 (1 bit)
ISC6 : Interrupt(N) semaphore n clear bit
bits : 6 - 6 (1 bit)
ISC7 : Interrupt(N) semaphore n clear bit
bits : 7 - 7 (1 bit)
ISC8 : Interrupt(N) semaphore n clear bit
bits : 8 - 8 (1 bit)
ISC9 : Interrupt(N) semaphore n clear bit
bits : 9 - 9 (1 bit)
ISC10 : Interrupt(N) semaphore n clear bit
bits : 10 - 10 (1 bit)
ISC11 : Interrupt(N) semaphore n clear bit
bits : 11 - 11 (1 bit)
ISC12 : Interrupt(N) semaphore n clear bit
bits : 12 - 12 (1 bit)
ISC13 : Interrupt(N) semaphore n clear bit
bits : 13 - 13 (1 bit)
ISC14 : Interrupt(N) semaphore n clear bit
bits : 14 - 14 (1 bit)
ISC15 : Interrupt(N) semaphore n clear bit
bits : 15 - 15 (1 bit)
ISC16 : Interrupt(N) semaphore n clear bit
bits : 16 - 16 (1 bit)
ISC17 : Interrupt(N) semaphore n clear bit
bits : 17 - 17 (1 bit)
ISC18 : Interrupt(N) semaphore n clear bit
bits : 18 - 18 (1 bit)
ISC19 : Interrupt(N) semaphore n clear bit
bits : 19 - 19 (1 bit)
ISC20 : Interrupt(N) semaphore n clear bit
bits : 20 - 20 (1 bit)
ISC21 : Interrupt(N) semaphore n clear bit
bits : 21 - 21 (1 bit)
ISC22 : Interrupt(N) semaphore n clear bit
bits : 22 - 22 (1 bit)
ISC23 : Interrupt(N) semaphore n clear bit
bits : 23 - 23 (1 bit)
ISC24 : Interrupt(N) semaphore n clear bit
bits : 24 - 24 (1 bit)
ISC25 : Interrupt(N) semaphore n clear bit
bits : 25 - 25 (1 bit)
ISC26 : Interrupt(N) semaphore n clear bit
bits : 26 - 26 (1 bit)
ISC27 : Interrupt(N) semaphore n clear bit
bits : 27 - 27 (1 bit)
ISC28 : Interrupt(N) semaphore n clear bit
bits : 28 - 28 (1 bit)
ISC29 : Interrupt(N) semaphore n clear bit
bits : 29 - 29 (1 bit)
ISC30 : Interrupt(N) semaphore n clear bit
bits : 30 - 30 (1 bit)
ISC31 : Interrupt(N) semaphore n clear bit
bits : 31 - 31 (1 bit)
HSEM Interrupt status register
address_offset : 0x118 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
ISF0 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 0 - 0 (1 bit)
ISF1 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 1 - 1 (1 bit)
ISF2 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 2 - 2 (1 bit)
ISF3 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 3 - 3 (1 bit)
ISF4 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 4 - 4 (1 bit)
ISF5 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 5 - 5 (1 bit)
ISF6 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 6 - 6 (1 bit)
ISF7 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 7 - 7 (1 bit)
ISF8 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 8 - 8 (1 bit)
ISF9 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 9 - 9 (1 bit)
ISF10 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 10 - 10 (1 bit)
ISF11 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 11 - 11 (1 bit)
ISF12 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 12 - 12 (1 bit)
ISF13 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 13 - 13 (1 bit)
ISF14 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 14 - 14 (1 bit)
ISF15 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 15 - 15 (1 bit)
ISF16 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 16 - 16 (1 bit)
ISF17 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 17 - 17 (1 bit)
ISF18 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 18 - 18 (1 bit)
ISF19 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 19 - 19 (1 bit)
ISF20 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 20 - 20 (1 bit)
ISF21 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 21 - 21 (1 bit)
ISF22 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 22 - 22 (1 bit)
ISF23 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 23 - 23 (1 bit)
ISF24 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 24 - 24 (1 bit)
ISF25 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 25 - 25 (1 bit)
ISF26 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 26 - 26 (1 bit)
ISF27 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 27 - 27 (1 bit)
ISF28 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 28 - 28 (1 bit)
ISF29 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 29 - 29 (1 bit)
ISF30 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 30 - 30 (1 bit)
ISF31 : Interrupt(N) semaphore n status bit before enable (mask)
bits : 31 - 31 (1 bit)
HSEM Masked interrupt status register
address_offset : 0x11C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MISF0 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 0 - 0 (1 bit)
MISF1 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 1 - 1 (1 bit)
MISF2 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 2 - 2 (1 bit)
MISF3 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 3 - 3 (1 bit)
MISF4 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 4 - 4 (1 bit)
MISF5 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 5 - 5 (1 bit)
MISF6 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 6 - 6 (1 bit)
MISF7 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 7 - 7 (1 bit)
MISF8 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 8 - 8 (1 bit)
MISF9 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 9 - 9 (1 bit)
MISF10 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 10 - 10 (1 bit)
MISF11 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 11 - 11 (1 bit)
MISF12 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 12 - 12 (1 bit)
MISF13 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 13 - 13 (1 bit)
MISF14 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 14 - 14 (1 bit)
MISF15 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 15 - 15 (1 bit)
MISF16 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 16 - 16 (1 bit)
MISF17 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 17 - 17 (1 bit)
MISF18 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 18 - 18 (1 bit)
MISF19 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 19 - 19 (1 bit)
MISF20 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 20 - 20 (1 bit)
MISF21 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 21 - 21 (1 bit)
MISF22 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 22 - 22 (1 bit)
MISF23 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 23 - 23 (1 bit)
MISF24 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 24 - 24 (1 bit)
MISF25 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 25 - 25 (1 bit)
MISF26 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 26 - 26 (1 bit)
MISF27 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 27 - 27 (1 bit)
MISF28 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 28 - 28 (1 bit)
MISF29 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 29 - 29 (1 bit)
MISF30 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 30 - 30 (1 bit)
MISF31 : masked interrupt(N) semaphore n status bit after enable (mask)
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Clear register
address_offset : 0x140 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
COREID : MasterID of semaphores to be cleared
bits : 8 - 11 (4 bit)
KEY : Semaphore clear Key
bits : 16 - 31 (16 bit)
HSEM Interrupt clear register
address_offset : 0x144 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
KEY : Semaphore Clear Key
bits : 16 - 31 (16 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x18 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x1C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x20 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x24 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x34 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x3C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Hardware Configuration Register 2
address_offset : 0x3EC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MASTERID1 : MASTERID1
bits : 0 - 3 (4 bit)
MASTERID2 : MASTERID2
bits : 4 - 7 (4 bit)
MASTERID3 : MASTERID3
bits : 8 - 11 (4 bit)
MASTERID4 : MASTERID4
bits : 12 - 15 (4 bit)
HSEM Hardware Configuration Register 1
address_offset : 0x3F0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
NBSEM : NBSEM
bits : 0 - 7 (8 bit)
NBINT : NBINT
bits : 8 - 11 (4 bit)
HSEM IP Version Register
address_offset : 0x3F4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
MINREV : MINREV
bits : 0 - 3 (4 bit)
MAJREV : MAJREV
bits : 4 - 7 (4 bit)
HSEM IP Version Register
address_offset : 0x3F8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
IPID : IPID
bits : 0 - 31 (32 bit)
HSEM IP Version Register
address_offset : 0x3FC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
SID : SID
bits : 0 - 31 (32 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x40 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x44 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x48 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x4C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x50 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x54 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x58 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x5C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x60 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x64 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x68 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x6C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x70 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x74 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x78 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x7C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0x8 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x80 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x84 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x88 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x8C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x90 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x94 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x98 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0x9C Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xA0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xA4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xA8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xAC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xB0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xB4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xB8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xBC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM register HSEM_R0 HSEM_R31
address_offset : 0xC Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xC0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xC4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xC8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xCC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xD0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xD4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xD8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xDC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xE0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xE4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xE8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xEC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xF0 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xF4 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xF8 Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 3 (4 bit)
COREID : Semaphore MasterID
bits : 8 - 15 (8 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
HSEM Read lock register
address_offset : 0xFC Bytes (0x0)
size : 32 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0
PROCID : Semaphore ProcessID
bits : 0 - 7 (8 bit)
COREID : Semaphore MasterID
bits : 8 - 11 (4 bit)
LOCK : Lock indication
bits : 31 - 31 (1 bit)
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