\n

PR

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x10 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x18 Bytes (0x0)
size : 0x10 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

FR3

FR4

OD

PUP

PDN

IE

CR


DATA

PR Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0 PR1 PR2 PR3

PR0 : PR0
bits : 0 - 0 (1 bit)
access : read-write

PR1 : PR1
bits : 1 - 1 (1 bit)
access : read-write

PR2 : PR2
bits : 2 - 2 (1 bit)
access : read-write

PR3 : PR3
bits : 3 - 3 (1 bit)
access : read-write


FR3

PR Function Register 3
address_offset : 0x10 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR3 FR3 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0F3 PR1F3 PR2F3

PR0F3 : PR0F3
bits : 0 - 0 (1 bit)
access : read-write

PR1F3 : PR1F3
bits : 1 - 1 (1 bit)
access : read-write

PR2F3 : PR2F3
bits : 2 - 2 (1 bit)
access : read-write


FR4

PR Function Register 4
address_offset : 0x14 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

FR4 FR4 read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0F4 PR1F4 PR2F4

PR0F4 : PR0F4
bits : 0 - 0 (1 bit)
access : read-write

PR1F4 : PR1F4
bits : 1 - 1 (1 bit)
access : read-write

PR2F4 : PR2F4
bits : 2 - 2 (1 bit)
access : read-write


OD

PR Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0OD PR1OD PR2OD PR3OD

PR0OD : PR0OD
bits : 0 - 0 (1 bit)
access : read-write

PR1OD : PR1OD
bits : 1 - 1 (1 bit)
access : read-write

PR2OD : PR2OD
bits : 2 - 2 (1 bit)
access : read-write

PR3OD : PR3OD
bits : 3 - 3 (1 bit)
access : read-write


PUP

PR Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0UP PR1UP PR2UP PR3UP

PR0UP : PR0UP
bits : 0 - 0 (1 bit)
access : read-write

PR1UP : PR1UP
bits : 1 - 1 (1 bit)
access : read-write

PR2UP : PR2UP
bits : 2 - 2 (1 bit)
access : read-write

PR3UP : PR3UP
bits : 3 - 3 (1 bit)
access : read-write


PDN

PR Pull-Down Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDN PDN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0DN PR1DN PR2DN PR3DN

PR0DN : PR0DN
bits : 0 - 0 (1 bit)
access : read-write

PR1DN : PR1DN
bits : 1 - 1 (1 bit)
access : read-write

PR2DN : PR2DN
bits : 2 - 2 (1 bit)
access : read-write

PR3DN : PR3DN
bits : 3 - 3 (1 bit)
access : read-write


IE

PR Input Enable Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0IE PR1IE PR2IE PR3IE

PR0IE : PR0IE
bits : 0 - 0 (1 bit)
access : read-write

PR1IE : PR1IE
bits : 1 - 1 (1 bit)
access : read-write

PR2IE : PR2IE
bits : 2 - 2 (1 bit)
access : read-write

PR3IE : PR3IE
bits : 3 - 3 (1 bit)
access : read-write


CR

PR Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PR0C PR1C PR2C PR3C

PR0C : PR0C
bits : 0 - 0 (1 bit)
access : read-write

PR1C : PR1C
bits : 1 - 1 (1 bit)
access : read-write

PR2C : PR2C
bits : 2 - 2 (1 bit)
access : read-write

PR3C : PR3C
bits : 3 - 3 (1 bit)
access : read-write



Is something missing? Is something wrong? can you help correct it ? Please contact us at info@chipselect.org !

This website is sponsored by EmbeetleEmbeetle, an IDE designed from scratch for embedded software developers.