\n

PV

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x8 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x38 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x28 Bytes (0x0)
size : 0xC byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x34 Bytes (0x0)
size : 0x4 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x20 byte (0x0)
mem_usage : reserved
protection : not protected

Registers

DATA

OD

PUP

PDN

IE

CR


DATA

PV Data Register
address_offset : 0x0 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

DATA DATA read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0 PV1 PV2 PV3

PV0 : PV0
bits : 0 - 0 (1 bit)
access : read-write

PV1 : PV1
bits : 1 - 1 (1 bit)
access : read-write

PV2 : PV2
bits : 2 - 2 (1 bit)
access : read-write

PV3 : PV3
bits : 3 - 3 (1 bit)
access : read-write


OD

PV Open Drain Control Register
address_offset : 0x28 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

OD OD read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0OD PV1OD PV2OD PV3OD

PV0OD : PV0OD
bits : 0 - 0 (1 bit)
access : read-write

PV1OD : PV1OD
bits : 1 - 1 (1 bit)
access : read-write

PV2OD : PV2OD
bits : 2 - 2 (1 bit)
access : read-write

PV3OD : PV3OD
bits : 3 - 3 (1 bit)
access : read-write


PUP

PV Pull-up Control Register
address_offset : 0x2C Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PUP PUP read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0UP PV1UP PV2UP PV3UP

PV0UP : PV0UP
bits : 0 - 0 (1 bit)
access : read-write

PV1UP : PV1UP
bits : 1 - 1 (1 bit)
access : read-write

PV2UP : PV2UP
bits : 2 - 2 (1 bit)
access : read-write

PV3UP : PV3UP
bits : 3 - 3 (1 bit)
access : read-write


PDN

PV Pull-Down Control Register
address_offset : 0x30 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

PDN PDN read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0DN PV1DN PV2DN PV3DN

PV0DN : PV0DN
bits : 0 - 0 (1 bit)
access : read-write

PV1DN : PV1DN
bits : 1 - 1 (1 bit)
access : read-write

PV2DN : PV2DN
bits : 2 - 2 (1 bit)
access : read-write

PV3DN : PV3DN
bits : 3 - 3 (1 bit)
access : read-write


IE

PV Input Enable Control Register
address_offset : 0x38 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

IE IE read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0IE PV1IE PV2IE PV3IE

PV0IE : PV0IE
bits : 0 - 0 (1 bit)
access : read-write

PV1IE : PV1IE
bits : 1 - 1 (1 bit)
access : read-write

PV2IE : PV2IE
bits : 2 - 2 (1 bit)
access : read-write

PV3IE : PV3IE
bits : 3 - 3 (1 bit)
access : read-write


CR

PV Control Register
address_offset : 0x4 Bytes (0x0)
size : 32 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR CR read-write 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 Resets to Resets to 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 PV0C PV1C PV2C PV3C

PV0C : PV0C
bits : 0 - 0 (1 bit)
access : read-write

PV1C : PV1C
bits : 1 - 1 (1 bit)
access : read-write

PV2C : PV2C
bits : 2 - 2 (1 bit)
access : read-write

PV3C : PV3C
bits : 3 - 3 (1 bit)
access : read-write



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