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AO

Peripheral Memory Blocks

address_offset : 0x0 Bytes (0x0)
size : 0x7 byte (0x0)
mem_usage : registers
protection : not protected

address_offset : 0x7 Bytes (0x0)
size : 0x1 byte (0x0)
mem_usage : reserved
protection : not protected

address_offset : 0x8 Bytes (0x0)
size : 0x7 byte (0x0)
mem_usage : registers
protection : not protected

Registers

CR0

CR1

CR2

CR3

CR4

CR5

CR6

CR8

CR9

CR10

CR11

CR12

CR13

CR14


CR0

Display Selection Register
address_offset : 0x0 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR0 CR0 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MODE

MODE : MODE
bits : 0 - 0 (1 bit)
access : read-write


CR1

Configuration Register
address_offset : 0x1 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR1 CR1 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SLF DUTY VFSEL CPEN

SLF : SLF
bits : 1 - 2 (2 bit)
access : read-write

DUTY : DUTY
bits : 3 - 4 (2 bit)
access : read-write

VFSEL : VFSEL
bits : 5 - 6 (2 bit)
access : read-write

CPEN : CPEN
bits : 7 - 7 (1 bit)
access : read-write


CR2

Display Screen Register
address_offset : 0x2 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR2 CR2 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DATANUM

DATANUM : DATANUM
bits : 0 - 6 (7 bit)
access : read-write


CR3

Total Display Time Register
address_offset : 0x3 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR3 CR3 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 TIMEOUT

TIMEOUT : TIMEOUT
bits : 0 - 6 (7 bit)
access : read-write


CR4

Screen Switch Time Register
address_offset : 0x4 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR4 CR4 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 UPDATE

UPDATE : UPDATE
bits : 0 - 4 (5 bit)
access : read-write


CR5

Response Count Register
address_offset : 0x5 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR5 CR5 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DISPNUM

DISPNUM : DISPNUM
bits : 0 - 3 (4 bit)
access : read-write


CR6

Display Reponse Register
address_offset : 0x6 Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR6 CR6 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 RESPNUM

RESPNUM : RESPNUM
bits : 0 - 3 (4 bit)
access : read-write


CR8

Display Start Time Register (Second)
address_offset : 0x8 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR8 CR8 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 SEC

SEC : SEC
bits : 0 - 6 (7 bit)
access : read-only


CR9

Display Start Time Register (Minutes)
address_offset : 0x9 Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR9 CR9 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MIN

MIN : MIN
bits : 0 - 6 (7 bit)
access : read-only


CR10

Display Start Time Register (Hour)
address_offset : 0xA Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR10 CR10 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 HOUR HSEL

HOUR : HOUR
bits : 0 - 5 (6 bit)
access : read-only

HSEL : HSEL
bits : 6 - 6 (1 bit)
access : read-only


CR11

Display Start Time Register (Day)
address_offset : 0xB Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR11 CR11 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DAY

DAY : DAY
bits : 0 - 5 (6 bit)
access : read-only


CR12

Display Start Time Register (Month)
address_offset : 0xC Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR12 CR12 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 MONTH

MONTH : MONTH
bits : 0 - 4 (5 bit)
access : read-only


CR13

Display Start Time Register (Year)
address_offset : 0xD Bytes (0x0)
size : 8 bit
access : read-only
reset_value : 0x0
reset_Mask : 0x0

CR13 CR13 read-only 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 YEAR

YEAR : YEAR
bits : 0 - 7 (8 bit)
access : read-only


CR14

Low-speec Clock Control Register
address_offset : 0xE Bytes (0x0)
size : 8 bit
access : read-write
reset_value : 0x0
reset_Mask : 0x0

CR14 CR14 read-write 0 1 2 3 4 5 6 7 Resets to 0 0 0 0 0 0 0 0 DRVOSCL AOCKSEL AOCKF

DRVOSCL : DRVOSCL
bits : 0 - 0 (1 bit)
access : read-write

AOCKSEL : AOCKSEL
bits : 1 - 1 (1 bit)
access : read-write

AOCKF : AOCKF
bits : 2 - 2 (1 bit)
access : read-only



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